Add Rocket Lake

[Wunkolo]

Just to track the topic and start the dialog, but RocketLake(Cypress Cove) is looking to be based on the same uarch as Icelake(Sunny Cove)!
So maybe this data can be added to the readme.

InstLatX64 states that it has a single 512b FPU port

https://twitter.com/InstLatX64/status/1371934789356421125

[jeffhammond]

Thanks for adding this. While I no longer work for Intel, I'll be happy to maintain this project as long as people can contribute what is required to maintain it.

In this case, I want to wait until there is a measurement or similarly reliable determination of the AVX512 port count. For example, https://github.com/jeffhammond/vpu-count/blob/master/empirical.c was published by Intel in the SDM specifically to address the issue.

[Wunkolo]

For sure! I have lots of machines to run code on and contribute data-points for and will be getting a Rocket Lake machine very soon as well

[jeffhammond]

I'm happy to see data confirming things but I'm not sure how much is unknown right now. RKL seems known but needs to be confirmed because I can no longer ask an architect directly.

[jeffhammond]

@Wunkolo do you have an RKL measurement?

[Wunkolo]

Trying to get it to run on my 11900k right now but it seems that I can't get an installation of the intel-compiler going on archlinux.
To make it easier moving forward, maybe a new binary-release is in order with some of the latest commits in?

[Wunkolo]

Was able to get a make-shift build going. Here's some outputs as of 9926be9

I had to do a fix here to get it to compile:

vpu-count/vpu-count.c

Lines 332 to 336 in 9926be9

	bool tigerlake = (model == 0x8f);
	PDEBUG("Tiger Lake client? %s\n", tigerlake ? "yes" : "no");
	return (icelake);
	}

-    return (icelake);
+    return (tigerlake);

The outputs:

% ./empirical.x 
vpu=1

% ./test.x
0x0: 1b,756e6547,6c65746e,49656e69
Intel? yes
0x1: a0671,8100800,7ffafbff,bfebfbff
signature:  0x0a0671
model:      0xa7=167
family:     0x06=6
ext model:  0x0a=10
Skylake server? no
0x1: a0671,8100800,7ffafbff,bfebfbff
signature:  0x0a0671
model:      0xa7=167
family:     0x06=6
ext model:  0x0a=10
Tiger Lake client? no
0x1: a0671,8100800,7ffafbff,bfebfbff
signature:  0x0a0671
model:      0xa7=167
family:     0x06=6
ext model:  0x0a=10
Ice Lake client? no
0x1: a0671,8100800,7ffafbff,bfebfbff
signature:  0x0a0671
model:      0xa7=167
family:     0x06=6
ext model:  0x0a=10
Ice Lake server? no
0x1: a0671,8100800,7ffafbff,bfebfbff
signature:  0x0a0671
model:      0xa7=167
family:     0x06=6
ext model:  0x0a=10
Cannon Lake client? no
0x7: 2,f2bf67eb,405f5e,bc000410
KNL uarch? no
0x7: 2,f2bf67eb,405f5e,bc000410
KNM uarch? no
0x7: 2,f2bf67eb,405f5e,bc000410
AVX2? yes
AVX2 detected
cpu_name = 11th Gen Intel(R) Core(TM) i9-11`@
0x1: a0671,8100800,7ffafbff,bfebfbff
FMA3? yes
FMA3 detected
0x1: 0,0,121,2c100800
FMA4? no
CPU has 0 AVX-512 VPUs

The last few lines of time.x:

...
AVX2 detected
cpu_name = 11th Gen Intel(R) Core(TM) i9-11
0x1: a0671,4100800,7ffafbff,bfebfbff
FMA3? yes
FMA3 detected
0x1: 0,0,121,2c100800
FMA4? no
vpu_count: n=1000, dt=88489.055634 us, dt/n=88.489056 us, j=0
vpu_avx512: n=1000, dt=87.976456 us, dt/n=0.087976 us, j=1000
vpu_name: n=1000, dt=1885.890961 us, dt/n=1.885891 us, j=-1000
vpu_platinum: n=1000, dt=1879.930496 us, dt/n=1.879930 us, j=0

[jeffhammond]

Sorry for the compilation error. Fixed in 7f37feb.

[jeffhammond]

This is what I needed. Thanks!

% ./empirical.x 
vpu=1