forked from anthonywong/mt7630
/
rt2800lib.c
8454 lines (7314 loc) · 268 KB
/
rt2800lib.c
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/*
Copyright (C) 2010 Willow Garage <http://www.willowgarage.com>
Copyright (C) 2010 Ivo van Doorn <IvDoorn@gmail.com>
Copyright (C) 2009 Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Copyright (C) 2009 Gertjan van Wingerde <gwingerde@gmail.com>
Based on the original rt2800pci.c and rt2800usb.c.
Copyright (C) 2009 Alban Browaeys <prahal@yahoo.com>
Copyright (C) 2009 Felix Fietkau <nbd@openwrt.org>
Copyright (C) 2009 Luis Correia <luis.f.correia@gmail.com>
Copyright (C) 2009 Mattias Nissler <mattias.nissler@gmx.de>
Copyright (C) 2009 Mark Asselstine <asselsm@gmail.com>
Copyright (C) 2009 Xose Vazquez Perez <xose.vazquez@gmail.com>
<http://rt2x00.serialmonkey.com>
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to thef
Free Software Foundation, Inc.,
59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
*/
/*
Module: rt2800lib
Abstract: rt2800 generic device routines.
*/
#include <linux/crc-ccitt.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/slab.h>
#include <linux/version.h>
#include "rt2x00.h"
#include "rt2800lib.h"
#include "rt2800.h"
typedef struct GNU_PACKED _TXWI_NMAC {
/* Word 0 */
/* ex: 00 03 00 40 means txop = 3, PHYMODE = 1 */
UINT32 FRAG:1; /* 1 to inform TKIP engine this is a fragment. */
UINT32 MIMOps:1; /* the remote peer is in dynamic MIMO-PS mode */
UINT32 CFACK:1;
UINT32 TS:1;
UINT32 AMPDU:1;
UINT32 MpduDensity:3;
UINT32 txop:2;
UINT32 NDPSndRate:2; /* 0 : MCS0, 1: MCS8, 2: MCS16, 3: reserved */
UINT32 NDPSndBW:1; /* NDP sounding BW */
UINT32 Sounding:1;
UINT32 rsv0:1;
UINT32 lut_en:1;
UINT32 MCS:7;
UINT32 BW:2; /*channel bandwidth 20/40/80 MHz */
UINT32 ShortGI:1;
UINT32 STBC:1;
UINT32 eTxBF:1;
UINT32 iTxBF:1;
UINT32 PHYMODE:3;
/* Word1 */
/* ex: 1c ff 38 00 means ACK=0, BAWinSize=7, MPDUtotalByteCnt = 0x38 */
UINT32 ACK:1;
UINT32 NSEQ:1;
UINT32 BAWinSize:6;
UINT32 wcid:8;
UINT32 MPDUtotalByteCnt:14;
UINT32 Rsv1:2;
/*Word2 */
UINT32 IV;
/*Word3 */
UINT32 EIV;
/* Word 4 */
UINT32 TxEAPId:8;
UINT32 TxStreamMode:8;
UINT32 TxPwrAdj:4;
UINT32 Rsv4:4;
UINT32 TxPktId:8;
} TXWI_NMAC, *PTXWI_NMAC;
typedef union GNU_PACKED _TXWI_STRUC {
struct _TXWI_NMAC TXWI_N;
UINT32 word;
}TXWI_STRUC;
unsigned char beacon_txwi[]={0x08, 0x00, 0x00, 0x00, 0x1e, 0x00, 0x62, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00};
unsigned char beacon_buf[]={0x80, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff,
0xff, 0xff, 0xff, 0x00, 0x0c, 0x43, 0x26, 0x60, 0xe9, 0x00, 0x0c,
0x43, 0x26, 0x60, 0xe9, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x64, 0x00, 0x01, 0x04, 0x00, 0x0d, 0x57, 0x6f,
0x6f, 0x64, 0x79, 0x5f, 0x37, 0x36, 0x33, 0x30, 0x5f, 0x50, 0x43,
0x01, 0x08, 0x82, 0x84, 0x8b, 0x96, 0x12, 0x24, 0x48, 0x6c, 0x03,
0x01, 0x01, 0x32, 0x04, 0x0c, 0x18, 0x30, 0x60, 0x07, 0x06, 0x54,
0x57, 0x20, 0x01, 0x0e, 0x14, 0x33, 0x08, 0x20, 0x01, 0x02, 0x03,
0x04, 0x05, 0x06, 0x07, 0x33, 0x08, 0x21, 0x05, 0x06, 0x07, 0x08,
0x09
};
void RTMPusecDelay(unsigned long usec)
{
unsigned long i;
for (i = 0; i < (usec / 50); i++)
udelay(50);
if (usec % 50)
udelay(usec % 50);
}
struct lib_queue_entry_priv_pci {
__le32 *desc;
dma_addr_t desc_dma;
};
void lib_hex_dump(char *str, unsigned char *pSrcBufVA, u32 SrcBufLen)
{
unsigned char *pt;
int x;
pt = pSrcBufVA;
printk("%s: %p, len = %d\n", str, pSrcBufVA, SrcBufLen);
for (x = 0; x < SrcBufLen; x++) {
if (x % 16 == 0)
printk("0x%04x : ", x);
printk("%02x ", ((unsigned char)pt[x]));
if (x % 16 == 15)
printk("\n");
}
printk("\n");
}
extern WLAN_FUN_CTRL_STRUC g_WlanFunCtrl;
/* BBP Init Table*/
static RTMP_REG_PAIR MT76x0_BBP_Init_Tab[] = {
{CORE_R1, 0x00000002},
{CORE_R4, 0x00000000},
{CORE_R24, 0x00000000},
{CORE_R32, 0x4003000a},
{CORE_R42, 0x00000000},
{CORE_R44, 0x00000000},
#if 0
(0x212C)disable Tx fifo empty check to avoid hang issue - MT7650E3_BBP_CR_20121225.xls
#endif
{IBI_R11, 0x00000080},
/*
0x2300[5] Default Antenna:
0 for WIFI main antenna
1 for WIFI aux antenna
*/
{AGC1_R0, 0x00021400},
{AGC1_R1, 0x00000003},
{AGC1_R2, 0x003A6464},
{AGC1_R15, 0x88A28CB8},
{AGC1_R22, 0x00001E21},
{AGC1_R23, 0x0000272C},
{AGC1_R24, 0x00002F3A},
{AGC1_R25, 0x8000005A},
{AGC1_R33, 0x00003218},
{AGC1_R34, 0x000A0C0C},
{AGC1_R37, 0x2121262C},
{AGC1_R41, 0x38383E45},
{AGC1_R57, 0x00001010},
{AGC1_R59, 0xBAA20E96},
{AGC1_R63, 0x00000001},
{TXC_R0, 0x00280403},
{TXC_R1, 0x00000000},
{TXC_R2, 0x00005555},
{RXC_R1, 0x00000012},
{RXC_R2, 0x00000011},
{RXC_R3, 0x00000005},
{RXC_R4, 0x00000000},
{RXC_R5, 0xF977C4EC},
{RXC_R7, 0x00000090},
{TXO_R8, 0x00000000},
{TXBE_R0, 0x00000000},
{TXBE_R4, 0x00000004},
{TXBE_R6, 0x00000000},
{TXBE_R8, 0x00000014},
{TXBE_R9, 0x20000000},
{TXBE_R10, 0x00000000},
{TXBE_R12, 0x00000000},
{TXBE_R13, 0x00000000},
{TXBE_R14, 0x00000000},
{TXBE_R15, 0x00000000},
{TXBE_R16, 0x00000000},
{TXBE_R17, 0x00000000},
{RXFE_R0, 0x895000E0}, // TODO: This value is for 5G. 2G has different setting.
//{RXFE_R0, 0x005000E0},
{RXFE_R1, 0x00008800}, /* Add for E3 */
{RXFE_R3, 0x00000000},
{RXFE_R4, 0x00000000},
{RXO_R13, 0x00000092},
{RXO_R14, 0x00060612},
{RXO_R15, 0xC8321B18},
{RXO_R16, 0x0000001E},
{RXO_R17, 0x00000000},
{RXO_R18, 0xCC00A993},
{RXO_R19, 0xB9CB9CB9},
{RXO_R21, 0x00000001},
{RXO_R24, 0x00000006},
{RXO_R28, 0x0000003F},
};
static unsigned char MT76x0_BBP_Init_Tab_Size = (sizeof(MT76x0_BBP_Init_Tab) / sizeof(RTMP_REG_PAIR));
MT76x0_BBP_Table MT76x0_BPP_SWITCH_Tab[] = {
{RF_G_BAND | RF_BW_20 | RF_BW_40, {AGC1_R4, 0x1FEDA049}},
{RF_A_BAND | RF_BW_20 | RF_BW_40 | RF_BW_80, {AGC1_R4, 0x1FECA054}},
{RF_G_BAND | RF_BW_20 | RF_BW_40, {AGC1_R6, 0x00000045}},
{RF_A_BAND | RF_BW_20 | RF_BW_40 | RF_BW_80, {AGC1_R6, 0x0000000A}},
{RF_G_BAND | RF_BW_20, {AGC1_R8, 0x16343EF0}},
{RF_G_BAND | RF_BW_40, {AGC1_R8, 0x16343EF0}},
{RF_A_BAND | RF_BW_20, {AGC1_R8, 0x122C54F2}},
{RF_A_BAND | RF_BW_40, {AGC1_R8, 0x122C54F2}},
{RF_A_BAND | RF_BW_80, {AGC1_R8, 0x122C54F2}},
{RF_G_BAND | RF_BW_20, {AGC1_R12, 0x05052879}},
{RF_G_BAND | RF_BW_40, {AGC1_R12, 0x050528F9}},
{RF_A_BAND | RF_BW_20 | RF_BW_40 | RF_BW_80, {AGC1_R12, 0x050528F9}},
{RF_G_BAND | RF_BW_20, {AGC1_R13, 0x35050004}},
{RF_G_BAND | RF_BW_40, {AGC1_R13, 0x35050004}},
{RF_A_BAND | RF_BW_20 | RF_BW_40 | RF_BW_80, {AGC1_R13, 0x2C3A0406}},
{RF_G_BAND | RF_BW_20 | RF_BW_40, {AGC1_R14, 0x310F2E3C}},
{RF_A_BAND | RF_BW_20, {AGC1_R14, 0x310F2A3F}},
{RF_A_BAND | RF_BW_40 | RF_BW_80, {AGC1_R14, 0x310F2A3F}},
{RF_G_BAND | RF_BW_20 | RF_BW_40, {AGC1_R26, 0x007C2005}},
{RF_A_BAND | RF_BW_20 | RF_BW_40 | RF_BW_80, {AGC1_R26, 0x007C2005}},
{RF_G_BAND | RF_BW_20 | RF_BW_40, {AGC1_R27, 0x000000E1}},
{RF_A_BAND | RF_BW_20 | RF_BW_40 | RF_BW_80, {AGC1_R27, 0x000000EC}},
{RF_G_BAND | RF_BW_20, {AGC1_R28, 0x00060806}},
{RF_G_BAND | RF_BW_40, {AGC1_R28, 0x00050806}},
{RF_A_BAND | RF_BW_40, {AGC1_R28, 0x00060801}},
{RF_A_BAND | RF_BW_20 | RF_BW_80, {AGC1_R28, 0x00060806}},
{RF_G_BAND | RF_BW_20 | RF_BW_40, {AGC1_R31, 0x00000F23}},
{RF_A_BAND | RF_BW_20 | RF_BW_40 | RF_BW_80, {AGC1_R31, 0x00000F13}},
{RF_G_BAND | RF_BW_20 | RF_BW_40, {AGC1_R32, 0x00003218}},
{RF_A_BAND | RF_BW_20 | RF_BW_40 | RF_BW_80, {AGC1_R32, 0x0000181C}},
{RF_G_BAND | RF_BW_20, {AGC1_R35, 0x11111616}},
{RF_G_BAND | RF_BW_40, {AGC1_R35, 0x11111516}},
{RF_A_BAND | RF_BW_20 | RF_BW_40 | RF_BW_80, {AGC1_R35, 0x11111116}},
{RF_G_BAND | RF_BW_20, {AGC1_R39, 0x2A2A3036}},
{RF_G_BAND | RF_BW_40, {AGC1_R39, 0x2A2A2C36}},
{RF_A_BAND | RF_BW_20, {AGC1_R39, 0x2A2A3036}},
{RF_A_BAND | RF_BW_40 , {AGC1_R39, 0x2A2A3036}},
{RF_A_BAND | RF_BW_80, {AGC1_R39, 0x2A2A2A36}},
{RF_G_BAND | RF_BW_20, {AGC1_R43, 0x27273438}},
{RF_G_BAND | RF_BW_40, {AGC1_R43, 0x27272D38}},
{RF_A_BAND | RF_BW_20 | RF_BW_40 | RF_BW_80, {AGC1_R43, 0x27272B30}},
{RF_G_BAND | RF_BW_20 | RF_BW_40, {AGC1_R51, 0x17171C1C}},
{RF_A_BAND | RF_BW_20 | RF_BW_40 | RF_BW_80, {AGC1_R51, 0xFFFFFFFF}},
{RF_G_BAND | RF_BW_20, {AGC1_R53, 0x26262A2F}},
{RF_G_BAND | RF_BW_40, {AGC1_R53, 0x2626322F}},
{RF_A_BAND | RF_BW_20 | RF_BW_40 | RF_BW_80, {AGC1_R53, 0xFFFFFFFF}},
{RF_G_BAND | RF_BW_20, {AGC1_R55, 0x40404E58}},
{RF_G_BAND | RF_BW_40, {AGC1_R55, 0x40405858}},
{RF_A_BAND | RF_BW_20 | RF_BW_40 | RF_BW_80, {AGC1_R55, 0xFFFFFFFF}},
{RF_G_BAND | RF_BW_20 | RF_BW_40, {AGC1_R58, 0x00001010}},
{RF_A_BAND | RF_BW_20 | RF_BW_40 | RF_BW_80, {AGC1_R58, 0x00000000}},
};
unsigned char MT76x0_BPP_SWITCH_Tab_Size = (sizeof(MT76x0_BPP_SWITCH_Tab) / sizeof(MT76x0_BBP_Table));
static RTMP_REG_PAIR MT76x0_DCOC_Tab[] = {
{CAL_R47, 0x000010F0},
{CAL_R48, 0x00008080},
{CAL_R49, 0x00000F07},
{CAL_R50, 0x00000040},
{CAL_R51, 0x00000404},
{CAL_R52, 0x00080803},
{CAL_R53, 0x00000704},
{CAL_R54, 0x00002828},
//{CAL_R54, 0x00008080},
{CAL_R55, 0x00005050},
};
static unsigned char MT76x0_DCOC_Tab_Size = (sizeof(MT76x0_DCOC_Tab) / sizeof(RTMP_REG_PAIR));
typedef struct _BANK_RF_REG_PAIR {
unsigned char Bank;
unsigned char Register;
unsigned char Value;
} BANK_RF_REG_PAIR, *PBANK_RF_REG_PAIR;
typedef struct _RT6590_RF_SWITCH_ITEM {
unsigned char Bank;
unsigned char Register;
unsigned int BwBand; /* (BW_20, BW_40, BW_80) | (G_Band, A_Band_LB, A_Band_MB, A_Band_HB) */
unsigned char Value;
} MT76x0_RF_SWITCH_ITEM, *PMT76x0_RF_SWITCH_ITEM;
typedef struct _MT76x0_FREQ_ITEM {
unsigned char Channel;
unsigned int Band;
unsigned char pllR37;
unsigned char pllR36;
unsigned char pllR35;
unsigned char pllR34;
unsigned char pllR33;
unsigned char pllR32_b7b5;
unsigned char pllR32_b4b0; /* PLL_DEN */
unsigned char pllR31_b7b5;
unsigned char pllR31_b4b0; /* PLL_K */
unsigned char pllR30_b7; /* sdm_reset_n */
unsigned char pllR30_b6b2; /* sdmmash_prbs,sin */
unsigned char pllR30_b1; /* sdm_bp */
unsigned short pll_n; /* R30<0>, R29<7:0> (hex) */
unsigned char pllR28_b7b6; /* isi,iso */
unsigned char pllR28_b5b4; /* pfd_dly */
unsigned char pllR28_b3b2; /* clksel option */
unsigned int Pll_sdm_k; /* R28<1:0>, R27<7:0>, R26<7:0> (hex) SDM_k */
unsigned char pllR24_b1b0; /* xo_div */
} MT76x0_FREQ_ITEM;
/* Bank Register Value(Hex) */
static BANK_RF_REG_PAIR MT76x0_RF_Central_RegTb[] = {
/*
Bank 0 - For central blocks: BG, PLL, XTAL, LO, ADC/DAC
*/
{RF_BANK0, RF_R01, 0x01},
{RF_BANK0, RF_R02, 0x11},
/*
R3 ~ R7: VCO Cal.
*/
{RF_BANK0, RF_R03, 0x70}, /* VCO Freq Cal - No Bypass, VCO Amp Cal - No Bypass */
{RF_BANK0, RF_R04, 0x30}, /* R4 b<7>=1, VCO cal */
{RF_BANK0, RF_R05, 0x00},
{RF_BANK0, RF_R06, 0x41}, /* Set the open loop amplitude to middle since bypassing amplitude calibration */
{RF_BANK0, RF_R07, 0x00},
/*
XO
*/
{RF_BANK0, RF_R08, 0x00},
{RF_BANK0, RF_R09, 0x00},
{RF_BANK0, RF_R10, 0x0C},
{RF_BANK0, RF_R11, 0x00},
{RF_BANK0, RF_R12, 0x00},
/*
BG
*/
{RF_BANK0, RF_R13, 0x00},
{RF_BANK0, RF_R14, 0x00},
{RF_BANK0, RF_R15, 0x00},
/*
LDO
*/
{RF_BANK0, RF_R19, 0x20},
/*
XO
*/
{RF_BANK0, RF_R20, 0x22},
{RF_BANK0, RF_R21, 0x12},
#if 0
{RF_BANK0, RF_R22, 0x26/*0x3F*/}, /* XTAL Freq offset, varies */
#endif
{RF_BANK0, RF_R23, 0x00},
{RF_BANK0, RF_R24, 0x33}, /* See band selection for R24<1:0> */
{RF_BANK0, RF_R25, 0x00},
/*
PLL, See Freq Selection
*/
{RF_BANK0, RF_R26, 0x00},
{RF_BANK0, RF_R27, 0x00},
{RF_BANK0, RF_R28, 0x00},
{RF_BANK0, RF_R29, 0x00},
{RF_BANK0, RF_R30, 0x00},
{RF_BANK0, RF_R31, 0x00},
{RF_BANK0, RF_R32, 0x00},
{RF_BANK0, RF_R33, 0x00},
{RF_BANK0, RF_R34, 0x00},
{RF_BANK0, RF_R35, 0x00},
{RF_BANK0, RF_R36, 0x00},
{RF_BANK0, RF_R37, 0x00},
/*
LO Buffer
*/
{RF_BANK0, RF_R38, 0x2F},
/*
Test Ports
*/
{RF_BANK0, RF_R64, 0x00},
{RF_BANK0, RF_R65, 0x80},
{RF_BANK0, RF_R66, 0x01},
{RF_BANK0, RF_R67, 0x04},
/*
ADC/DAC
*/
{RF_BANK0, RF_R68, 0x00},
{RF_BANK0, RF_R69, 0x08},
{RF_BANK0, RF_R70, 0x08},
{RF_BANK0, RF_R71, 0x40},
{RF_BANK0, RF_R72, 0xD0},
{RF_BANK0, RF_R73, 0x93},
};
static unsigned int MT76x0_RF_Central_RegTb_Size = (sizeof(MT76x0_RF_Central_RegTb) / sizeof(BANK_RF_REG_PAIR));
static BANK_RF_REG_PAIR MT76x0_RF_2G_Channel_0_RegTb[] = {
/*
Bank 5 - Channel 0 2G RF registers
*/
/*
RX logic operation
*/
/* RF_R00 Change in SelectBand6590 */
{RF_BANK5, RF_R02, 0x1D}, /* 0x1D: 5G+2G+BT(MT7650E), 0x0C: 5G+2G(MT7610U) */
{RF_BANK5, RF_R03, 0x00},
/*
TX logic operation
*/
{RF_BANK5, RF_R04, 0x00},
{RF_BANK5, RF_R05, 0x84},
{RF_BANK5, RF_R06, 0x02},
/*
LDO
*/
{RF_BANK5, RF_R07, 0x00},
{RF_BANK5, RF_R08, 0x00},
{RF_BANK5, RF_R09, 0x00},
/*
RX
*/
{RF_BANK5, RF_R10, 0x51},
{RF_BANK5, RF_R11, 0x22},
{RF_BANK5, RF_R12, 0x22},
{RF_BANK5, RF_R13, 0x0F},
{RF_BANK5, RF_R14, 0x47}, /* Increase mixer current for more gain */
{RF_BANK5, RF_R15, 0x25},
{RF_BANK5, RF_R16, 0xC7}, /* Tune LNA2 tank */
{RF_BANK5, RF_R17, 0x00},
{RF_BANK5, RF_R18, 0x00},
{RF_BANK5, RF_R19, 0x30}, /* Improve max Pin */
{RF_BANK5, RF_R20, 0x33},
{RF_BANK5, RF_R21, 0x02},
{RF_BANK5, RF_R22, 0x32}, /* Tune LNA1 tank */
{RF_BANK5, RF_R23, 0x00},
{RF_BANK5, RF_R24, 0x25},
#if 0 /* R25 is used for BT. Let BT driver write it. */
{RF_BANK5, RF_R25, 0x13},
#endif
{RF_BANK5, RF_R26, 0x00},
{RF_BANK5, RF_R27, 0x12},
{RF_BANK5, RF_R28, 0x0F},
{RF_BANK5, RF_R29, 0x00},
/*
LOGEN
*/
{RF_BANK5, RF_R30, 0x51}, /* Tune LOGEN tank */
{RF_BANK5, RF_R31, 0x35},
{RF_BANK5, RF_R32, 0x31},
{RF_BANK5, RF_R33, 0x31},
{RF_BANK5, RF_R34, 0x34},
{RF_BANK5, RF_R35, 0x03},
{RF_BANK5, RF_R36, 0x00},
/*
TX
*/
{RF_BANK5, RF_R37, 0xDD}, /* Improve 3.2GHz spur */
{RF_BANK5, RF_R38, 0xB3},
{RF_BANK5, RF_R39, 0x33},
{RF_BANK5, RF_R40, 0xB1},
{RF_BANK5, RF_R41, 0x71},
{RF_BANK5, RF_R42, 0xF2},
{RF_BANK5, RF_R43, 0x47},
{RF_BANK5, RF_R44, 0x77},
{RF_BANK5, RF_R45, 0x0E},
{RF_BANK5, RF_R46, 0x10},
{RF_BANK5, RF_R47, 0x00},
{RF_BANK5, RF_R48, 0x53},
{RF_BANK5, RF_R49, 0x03},
{RF_BANK5, RF_R50, 0xEF},
{RF_BANK5, RF_R51, 0xC7},
{RF_BANK5, RF_R52, 0x62},
{RF_BANK5, RF_R53, 0x62},
{RF_BANK5, RF_R54, 0x00},
{RF_BANK5, RF_R55, 0x00},
{RF_BANK5, RF_R56, 0x0F},
{RF_BANK5, RF_R57, 0x0F},
{RF_BANK5, RF_R58, 0x16},
{RF_BANK5, RF_R59, 0x16},
{RF_BANK5, RF_R60, 0x10},
{RF_BANK5, RF_R61, 0x10},
{RF_BANK5, RF_R62, 0xD0},
{RF_BANK5, RF_R63, 0x6C},
{RF_BANK5, RF_R64, 0x58},
{RF_BANK5, RF_R65, 0x58},
{RF_BANK5, RF_R66, 0xF2},
{RF_BANK5, RF_R67, 0xE8},
{RF_BANK5, RF_R68, 0xF0},
{RF_BANK5, RF_R69, 0xF0},
{RF_BANK5, RF_R127, 0x04},
};
static unsigned int MT76x0_RF_2G_Channel_0_RegTb_Size = (sizeof(MT76x0_RF_2G_Channel_0_RegTb) / sizeof(BANK_RF_REG_PAIR));
static BANK_RF_REG_PAIR MT76x0_RF_5G_Channel_0_RegTb[] = {
/*
Bank 6 - Channel 0 5G RF registers
*/
/*
RX logic operation
*/
/* RF_R00 Change in SelectBandMT76x0 */
{RF_BANK6, RF_R02, 0x0C},
{RF_BANK6, RF_R03, 0x00},
/*
TX logic operation
*/
{RF_BANK6, RF_R04, 0x00},
{RF_BANK6, RF_R05, 0x84},
{RF_BANK6, RF_R06, 0x02},
/*
LDO
*/
{RF_BANK6, RF_R07, 0x00},
{RF_BANK6, RF_R08, 0x00},
{RF_BANK6, RF_R09, 0x00},
/*
RX
*/
{RF_BANK6, RF_R10, 0x00},
{RF_BANK6, RF_R11, 0x01},
{RF_BANK6, RF_R13, 0x23},
{RF_BANK6, RF_R14, 0x00},
{RF_BANK6, RF_R15, 0x04},
{RF_BANK6, RF_R16, 0x22},
{RF_BANK6, RF_R18, 0x08},
{RF_BANK6, RF_R19, 0x00},
{RF_BANK6, RF_R20, 0x00},
{RF_BANK6, RF_R21, 0x00},
{RF_BANK6, RF_R22, 0xFB},
/*
LOGEN5G
*/
{RF_BANK6, RF_R25, 0x76},
{RF_BANK6, RF_R26, 0x24},
{RF_BANK6, RF_R27, 0x04},
{RF_BANK6, RF_R28, 0x00},
{RF_BANK6, RF_R29, 0x00},
/*
TX
*/
{RF_BANK6, RF_R37, 0xBB},
{RF_BANK6, RF_R38, 0xB3},
{RF_BANK6, RF_R40, 0x33},
{RF_BANK6, RF_R41, 0x33},
{RF_BANK6, RF_R43, 0x03},
{RF_BANK6, RF_R44, 0xB3},
{RF_BANK6, RF_R46, 0x17},
{RF_BANK6, RF_R47, 0x0E},
{RF_BANK6, RF_R48, 0x10},
{RF_BANK6, RF_R49, 0x07},
{RF_BANK6, RF_R62, 0x00},
{RF_BANK6, RF_R63, 0x00},
{RF_BANK6, RF_R64, 0xF1},
{RF_BANK6, RF_R65, 0x0F},
};
static unsigned int MT76x0_RF_5G_Channel_0_RegTb_Size = (sizeof(MT76x0_RF_5G_Channel_0_RegTb) / sizeof(BANK_RF_REG_PAIR));
static BANK_RF_REG_PAIR MT76x0_RF_VGA_Channel_0_RegTb[] = {
/*
Bank 7 - Channel 0 VGA RF registers
*/
#if 0
/* E2 0924 */
{RF_BANK7, RF_R00, 0x7F}, /* Allow BBP/MAC to do calibration */
#else
/* E3 CR */
{RF_BANK7, RF_R00, 0x47}, /* Allow BBP/MAC to do calibration */
#endif
{RF_BANK7, RF_R01, 0x00},
{RF_BANK7, RF_R02, 0x00},
{RF_BANK7, RF_R03, 0x00},
{RF_BANK7, RF_R04, 0x00},
{RF_BANK7, RF_R10, 0x13},
{RF_BANK7, RF_R11, 0x0F},
{RF_BANK7, RF_R12, 0x13}, /* For DCOC */
{RF_BANK7, RF_R13, 0x13}, /* For DCOC */
{RF_BANK7, RF_R14, 0x13}, /* For DCOC */
{RF_BANK7, RF_R15, 0x20}, /* For DCOC */
{RF_BANK7, RF_R16, 0x22}, /* For DCOC */
{RF_BANK7, RF_R17, 0x7C},
{RF_BANK7, RF_R18, 0x00},
{RF_BANK7, RF_R19, 0x00},
{RF_BANK7, RF_R20, 0x00},
{RF_BANK7, RF_R21, 0xF1},
{RF_BANK7, RF_R22, 0x11},
{RF_BANK7, RF_R23, 0xC2},
{RF_BANK7, RF_R24, 0x41},
{RF_BANK7, RF_R25, 0x20},
{RF_BANK7, RF_R26, 0x40},
{RF_BANK7, RF_R27, 0xD7},
{RF_BANK7, RF_R28, 0xA2},
{RF_BANK7, RF_R29, 0x60},
{RF_BANK7, RF_R30, 0x49},
{RF_BANK7, RF_R31, 0x20},
{RF_BANK7, RF_R32, 0x44},
{RF_BANK7, RF_R33, 0xC1},
{RF_BANK7, RF_R34, 0x60},
{RF_BANK7, RF_R35, 0xC0},
{RF_BANK7, RF_R61, 0x01},
{RF_BANK7, RF_R72, 0x3C},
{RF_BANK7, RF_R73, 0x34},
{RF_BANK7, RF_R74, 0x00},
};
static unsigned int MT76x0_RF_VGA_Channel_0_RegTb_Size = (sizeof(MT76x0_RF_VGA_Channel_0_RegTb) / sizeof(BANK_RF_REG_PAIR));
static const MT76x0_RF_SWITCH_ITEM MT76x0_RF_BW_Switch[] =
{
/* Bank, Register, Bw/Band, Value */
{RF_BANK0, RF_R17, RF_G_BAND | BW_20, 0x00},
{RF_BANK0, RF_R17, RF_G_BAND | BW_40, 0x00},
{RF_BANK0, RF_R17, RF_A_BAND | BW_20, 0x00},
{RF_BANK0, RF_R17, RF_A_BAND | BW_40, 0x00},
{RF_BANK0, RF_R17, RF_A_BAND | BW_80, 0x00},
// TODO: need to check B7.R6 & B7.R7 setting for 2.4G again @20121112
{RF_BANK7, RF_R06, RF_G_BAND | BW_20, 0x40},
{RF_BANK7, RF_R06, RF_G_BAND | BW_40, 0x1C},
{RF_BANK7, RF_R06, RF_A_BAND | BW_20, 0x40},
{RF_BANK7, RF_R06, RF_A_BAND | BW_40, 0x20},
{RF_BANK7, RF_R06, RF_A_BAND | BW_80, 0x10},
{RF_BANK7, RF_R07, RF_G_BAND | BW_20, 0x40},
{RF_BANK7, RF_R07, RF_G_BAND | BW_40, 0x20},
{RF_BANK7, RF_R07, RF_A_BAND | BW_20, 0x40},
{RF_BANK7, RF_R07, RF_A_BAND | BW_40, 0x20},
{RF_BANK7, RF_R07, RF_A_BAND | BW_80, 0x10},
{RF_BANK7, RF_R08, RF_G_BAND | BW_20, 0x03},
{RF_BANK7, RF_R08, RF_G_BAND | BW_40, 0x01},
{RF_BANK7, RF_R08, RF_A_BAND | BW_20, 0x03},
{RF_BANK7, RF_R08, RF_A_BAND | BW_40, 0x01},
{RF_BANK7, RF_R08, RF_A_BAND | BW_80, 0x00},
// TODO: need to check B7.R58 & B7.R59 setting for 2.4G again @20121112
{RF_BANK7, RF_R58, RF_G_BAND | BW_20, 0x40},
{RF_BANK7, RF_R58, RF_G_BAND | BW_40, 0x40},
{RF_BANK7, RF_R58, RF_A_BAND | BW_20, 0x40},
{RF_BANK7, RF_R58, RF_A_BAND | BW_40, 0x40},
{RF_BANK7, RF_R58, RF_A_BAND | BW_80, 0x10},
{RF_BANK7, RF_R59, RF_G_BAND | BW_20, 0x40},
{RF_BANK7, RF_R59, RF_G_BAND | BW_40, 0x40},
{RF_BANK7, RF_R59, RF_A_BAND | BW_20, 0x40},
{RF_BANK7, RF_R59, RF_A_BAND | BW_40, 0x40},
{RF_BANK7, RF_R59, RF_A_BAND | BW_80, 0x10},
{RF_BANK7, RF_R60, RF_G_BAND | BW_20, 0xAA},
{RF_BANK7, RF_R60, RF_G_BAND | BW_40, 0xAA},
{RF_BANK7, RF_R60, RF_A_BAND | BW_20, 0xAA},
{RF_BANK7, RF_R60, RF_A_BAND | BW_40, 0xAA},
{RF_BANK7, RF_R60, RF_A_BAND | BW_80, 0xAA},
{RF_BANK7, RF_R76, BW_20, 0x40},
{RF_BANK7, RF_R76, BW_40, 0x40},
{RF_BANK7, RF_R76, BW_80, 0x10},
{RF_BANK7, RF_R77, BW_20, 0x40},
{RF_BANK7, RF_R77, BW_40, 0x40},
{RF_BANK7, RF_R77, BW_80, 0x10},
};
unsigned char MT76x0_RF_BW_Switch_Size = (sizeof(MT76x0_RF_BW_Switch) / sizeof(MT76x0_RF_SWITCH_ITEM));
static const MT76x0_RF_SWITCH_ITEM MT76x0_RF_Band_Switch[] =
{
/* Bank, Register, Bw/Band, Value */
{RF_BANK0, RF_R16, RF_G_BAND, 0x20},
{RF_BANK0, RF_R16, RF_A_BAND, 0x20},
{RF_BANK0, RF_R18, RF_G_BAND, 0x00},
{RF_BANK0, RF_R18, RF_A_BAND, 0x00},
{RF_BANK0, RF_R39, RF_G_BAND, 0x36},
{RF_BANK0, RF_R39, RF_A_BAND_LB, 0x34},
{RF_BANK0, RF_R39, RF_A_BAND_MB, 0x33},
{RF_BANK0, RF_R39, RF_A_BAND_HB, 0x31},
{RF_BANK0, RF_R39, RF_A_BAND_11J, 0x36},
{RF_BANK6, RF_R12, RF_A_BAND_LB, 0x44},
{RF_BANK6, RF_R12, RF_A_BAND_MB, 0x44},
{RF_BANK6, RF_R12, RF_A_BAND_HB, 0x55},
{RF_BANK6, RF_R12, RF_A_BAND_11J, 0x44},
{RF_BANK6, RF_R17, RF_A_BAND_LB, 0x02},
{RF_BANK6, RF_R17, RF_A_BAND_MB, 0x00},
{RF_BANK6, RF_R17, RF_A_BAND_HB, 0x00},
{RF_BANK6, RF_R17, RF_A_BAND_11J, 0x01},
{RF_BANK6, RF_R24, RF_A_BAND_LB, 0x71},
{RF_BANK6, RF_R24, RF_A_BAND_MB, 0x41},
{RF_BANK6, RF_R24, RF_A_BAND_HB, 0x01},
{RF_BANK6, RF_R24, RF_A_BAND_11J, 0xC1},
{RF_BANK6, RF_R39, RF_A_BAND_LB, 0x36},
{RF_BANK6, RF_R39, RF_A_BAND_MB, 0x34},
{RF_BANK6, RF_R39, RF_A_BAND_HB, 0x32},
{RF_BANK6, RF_R39, RF_A_BAND_11J, 0x37},
/* Move R6-R45, R50~R59 to MT76x0_RF_INT_PA_5G_Channel_0_RegTb/MT76x0_RF_EXT_PA_5G_Channel_0_RegTb */
{RF_BANK6, RF_R127, RF_G_BAND, 0x84},
{RF_BANK6, RF_R127, RF_A_BAND, 0x04},
{RF_BANK7, RF_R05, RF_G_BAND, 0x40},
{RF_BANK7, RF_R05, RF_A_BAND, 0x00},
{RF_BANK7, RF_R09, RF_G_BAND, 0x00},
{RF_BANK7, RF_R09, RF_A_BAND, 0x00},
{RF_BANK7, RF_R70, RF_G_BAND, 0x00},
{RF_BANK7, RF_R70, RF_A_BAND, 0x6D},
{RF_BANK7, RF_R71, RF_G_BAND, 0x00},
{RF_BANK7, RF_R71, RF_A_BAND, 0xB0},
{RF_BANK7, RF_R78, RF_G_BAND, 0x00},
{RF_BANK7, RF_R78, RF_A_BAND, 0x55},
{RF_BANK7, RF_R79, RF_G_BAND, 0x00},
{RF_BANK7, RF_R79, RF_A_BAND, 0x55},
};
unsigned int MT76x0_RF_Band_Switch_Size = (sizeof(MT76x0_RF_Band_Switch) / sizeof(MT76x0_RF_SWITCH_ITEM));
static const MT76x0_FREQ_ITEM MT76x0_Frequency_Plan[] =
{
{1, RF_G_BAND, 0x02, 0x3F, 0x28, 0xDD, 0xE2, 0x40, 0x02, 0x40, 0x02, 0, 0, 1, 0x28, 0, 0x30, 0, 0, 0x3}, /* Freq 2412 */
{2, RF_G_BAND, 0x02, 0x3F, 0x3C, 0xDD, 0xE4, 0x40, 0x07, 0x40, 0x02, 0, 0, 1, 0xA1, 0, 0x30, 0, 0, 0x1}, /* Freq 2417 */
{3, RF_G_BAND, 0x02, 0x3F, 0x3C, 0xDD, 0xE2, 0x40, 0x07, 0x40, 0x0B, 0, 0, 1, 0x50, 0, 0x30, 0, 0, 0x0}, /* Freq 2422 */
{4, RF_G_BAND, 0x02, 0x3F, 0x28, 0xDD, 0xD4, 0x40, 0x02, 0x40, 0x09, 0, 0, 1, 0x50, 0, 0x30, 0, 0, 0x0}, /* Freq 2427 */
{5, RF_G_BAND, 0x02, 0x3F, 0x3C, 0xDD, 0xD4, 0x40, 0x07, 0x40, 0x02, 0, 0, 1, 0xA2, 0, 0x30, 0, 0, 0x1}, /* Freq 2432 */
{6, RF_G_BAND, 0x02, 0x3F, 0x3C, 0xDD, 0xD4, 0x40, 0x07, 0x40, 0x07, 0, 0, 1, 0xA2, 0, 0x30, 0, 0, 0x1}, /* Freq 2437 */
{7, RF_G_BAND, 0x02, 0x3F, 0x28, 0xDD, 0xE2, 0x40, 0x02, 0x40, 0x07, 0, 0, 1, 0x28, 0, 0x30, 0, 0, 0x3}, /* Freq 2442 */
{8, RF_G_BAND, 0x02, 0x3F, 0x3C, 0xDD, 0xD4, 0x40, 0x07, 0x40, 0x02, 0, 0, 1, 0xA3, 0, 0x30, 0, 0, 0x1}, /* Freq 2447 */
{9, RF_G_BAND, 0x02, 0x3F, 0x3C, 0xDD, 0xF2, 0x40, 0x07, 0x40, 0x0D, 0, 0, 1, 0x28, 0, 0x30, 0, 0, 0x3}, /* Freq 2452 */
{10, RF_G_BAND, 0x02, 0x3F, 0x28, 0xDD, 0xD4, 0x40, 0x02, 0x40, 0x09, 0, 0, 1, 0x51, 0, 0x30, 0, 0, 0x0}, /* Freq 2457 */
{11, RF_G_BAND, 0x02, 0x3F, 0x3C, 0xDD, 0xD4, 0x40, 0x07, 0x40, 0x02, 0, 0, 1, 0xA4, 0, 0x30, 0, 0, 0x1}, /* Freq 2462 */
{12, RF_G_BAND, 0x02, 0x3F, 0x3C, 0xDD, 0xD4, 0x40, 0x07, 0x40, 0x07, 0, 0, 1, 0xA4, 0, 0x30, 0, 0, 0x1}, /* Freq 2467 */
{13, RF_G_BAND, 0x02, 0x3F, 0x28, 0xDD, 0xF2, 0x40, 0x02, 0x40, 0x02, 0, 0, 1, 0x29, 0, 0x30, 0, 0, 0x3}, /* Freq 2472 */
{14, RF_G_BAND, 0x02, 0x3F, 0x28, 0xDD, 0xF2, 0x40, 0x02, 0x40, 0x04, 0, 0, 1, 0x29, 0, 0x30, 0, 0, 0x3}, /* Freq 2484 */
{183, (RF_A_BAND | RF_A_BAND_11J), 0x02, 0x3F, 0x70, 0xDD, 0xD2, 0x40, 0x10, 0x40, 0x17, 0, 0, 1, 0x28, 0, 0x30, 0, 0, 0x3}, /* Freq 4915 */
{184, (RF_A_BAND | RF_A_BAND_11J), 0x02, 0x3F, 0x68, 0xDD, 0xD2, 0x40, 0x10, 0x40, 0x00, 0, 0, 1, 0x29, 0, 0x30, 0, 0, 0x3}, /* Freq 4920 */
{185, (RF_A_BAND | RF_A_BAND_11J), 0x02, 0x3F, 0x68, 0xDD, 0xD2, 0x40, 0x10, 0x40, 0x01, 0, 0, 1, 0x29, 0, 0x30, 0, 0, 0x3}, /* Freq 4925 */
{187, (RF_A_BAND | RF_A_BAND_11J), 0x02, 0x3F, 0x68, 0xDD, 0xD2, 0x40, 0x10, 0x40, 0x03, 0, 0, 1, 0x29, 0, 0x30, 0, 0, 0x3}, /* Freq 4935 */
{188, (RF_A_BAND | RF_A_BAND_11J), 0x02, 0x3F, 0x30, 0x97, 0xD2, 0x40, 0x04, 0x40, 0x02, 0, 0, 1, 0x29, 0, 0x30, 0, 0, 0x3}, /* Freq 4940 */
{189, (RF_A_BAND | RF_A_BAND_11J), 0x02, 0x3F, 0x68, 0xDD, 0xD2, 0x40, 0x10, 0x40, 0x05, 0, 0, 1, 0x29, 0, 0x30, 0, 0, 0x3}, /* Freq 4945 */
{192, (RF_A_BAND | RF_A_BAND_11J), 0x02, 0x3F, 0x30, 0x97, 0xD2, 0x40, 0x04, 0x40, 0x04, 0, 0, 1, 0x29, 0, 0x30, 0, 0, 0x3}, /* Freq 4960 */
{196, (RF_A_BAND | RF_A_BAND_11J), 0x02, 0x3F, 0x30, 0x97, 0xD2, 0x40, 0x04, 0x40, 0x06, 0, 0, 1, 0x29, 0, 0x30, 0, 0, 0x3}, /* Freq 4980 */
{36, (RF_A_BAND | RF_A_BAND_LB), 0x02, 0x3F, 0x30, 0x97, 0xD2, 0x40, 0x04, 0x40, 0x02, 0, 0, 1, 0x2B, 0, 0x30, 0, 0, 0x3}, /* Freq 5180 */
{37, (RF_A_BAND | RF_A_BAND_LB), 0x02, 0x3F, 0x68, 0xDD, 0xD2, 0x40, 0x10, 0x40, 0x05, 0, 0, 1, 0x2B, 0, 0x30, 0, 0, 0x3}, /* Freq 5185 */
{38, (RF_A_BAND | RF_A_BAND_LB), 0x02, 0x3F, 0x30, 0x97, 0xD2, 0x40, 0x04, 0x40, 0x03, 0, 0, 1, 0x2B, 0, 0x30, 0, 0, 0x3}, /* Freq 5190 */
{39, (RF_A_BAND | RF_A_BAND_LB), 0x02, 0x3F, 0x68, 0xDD, 0xD2, 0x40, 0x10, 0x40, 0x07, 0, 0, 1, 0x2B, 0, 0x30, 0, 0, 0x3}, /* Freq 5195 */
{40, (RF_A_BAND | RF_A_BAND_LB), 0x02, 0x3F, 0x30, 0x97, 0xD2, 0x40, 0x04, 0x40, 0x04, 0, 0, 1, 0x2B, 0, 0x30, 0, 0, 0x3}, /* Freq 5200 */
{41, (RF_A_BAND | RF_A_BAND_LB), 0x02, 0x3F, 0x68, 0xDD, 0xD2, 0x40, 0x10, 0x40, 0x09, 0, 0, 1, 0x2B, 0, 0x30, 0, 0, 0x3}, /* Freq 5205 */
{42, (RF_A_BAND | RF_A_BAND_LB), 0x02, 0x3F, 0x30, 0xDD, 0xD2, 0x40, 0x04, 0x40, 0x05, 0, 0, 1, 0x2B, 0, 0x30, 0, 0, 0x3}, /* Freq 5210 */
{43, (RF_A_BAND | RF_A_BAND_LB), 0x02, 0x3F, 0x68, 0xDD, 0xD2, 0x40, 0x10, 0x40, 0x0B, 0, 0, 1, 0x2B, 0, 0x30, 0, 0, 0x3}, /* Freq 5215 */
{44, (RF_A_BAND | RF_A_BAND_LB), 0x02, 0x3F, 0x30, 0x97, 0xD2, 0x40, 0x04, 0x40, 0x06, 0, 0, 1, 0x2B, 0, 0x30, 0, 0, 0x3}, /* Freq 5220 */
{45, (RF_A_BAND | RF_A_BAND_LB), 0x02, 0x3F, 0x68, 0xDD, 0xD2, 0x40, 0x10, 0x40, 0x0D, 0, 0, 1, 0x2B, 0, 0x30, 0, 0, 0x3}, /* Freq 5225 */
{46, (RF_A_BAND | RF_A_BAND_LB), 0x02, 0x3F, 0x30, 0xDD, 0xD2, 0x40, 0x04, 0x40, 0x07, 0, 0, 1, 0x2B, 0, 0x30, 0, 0, 0x3}, /* Freq 5230 */
{47, (RF_A_BAND | RF_A_BAND_LB), 0x02, 0x3F, 0x68, 0xDD, 0xD2, 0x40, 0x10, 0x40, 0x0F, 0, 0, 1, 0x2B, 0, 0x30, 0, 0, 0x3}, /* Freq 5235 */
{48, (RF_A_BAND | RF_A_BAND_LB), 0x02, 0x3F, 0x30, 0x97, 0xD2, 0x40, 0x04, 0x40, 0x08, 0, 0, 1, 0x2B, 0, 0x30, 0, 0, 0x3}, /* Freq 5240 */
{49, (RF_A_BAND | RF_A_BAND_LB), 0x02, 0x3F, 0x68, 0xDD, 0xD2, 0x40, 0x10, 0x40, 0x11, 0, 0, 1, 0x2B, 0, 0x30, 0, 0, 0x3}, /* Freq 5245 */
{50, (RF_A_BAND | RF_A_BAND_LB), 0x02, 0x3F, 0x30, 0x97, 0xD2, 0x40, 0x04, 0x40, 0x09, 0, 0, 1, 0x2B, 0, 0x30, 0, 0, 0x3}, /* Freq 5250 */
{51, (RF_A_BAND | RF_A_BAND_LB), 0x02, 0x3F, 0x68, 0xDD, 0xD2, 0x40, 0x10, 0x40, 0x13, 0, 0, 1, 0x2B, 0, 0x30, 0, 0, 0x3}, /* Freq 5255 */
{52, (RF_A_BAND | RF_A_BAND_LB), 0x02, 0x3F, 0x30, 0x97, 0xD2, 0x40, 0x04, 0x40, 0x0A, 0, 0, 1, 0x2B, 0, 0x30, 0, 0, 0x3}, /* Freq 5260 */
{53, (RF_A_BAND | RF_A_BAND_LB), 0x02, 0x3F, 0x68, 0xDD, 0xD2, 0x40, 0x10, 0x40, 0x15, 0, 0, 1, 0x2B, 0, 0x30, 0, 0, 0x3}, /* Freq 5265 */
{54, (RF_A_BAND | RF_A_BAND_LB), 0x02, 0x3F, 0x30, 0xDD, 0xD2, 0x40, 0x04, 0x40, 0x0B, 0, 0, 1, 0x2B, 0, 0x30, 0, 0, 0x3}, /* Freq 5270 */
{55, (RF_A_BAND | RF_A_BAND_LB), 0x02, 0x3F, 0x70, 0xDD, 0xD2, 0x40, 0x10, 0x40, 0x17, 0, 0, 1, 0x2B, 0, 0x30, 0, 0, 0x3}, /* Freq 5275 */
{56, (RF_A_BAND | RF_A_BAND_LB), 0x02, 0x3F, 0x30, 0x97, 0xD2, 0x40, 0x04, 0x40, 0x00, 0, 0, 1, 0x2C, 0, 0x30, 0, 0, 0x3}, /* Freq 5280 */
{57, (RF_A_BAND | RF_A_BAND_LB), 0x02, 0x3F, 0x68, 0xDD, 0xD2, 0x40, 0x10, 0x40, 0x01, 0, 0, 1, 0x2C, 0, 0x30, 0, 0, 0x3}, /* Freq 5285 */
{58, (RF_A_BAND | RF_A_BAND_LB), 0x02, 0x3F, 0x30, 0xDD, 0xD2, 0x40, 0x04, 0x40, 0x01, 0, 0, 1, 0x2C, 0, 0x30, 0, 0, 0x3}, /* Freq 5290 */
{59, (RF_A_BAND | RF_A_BAND_LB), 0x02, 0x3F, 0x68, 0xDD, 0xD2, 0x40, 0x10, 0x40, 0x03, 0, 0, 1, 0x2C, 0, 0x30, 0, 0, 0x3}, /* Freq 5295 */
{60, (RF_A_BAND | RF_A_BAND_LB), 0x02, 0x3F, 0x30, 0x97, 0xD2, 0x40, 0x04, 0x40, 0x02, 0, 0, 1, 0x2C, 0, 0x30, 0, 0, 0x3}, /* Freq 5300 */
{61, (RF_A_BAND | RF_A_BAND_LB), 0x02, 0x3F, 0x68, 0xDD, 0xD2, 0x40, 0x10, 0x40, 0x05, 0, 0, 1, 0x2C, 0, 0x30, 0, 0, 0x3}, /* Freq 5305 */
{62, (RF_A_BAND | RF_A_BAND_LB), 0x02, 0x3F, 0x30, 0x97, 0xD2, 0x40, 0x04, 0x40, 0x03, 0, 0, 1, 0x2C, 0, 0x30, 0, 0, 0x3}, /* Freq 5310 */
{63, (RF_A_BAND | RF_A_BAND_LB), 0x02, 0x3F, 0x68, 0xDD, 0xD2, 0x40, 0x10, 0x40, 0x07, 0, 0, 1, 0x2C, 0, 0x30, 0, 0, 0x3}, /* Freq 5315 */
{64, (RF_A_BAND | RF_A_BAND_LB), 0x02, 0x3F, 0x30, 0x97, 0xD2, 0x40, 0x04, 0x40, 0x04, 0, 0, 1, 0x2C, 0, 0x30, 0, 0, 0x3}, /* Freq 5320 */
{100, (RF_A_BAND | RF_A_BAND_MB), 0x02, 0x3F, 0x30, 0x97, 0xD2, 0x40, 0x04, 0x40, 0x0A, 0, 0, 1, 0x2D, 0, 0x30, 0, 0, 0x3}, /* Freq 5500 */
{101, (RF_A_BAND | RF_A_BAND_MB), 0x02, 0x3F, 0x68, 0xDD, 0xD2, 0x40, 0x10, 0x40, 0x15, 0, 0, 1, 0x2D, 0, 0x30, 0, 0, 0x3}, /* Freq 5505 */
{102, (RF_A_BAND | RF_A_BAND_MB), 0x02, 0x3F, 0x30, 0xDD, 0xD2, 0x40, 0x04, 0x40, 0x0B, 0, 0, 1, 0x2D, 0, 0x30, 0, 0, 0x3}, /* Freq 5510 */
{103, (RF_A_BAND | RF_A_BAND_MB), 0x02, 0x3F, 0x70, 0xDD, 0xD2, 0x40, 0x10, 0x40, 0x17, 0, 0, 1, 0x2D, 0, 0x30, 0, 0, 0x3}, /* Freq 5515 */
{104, (RF_A_BAND | RF_A_BAND_MB), 0x02, 0x3F, 0x30, 0x97, 0xD2, 0x40, 0x04, 0x40, 0x00, 0, 0, 1, 0x2E, 0, 0x30, 0, 0, 0x3}, /* Freq 5520 */
{105, (RF_A_BAND | RF_A_BAND_MB), 0x02, 0x3F, 0x68, 0xDD, 0xD2, 0x40, 0x10, 0x40, 0x01, 0, 0, 1, 0x2E, 0, 0x30, 0, 0, 0x3}, /* Freq 5525 */
{106, (RF_A_BAND | RF_A_BAND_MB), 0x02, 0x3F, 0x30, 0xDD, 0xD2, 0x40, 0x04, 0x40, 0x01, 0, 0, 1, 0x2E, 0, 0x30, 0, 0, 0x3}, /* Freq 5530 */
{107, (RF_A_BAND | RF_A_BAND_MB), 0x02, 0x3F, 0x68, 0xDD, 0xD2, 0x40, 0x10, 0x40, 0x03, 0, 0, 1, 0x2E, 0, 0x30, 0, 0, 0x3}, /* Freq 5535 */
{108, (RF_A_BAND | RF_A_BAND_MB), 0x02, 0x3F, 0x30, 0x97, 0xD2, 0x40, 0x04, 0x40, 0x02, 0, 0, 1, 0x2E, 0, 0x30, 0, 0, 0x3}, /* Freq 5540 */
{109, (RF_A_BAND | RF_A_BAND_MB), 0x02, 0x3F, 0x68, 0xDD, 0xD2, 0x40, 0x10, 0x40, 0x05, 0, 0, 1, 0x2E, 0, 0x30, 0, 0, 0x3}, /* Freq 5545 */
{110, (RF_A_BAND | RF_A_BAND_MB), 0x02, 0x3F, 0x30, 0x97, 0xD2, 0x40, 0x04, 0x40, 0x03, 0, 0, 1, 0x2E, 0, 0x30, 0, 0, 0x3}, /* Freq 5550 */
{111, (RF_A_BAND | RF_A_BAND_MB), 0x02, 0x3F, 0x68, 0xDD, 0xD2, 0x40, 0x10, 0x40, 0x07, 0, 0, 1, 0x2E, 0, 0x30, 0, 0, 0x3}, /* Freq 5555 */
{112, (RF_A_BAND | RF_A_BAND_MB), 0x02, 0x3F, 0x30, 0x97, 0xD2, 0x40, 0x04, 0x40, 0x04, 0, 0, 1, 0x2E, 0, 0x30, 0, 0, 0x3}, /* Freq 5560 */
{113, (RF_A_BAND | RF_A_BAND_MB), 0x02, 0x3F, 0x68, 0xDD, 0xD2, 0x40, 0x10, 0x40, 0x09, 0, 0, 1, 0x2E, 0, 0x30, 0, 0, 0x3}, /* Freq 5565 */
{114, (RF_A_BAND | RF_A_BAND_MB), 0x02, 0x3F, 0x30, 0xDD, 0xD2, 0x40, 0x04, 0x40, 0x05, 0, 0, 1, 0x2E, 0, 0x30, 0, 0, 0x3}, /* Freq 5570 */
{115, (RF_A_BAND | RF_A_BAND_MB), 0x02, 0x3F, 0x68, 0xDD, 0xD2, 0x40, 0x10, 0x40, 0x0B, 0, 0, 1, 0x2E, 0, 0x30, 0, 0, 0x3}, /* Freq 5575 */
{116, (RF_A_BAND | RF_A_BAND_MB), 0x02, 0x3F, 0x30, 0x97, 0xD2, 0x40, 0x04, 0x40, 0x06, 0, 0, 1, 0x2E, 0, 0x30, 0, 0, 0x3}, /* Freq 5580 */
{117, (RF_A_BAND | RF_A_BAND_MB), 0x02, 0x3F, 0x68, 0xDD, 0xD2, 0x40, 0x10, 0x40, 0x0D, 0, 0, 1, 0x2E, 0, 0x30, 0, 0, 0x3}, /* Freq 5585 */
{118, (RF_A_BAND | RF_A_BAND_MB), 0x02, 0x3F, 0x30, 0xDD, 0xD2, 0x40, 0x04, 0x40, 0x07, 0, 0, 1, 0x2E, 0, 0x30, 0, 0, 0x3}, /* Freq 5590 */
{119, (RF_A_BAND | RF_A_BAND_MB), 0x02, 0x3F, 0x68, 0xDD, 0xD2, 0x40, 0x10, 0x40, 0x0F, 0, 0, 1, 0x2E, 0, 0x30, 0, 0, 0x3}, /* Freq 5595 */
{120, (RF_A_BAND | RF_A_BAND_MB), 0x02, 0x3F, 0x30, 0x97, 0xD2, 0x40, 0x04, 0x40, 0x08, 0, 0, 1, 0x2E, 0, 0x30, 0, 0, 0x3}, /* Freq 5600 */
{121, (RF_A_BAND | RF_A_BAND_MB), 0x02, 0x3F, 0x68, 0xDD, 0xD2, 0x40, 0x10, 0x40, 0x11, 0, 0, 1, 0x2E, 0, 0x30, 0, 0, 0x3}, /* Freq 5605 */
{122, (RF_A_BAND | RF_A_BAND_MB), 0x02, 0x3F, 0x30, 0x97, 0xD2, 0x40, 0x04, 0x40, 0x09, 0, 0, 1, 0x2E, 0, 0x30, 0, 0, 0x3}, /* Freq 5610 */
{123, (RF_A_BAND | RF_A_BAND_MB), 0x02, 0x3F, 0x68, 0xDD, 0xD2, 0x40, 0x10, 0x40, 0x13, 0, 0, 1, 0x2E, 0, 0x30, 0, 0, 0x3}, /* Freq 5615 */
{124, (RF_A_BAND | RF_A_BAND_MB), 0x02, 0x3F, 0x30, 0x97, 0xD2, 0x40, 0x04, 0x40, 0x0A, 0, 0, 1, 0x2E, 0, 0x30, 0, 0, 0x3}, /* Freq 5620 */
{125, (RF_A_BAND | RF_A_BAND_MB), 0x02, 0x3F, 0x68, 0xDD, 0xD2, 0x40, 0x10, 0x40, 0x15, 0, 0, 1, 0x2E, 0, 0x30, 0, 0, 0x3}, /* Freq 5625 */
{126, (RF_A_BAND | RF_A_BAND_MB), 0x02, 0x3F, 0x30, 0xDD, 0xD2, 0x40, 0x04, 0x40, 0x0B, 0, 0, 1, 0x2E, 0, 0x30, 0, 0, 0x3}, /* Freq 5630 */
{127, (RF_A_BAND | RF_A_BAND_MB), 0x02, 0x3F, 0x70, 0xDD, 0xD2, 0x40, 0x10, 0x40, 0x17, 0, 0, 1, 0x2E, 0, 0x30, 0, 0, 0x3}, /* Freq 5635 */
{128, (RF_A_BAND | RF_A_BAND_MB), 0x02, 0x3F, 0x30, 0x97, 0xD2, 0x40, 0x04, 0x40, 0x00, 0, 0, 1, 0x2F, 0, 0x30, 0, 0, 0x3}, /* Freq 5640 */
{129, (RF_A_BAND | RF_A_BAND_MB), 0x02, 0x3F, 0x68, 0xDD, 0xD2, 0x40, 0x10, 0x40, 0x01, 0, 0, 1, 0x2F, 0, 0x30, 0, 0, 0x3}, /* Freq 5645 */
{130, (RF_A_BAND | RF_A_BAND_MB), 0x02, 0x3F, 0x30, 0xDD, 0xD2, 0x40, 0x04, 0x40, 0x01, 0, 0, 1, 0x2F, 0, 0x30, 0, 0, 0x3}, /* Freq 5650 */
{131, (RF_A_BAND | RF_A_BAND_MB), 0x02, 0x3F, 0x68, 0xDD, 0xD2, 0x40, 0x10, 0x40, 0x03, 0, 0, 1, 0x2F, 0, 0x30, 0, 0, 0x3}, /* Freq 5655 */
{132, (RF_A_BAND | RF_A_BAND_MB), 0x02, 0x3F, 0x30, 0x97, 0xD2, 0x40, 0x04, 0x40, 0x02, 0, 0, 1, 0x2F, 0, 0x30, 0, 0, 0x3}, /* Freq 5660 */
{133, (RF_A_BAND | RF_A_BAND_MB), 0x02, 0x3F, 0x68, 0xDD, 0xD2, 0x40, 0x10, 0x40, 0x05, 0, 0, 1, 0x2F, 0, 0x30, 0, 0, 0x3}, /* Freq 5665 */
{134, (RF_A_BAND | RF_A_BAND_MB), 0x02, 0x3F, 0x30, 0x97, 0xD2, 0x40, 0x04, 0x40, 0x03, 0, 0, 1, 0x2F, 0, 0x30, 0, 0, 0x3}, /* Freq 5670 */
{135, (RF_A_BAND | RF_A_BAND_MB), 0x02, 0x3F, 0x68, 0xDD, 0xD2, 0x40, 0x10, 0x40, 0x07, 0, 0, 1, 0x2F, 0, 0x30, 0, 0, 0x3}, /* Freq 5675 */
{136, (RF_A_BAND | RF_A_BAND_MB), 0x02, 0x3F, 0x30, 0x97, 0xD2, 0x40, 0x04, 0x40, 0x04, 0, 0, 1, 0x2F, 0, 0x30, 0, 0, 0x3}, /* Freq 5680 */
{137, (RF_A_BAND | RF_A_BAND_HB), 0x02, 0x3F, 0x68, 0xDD, 0xD2, 0x40, 0x10, 0x40, 0x09, 0, 0, 1, 0x2F, 0, 0x30, 0, 0, 0x3}, /* Freq 5685 */
{138, (RF_A_BAND | RF_A_BAND_HB), 0x02, 0x3F, 0x30, 0xDD, 0xD2, 0x40, 0x04, 0x40, 0x05, 0, 0, 1, 0x2F, 0, 0x30, 0, 0, 0x3}, /* Freq 5690 */
{139, (RF_A_BAND | RF_A_BAND_HB), 0x02, 0x3F, 0x68, 0xDD, 0xD2, 0x40, 0x10, 0x40, 0x0B, 0, 0, 1, 0x2F, 0, 0x30, 0, 0, 0x3}, /* Freq 5695 */
{140, (RF_A_BAND | RF_A_BAND_HB), 0x02, 0x3F, 0x30, 0x97, 0xD2, 0x40, 0x04, 0x40, 0x06, 0, 0, 1, 0x2F, 0, 0x30, 0, 0, 0x3}, /* Freq 5700 */
{141, (RF_A_BAND | RF_A_BAND_HB), 0x02, 0x3F, 0x68, 0xDD, 0xD2, 0x40, 0x10, 0x40, 0x0D, 0, 0, 1, 0x2F, 0, 0x30, 0, 0, 0x3}, /* Freq 5705 */
{142, (RF_A_BAND | RF_A_BAND_HB), 0x02, 0x3F, 0x30, 0xDD, 0xD2, 0x40, 0x04, 0x40, 0x07, 0, 0, 1, 0x2F, 0, 0x30, 0, 0, 0x3}, /* Freq 5710 */
{143, (RF_A_BAND | RF_A_BAND_HB), 0x02, 0x3F, 0x68, 0xDD, 0xD2, 0x40, 0x10, 0x40, 0x0F, 0, 0, 1, 0x2F, 0, 0x30, 0, 0, 0x3}, /* Freq 5715 */
{144, (RF_A_BAND | RF_A_BAND_HB), 0x02, 0x3F, 0x30, 0x97, 0xD2, 0x40, 0x04, 0x40, 0x08, 0, 0, 1, 0x2F, 0, 0x30, 0, 0, 0x3}, /* Freq 5720 */
{145, (RF_A_BAND | RF_A_BAND_HB), 0x02, 0x3F, 0x68, 0xDD, 0xD2, 0x40, 0x10, 0x40, 0x11, 0, 0, 1, 0x2F, 0, 0x30, 0, 0, 0x3}, /* Freq 5725 */
{146, (RF_A_BAND | RF_A_BAND_HB), 0x02, 0x3F, 0x30, 0x97, 0xD2, 0x40, 0x04, 0x40, 0x09, 0, 0, 1, 0x2F, 0, 0x30, 0, 0, 0x3}, /* Freq 5730 */
{147, (RF_A_BAND | RF_A_BAND_HB), 0x02, 0x3F, 0x68, 0xDD, 0xD2, 0x40, 0x10, 0x40, 0x13, 0, 0, 1, 0x2F, 0, 0x30, 0, 0, 0x3}, /* Freq 5735 */
{148, (RF_A_BAND | RF_A_BAND_HB), 0x02, 0x3F, 0x30, 0x97, 0xD2, 0x40, 0x04, 0x40, 0x0A, 0, 0, 1, 0x2F, 0, 0x30, 0, 0, 0x3}, /* Freq 5740 */
{149, (RF_A_BAND | RF_A_BAND_HB), 0x02, 0x3F, 0x68, 0xDD, 0xD2, 0x40, 0x10, 0x40, 0x15, 0, 0, 1, 0x2F, 0, 0x30, 0, 0, 0x3}, /* Freq 5745 */
{150, (RF_A_BAND | RF_A_BAND_HB), 0x02, 0x3F, 0x30, 0xDD, 0xD2, 0x40, 0x04, 0x40, 0x0B, 0, 0, 1, 0x2F, 0, 0x30, 0, 0, 0x3}, /* Freq 5750 */
{151, (RF_A_BAND | RF_A_BAND_HB), 0x02, 0x3F, 0x70, 0xDD, 0xD2, 0x40, 0x10, 0x40, 0x17, 0, 0, 1, 0x2F, 0, 0x30, 0, 0, 0x3}, /* Freq 5755 */
{152, (RF_A_BAND | RF_A_BAND_HB), 0x02, 0x3F, 0x30, 0x97, 0xD2, 0x40, 0x04, 0x40, 0x00, 0, 0, 1, 0x30, 0, 0x30, 0, 0, 0x3}, /* Freq 5760 */
{153, (RF_A_BAND | RF_A_BAND_HB), 0x02, 0x3F, 0x68, 0xDD, 0xD2, 0x40, 0x10, 0x40, 0x01, 0, 0, 1, 0x30, 0, 0x30, 0, 0, 0x3}, /* Freq 5765 */
{154, (RF_A_BAND | RF_A_BAND_HB), 0x02, 0x3F, 0x30, 0xDD, 0xD2, 0x40, 0x04, 0x40, 0x01, 0, 0, 1, 0x30, 0, 0x30, 0, 0, 0x3}, /* Freq 5770 */
{155, (RF_A_BAND | RF_A_BAND_HB), 0x02, 0x3F, 0x68, 0xDD, 0xD2, 0x40, 0x10, 0x40, 0x03, 0, 0, 1, 0x30, 0, 0x30, 0, 0, 0x3}, /* Freq 5775 */
{156, (RF_A_BAND | RF_A_BAND_HB), 0x02, 0x3F, 0x30, 0x97, 0xD2, 0x40, 0x04, 0x40, 0x02, 0, 0, 1, 0x30, 0, 0x30, 0, 0, 0x3}, /* Freq 5780 */
{157, (RF_A_BAND | RF_A_BAND_HB), 0x02, 0x3F, 0x68, 0xDD, 0xD2, 0x40, 0x10, 0x40, 0x05, 0, 0, 1, 0x30, 0, 0x30, 0, 0, 0x3}, /* Freq 5785 */
{158, (RF_A_BAND | RF_A_BAND_HB), 0x02, 0x3F, 0x30, 0x97, 0xD2, 0x40, 0x04, 0x40, 0x03, 0, 0, 1, 0x30, 0, 0x30, 0, 0, 0x3}, /* Freq 5790 */
{159, (RF_A_BAND | RF_A_BAND_HB), 0x02, 0x3F, 0x68, 0xDD, 0xD2, 0x40, 0x10, 0x40, 0x07, 0, 0, 1, 0x30, 0, 0x30, 0, 0, 0x3}, /* Freq 5795 */
{160, (RF_A_BAND | RF_A_BAND_HB), 0x02, 0x3F, 0x30, 0x97, 0xD2, 0x40, 0x04, 0x40, 0x04, 0, 0, 1, 0x30, 0, 0x30, 0, 0, 0x3}, /* Freq 5800 */
{161, (RF_A_BAND | RF_A_BAND_HB), 0x02, 0x3F, 0x68, 0xDD, 0xD2, 0x40, 0x10, 0x40, 0x09, 0, 0, 1, 0x30, 0, 0x30, 0, 0, 0x3}, /* Freq 5805 */
{162, (RF_A_BAND | RF_A_BAND_HB), 0x02, 0x3F, 0x30, 0xDD, 0xD2, 0x40, 0x04, 0x40, 0x05, 0, 0, 1, 0x30, 0, 0x30, 0, 0, 0x3}, /* Freq 5810 */
{163, (RF_A_BAND | RF_A_BAND_HB), 0x02, 0x3F, 0x68, 0xDD, 0xD2, 0x40, 0x10, 0x40, 0x0B, 0, 0, 1, 0x30, 0, 0x30, 0, 0, 0x3}, /* Freq 5815 */
{164, (RF_A_BAND | RF_A_BAND_HB), 0x02, 0x3F, 0x30, 0x97, 0xD2, 0x40, 0x04, 0x40, 0x06, 0, 0, 1, 0x30, 0, 0x30, 0, 0, 0x3}, /* Freq 5820 */
{165, (RF_A_BAND | RF_A_BAND_HB), 0x02, 0x3F, 0x68, 0xDD, 0xD2, 0x40, 0x10, 0x40, 0x0D, 0, 0, 1, 0x30, 0, 0x30, 0, 0, 0x3}, /* Freq 5825 */
{166, (RF_A_BAND | RF_A_BAND_HB), 0x02, 0x3F, 0x30, 0xDD, 0xD2, 0x40, 0x04, 0x40, 0x07, 0, 0, 1, 0x30, 0, 0x30, 0, 0, 0x3}, /* Freq 5830 */
{167, (RF_A_BAND | RF_A_BAND_HB), 0x02, 0x3F, 0x68, 0xDD, 0xD2, 0x40, 0x10, 0x40, 0x0F, 0, 0, 1, 0x30, 0, 0x30, 0, 0, 0x3}, /* Freq 5835 */
{168, (RF_A_BAND | RF_A_BAND_HB), 0x02, 0x3F, 0x30, 0x97, 0xD2, 0x40, 0x04, 0x40, 0x08, 0, 0, 1, 0x30, 0, 0x30, 0, 0, 0x3}, /* Freq 5840 */
{169, (RF_A_BAND | RF_A_BAND_HB), 0x02, 0x3F, 0x68, 0xDD, 0xD2, 0x40, 0x10, 0x40, 0x11, 0, 0, 1, 0x30, 0, 0x30, 0, 0, 0x3}, /* Freq 5845 */
{170, (RF_A_BAND | RF_A_BAND_HB), 0x02, 0x3F, 0x30, 0x97, 0xD2, 0x40, 0x04, 0x40, 0x09, 0, 0, 1, 0x30, 0, 0x30, 0, 0, 0x3}, /* Freq 5850 */
{171, (RF_A_BAND | RF_A_BAND_HB), 0x02, 0x3F, 0x68, 0xDD, 0xD2, 0x40, 0x10, 0x40, 0x13, 0, 0, 1, 0x30, 0, 0x30, 0, 0, 0x3}, /* Freq 5855 */
{172, (RF_A_BAND | RF_A_BAND_HB), 0x02, 0x3F, 0x30, 0x97, 0xD2, 0x40, 0x04, 0x40, 0x0A, 0, 0, 1, 0x30, 0, 0x30, 0, 0, 0x3}, /* Freq 5860 */
{173, (RF_A_BAND | RF_A_BAND_HB), 0x02, 0x3F, 0x68, 0xDD, 0xD2, 0x40, 0x10, 0x40, 0x15, 0, 0, 1, 0x30, 0, 0x30, 0, 0, 0x3}, /* Freq 5865 */
};
unsigned char NUM_OF_MT76x0_CHNL = (sizeof(MT76x0_Frequency_Plan) / sizeof(MT76x0_FREQ_ITEM));
static MT76x0_RF_SWITCH_ITEM MT76x0_RF_INT_PA_RegTb[] = {
#if 0
{RF_BANK6, RF_R45, RF_A_BAND_LB, 0x59},
{RF_BANK6, RF_R45, RF_A_BAND_MB, 0x39},
{RF_BANK6, RF_R45, RF_A_BAND_HB, 0x19},
{RF_BANK6, RF_R50, RF_A_BAND_LB, 0x18},
{RF_BANK6, RF_R50, RF_A_BAND_MB, 0x18},
{RF_BANK6, RF_R50, RF_A_BAND_HB, 0x18},
{RF_BANK6, RF_R51, RF_A_BAND_LB, 0x10},
{RF_BANK6, RF_R51, RF_A_BAND_MB, 0x10},
{RF_BANK6, RF_R51, RF_A_BAND_HB, 0x10},
{RF_BANK6, RF_R52, RF_A_BAND_LB, 0x1F},
{RF_BANK6, RF_R52, RF_A_BAND_MB, 0x1F},
{RF_BANK6, RF_R52, RF_A_BAND_HB, 0x1F},
{RF_BANK6, RF_R53, RF_A_BAND_LB, 0x18},
{RF_BANK6, RF_R53, RF_A_BAND_MB, 0x18},
{RF_BANK6, RF_R53, RF_A_BAND_HB, 0x18},
{RF_BANK6, RF_R54, RF_A_BAND_LB, 0x0C},
{RF_BANK6, RF_R54, RF_A_BAND_MB, 0x0C},
{RF_BANK6, RF_R54, RF_A_BAND_HB, 0x0C},
{RF_BANK6, RF_R55, RF_A_BAND_LB, 0x04},
{RF_BANK6, RF_R55, RF_A_BAND_MB, 0x04},
{RF_BANK6, RF_R55, RF_A_BAND_HB, 0x04},
{RF_BANK6, RF_R56, RF_A_BAND_LB, 0x1F},
{RF_BANK6, RF_R56, RF_A_BAND_MB, 0x1F},
{RF_BANK6, RF_R56, RF_A_BAND_HB, 0x1F},
{RF_BANK6, RF_R57, RF_A_BAND_LB, 0x1F},
{RF_BANK6, RF_R57, RF_A_BAND_MB, 0x1F},
{RF_BANK6, RF_R57, RF_A_BAND_HB, 0x1F},
{RF_BANK6, RF_R58, RF_A_BAND_LB, 0x75},
{RF_BANK6, RF_R58, RF_A_BAND_MB, 0x73},
{RF_BANK6, RF_R58, RF_A_BAND_HB, 0x72},
{RF_BANK6, RF_R59, RF_A_BAND_LB, 0x04},
{RF_BANK6, RF_R59, RF_A_BAND_MB, 0x03},
{RF_BANK6, RF_R59, RF_A_BAND_HB, 0x02},
#endif
};
unsigned int MT76x0_RF_INT_PA_RegTb_Size = (sizeof(MT76x0_RF_INT_PA_RegTb) / sizeof(MT76x0_RF_SWITCH_ITEM));
/*
* Register access.
* All access to the CSR registers will go through the methods
* rt2800_register_read and rt2800_register_write.
* BBP and RF register require indirect register access,
* and use the CSR registers BBPCSR and RFCSR to achieve this.
* These indirect registers work with busy bits,
* and we will try maximal REGISTER_BUSY_COUNT times to access
* the register while taking a REGISTER_BUSY_DELAY us delay
* between each attampt. When the busy bit is still set at that time,
* the access attempt is considered to have failed,
* and we will print an error.
* The _lock versions must be used if you already hold the csr_mutex
*/
#define WAIT_FOR_BBP(__dev, __reg) \
rt2800_regbusy_read((__dev), BBP_CSR_CFG, BBP_CSR_CFG_BUSY, (__reg))