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megasys1.cpp
5280 lines (4169 loc) · 258 KB
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megasys1.cpp
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// license:BSD-3-Clause
// copyright-holders:Luca Elia, David Haywood
/***************************************************************************
-= Jaleco Mega System 1 =-
driver by Luca Elia (l.elia@tin.it)
To enter service mode in some games press service1+F3.
Year + Game System Protection
---------------------------------------------------------------------
88 Legend of Makai (World) Z
Makai Densetsu (Japan) Z
---------------------------------------------------------------------
88 P-47 (World) A
P-47 (Japan) A
P-47 (Japan, Export) A
Kick Off (Japan) A
Takeda Shingen (Japan) A Encryption (key 1) - games with Encryption key 1 have a D65006 marked custom (NEC NEC-UPD65006 gate array?)
Ninja Kazan (World) A Yes + Encryption (key 1)
Iga Ninjyutsuden (Japan) A Yes + Encryption (key 1)
89 Astyanax (World) A Yes + Encryption (key 2) - games with Encryption key 2 have a GS-88000 marked custom (rebadged UPD65006?, same package)
The Lord of King (Japan) A Yes + Encryption (key 2)
Hachoo! A Yes + Encryption (key 2)
Jitsuryoku!! Pro Yakyuu (Japan) A Yes + Encryption (key 2)
Plus Alpha A Yes + Encryption (key 2)
Saint Dragon A Yes + Encryption (key 1)
90 RodLand (World, set 1) A Encryption (key 3) - unknown custom markings for Encryption key 3
RodLand (World, set 2) A Encryption (key 2)
RodLand (Japan) A Encryption (key 2)
R&T (Prototype?) A Encryption (key 2)
Phantasm (Japan) A Encryption (key 1)
91 Earth Defense Force (Prototype) A Encryption (key 1)
In Your Face (Prototype) A Encryption (key 1)
92 Soldam (Japan) A Encryption (key 2)
---------------------------------------------------------------------
91 Avenging Spirit (World) B Inputs
Earth Defense Force B Inputs
93 Hayaoshi Quiz Ouza Ketteisen B Inputs
---------------------------------------------------------------------
91 64th Street (World) C Inputs
64th Street (Japan) C Inputs
92 Big Striker C Inputs
93 Chimera Beast C Inputs
Cybattler C Inputs
---------------------------------------------------------------------
93 Peek-a-Boo! D Inputs
---------------------------------------------------------------------
NOTE: Chimera Beast PROM has not been dumped, but looks like it should match 64street based on game analysis.
Hardware Main CPU Sound CPU Sound Chips
-----------------------------------------------------------
MS1 - Z 68000 Z80 YM2203c
MS1 - A 68000 68000 YM2151 2xOKI-M6295
MS1 - B 68000 68000 YM2151 2xOKI-M6295
MS1 - C 68000 68000 YM2151 2xOKI-M6295
MS1 - D 68000 - - OKI-M6295
-----------------------------------------------------------
Main CPU RW MS1-A/Z MS1-B MS1-C MS1-D
-----------------------------------------------------------------------------------
ROM R 000000-07ffff 000000-03ffff 000000-07ffff 000000-03ffff
080000-0bffff
Video Regs W 084000-0843ff 044000-0443ff 0c0000-0cffff 0c0000-0cffff
Palette RW 088000-0887ff 048000-0487ff 0f8000-0f87ff 0d8000-0d87ff
Object RAM RW 08e000-08ffff 04e000-04ffff 0d2000-0d3fff 0ca000-0cbfff
Scroll 0 RW 090000-093fff 050000-053fff 0e0000-0e3fff 0d0000-0d3fff
Scroll 1 RW 094000-097fff 054000-057fff 0e8000-0ebfff 0e8000-0ebfff
Scroll 2 RW 098000-09bfff 058000-05bfff 0f0000-0f3fff -
Work RAM RW 0f0000-0fffff* 060000-07ffff* 1f0000-1fffff* 1f0000-1fffff
Input Ports R 080000-080009 0e0000-0e0001** 0d8000-d80001** 100000-100001**
-----------------------------------------------------------------------------------
* Some games use mirror addresses
** Through protection.
Sound CPU RW MS1-A MS1-B MS1-C MS1-D
-----------------------------------------------------------------------------------
ROM R 000000-01ffff 000000-01ffff 000000-01ffff No Sound CPU
Latch #1 R 040000-040001 < 060000-060001
Latch #2 W 060000-060001 < <
2151 reg W 080000-080001 < <
2151 data W 080002-080003 < <
2151 status R 080002-080003 < <
6295 #1 data W 0a0000-0a0003 < <
6295 #1 status R 0a0000-0a0001 < <
6295 #2 data W 0c0000-0c0003 < <
6295 #2 status R 0c0000-0c0001 < <
RAM RW 0e0000-0effff* < <
-----------------------------------------------------------------------------------
*Mirror at 0xf0000 (verified on hardware)
Issues / To Do
--------------
- Making the M6295 status register return 0 fixes the music tempo in
avspirit, 64street, astyanax etc. but makes most of the effects in
hachoo disappear! Define SOUND_HACK to 0 to turn this hack off
This seems to be some Jaleco magic at work (strange protection?). The
bootleg version of rodlandj has one instruction patched out to do exactly
the same thing that we are doing (ignoring the 6295 status).
- Understand properly how irqs truly works, kazan / iganinju solution seems hacky
- P47 intro effect is imperfect ( https://www.youtube.com/watch?v=eozZGcVspVw )
- Understand a handful of unknown bits in video regs
- R&T really does have scrambled sound effects on the PCB, those two ROMs being
ones which even still had their original labels. Possibly a prototype, only
one known to exist. ROM17 is missing on the board, not sure if this is
intentional, is the data for the 'secondary' set of levels stored in 17/18?
This game has no alternate levels mode either. Socketed encryption chip is
unusual.
- Understand raster effect related register (ex : stdragon "push start" screen)
- chimerab ranking screen effect is imperfect ( https://youtu.be/XhjCaFxhphA )
***************************************************************************/
#include "emu.h"
#include "megasys1.h"
#include "cpu/m68000/m68000.h"
#include "cpu/z80/z80.h"
#include "sound/ymopm.h"
#include "sound/ymopn.h"
#include "jalcrpt.h"
#include "speaker.h"
#define SYS_A_CPU_CLOCK (XTAL(12'000'000) / 2) /* clock for main 68000 */
#define SYS_B_CPU_CLOCK XTAL(8'000'000) /* clock for main 68000 */
#define SYS_C_CPU_CLOCK (XTAL(24'000'000) / 2) /* clock for main 68000 */
#define SYS_D_CPU_CLOCK XTAL(8'000'000) /* clock for main 68000 */
#define SOUND_CPU_CLOCK XTAL(7'000'000) /* clock for sound 68000 */
#define OKI4_SOUND_CLOCK XTAL(4'000'000)
#define VERBOSE 0
#include "logmacro.h"
void megasys1_state::machine_reset()
{
m_ignore_oki_status = 1; /* ignore oki status due 'protection' */
}
void megasys1_bc_iosim_state::machine_start()
{
save_item(NAME(m_ip_latched));
}
void megasys1_bc_iosim_state::machine_reset()
{
megasys1_state::machine_reset();
m_ip_latched = 0x0006; /* reset protection - some games expect this initial read without sending anything */
}
void megasys1_bc_iomcu_state::machine_reset()
{
megasys1_state::machine_reset();
m_mcu_input_data = 0x00;
m_mcu_io_data = 0x0;
}
void megasys1_bc_iomcu_state::machine_start()
{
save_item(NAME(m_mcu_input_data));
save_item(NAME(m_mcu_io_data));
}
void megasys1_typea_state::machine_start()
{
}
void megasys1_typea_state::machine_reset()
{
megasys1_state::machine_reset();
}
void megasys1_typea_hachoo_state::machine_reset()
{
megasys1_typea_state::machine_reset();
m_ignore_oki_status = 0; // strangely hachoo need real oki status
}
/*************************************
*
* Main CPU memory handlers
*
*************************************/
/***************************************************************************
[ Main CPU - System A / Z ]
***************************************************************************/
TIMER_DEVICE_CALLBACK_MEMBER(megasys1_state::megasys_base_scanline)
{
int scanline = param;
// stdragon: irq 1 is raster irq ("press start" behaviour), happens at around scanline 90(-16), 2 vblank, 3 is RTE.
// p47: irq 2 valid, others RTE
// kickoff: irq 3 valid, others RTE
// tshingen: irq 3 RTE, irq 1 reads inputs, irq 2 sets vregs values (pending further investigation ...)
// kazan: irq 3 disables irq in SW then execute a routine, irq 2 just execute this routine, irq 1 RTR
// astyanax: irq 3 RTE, irq 1 sets "ffff0210" OR 2, irq 2 vblank
// hachoo: irq 2 vblank, irq 3 & 1 sets 0xf004e buffer with the level number
// jitsupro: irq 3 RTE, irq 2 sets palette and vregs, irq 1 reads inputs
// plusalph: irq 1 & 3 RTE, irq 2 valid
// rodland: irq 1 & 3 RTE, irq 2 valid (sets palette, vregs ...)
// soldam: irq 1 & 3 RTE, irq 2 valid
// edfp: irq 1?, 2 sets vregs etc, 3 RTE
if(scanline == 224+16) // vblank-out irq
m_maincpu->set_input_line(2, HOLD_LINE);
if(scanline == 80+16)
m_maincpu->set_input_line(1, HOLD_LINE);
if(scanline == 0+16)
m_maincpu->set_input_line(3, HOLD_LINE);
}
TIMER_DEVICE_CALLBACK_MEMBER(megasys1_typea_state::megasys1A_iganinju_scanline)
{
int scanline = param;
// TODO: there's more than one hint that UPD65006 controls IRQ signals via work RAM buffers.
// This is a bare minimum guessing for this specific game, it definitely don't like neither lv 1 nor 2.
// Of course UPD65006 is probably doing a lot more to mask and probably set a specific line too.
//
// NOTE: above NOTE is very unlikely, the 65006 has a very specific purpose - encryption and ROM overlay
// and is found on multiple boards.
if(m_ram[0] == 0)
return;
if(scanline == 240) // vblank-out irq
m_maincpu->set_input_line(2, HOLD_LINE);
}
void megasys1_typez_state::megasys1Z_map(address_map &map)
{
megasys_base_map(map);
map(0x084308, 0x084309).w(FUNC(megasys1_typez_state::soundlatch_z_w));
}
void megasys1_state::megasys_base_map(address_map &map)
{
map.global_mask(0xfffff);
map(0x000000, 0x03ffff).rom();
map(0x080000, 0x080001).portr("SYSTEM");
map(0x080002, 0x080003).portr("P1");
map(0x080004, 0x080005).portr("P2");
map(0x080006, 0x080007).portr("DSW");
map(0x084200, 0x084205).rw("scroll0", FUNC(megasys1_tilemap_device::scroll_r), FUNC(megasys1_tilemap_device::scroll_w));
map(0x084208, 0x08420d).rw("scroll1", FUNC(megasys1_tilemap_device::scroll_r), FUNC(megasys1_tilemap_device::scroll_w));
map(0x084300, 0x084301).w(FUNC(megasys1_state::screen_flag_w));
map(0x088000, 0x0887ff).ram().w(m_palette, FUNC(palette_device::write16)).share("palette");
map(0x08c000, 0x08dfff).mirror(0x002000).ram().share("objectram"); // soldam relies on a mirror at 0x08c000, other games use 0x08e000
map(0x090000, 0x093fff).ram().w("scroll0", FUNC(megasys1_tilemap_device::write)).share("scroll0");
map(0x094000, 0x097fff).ram().w("scroll1", FUNC(megasys1_tilemap_device::write)).share("scroll1");
map(0x0f0000, 0x0fffff).ram().w(FUNC(megasys1_state::ram_w)).share("ram");
}
void megasys1_typea_state::megasys1A_map(address_map &map)
{
map.global_mask(0xfffff);
megasys_base_map(map);
map(0x000000, 0x07ffff).rom();
map(0x080008, 0x080009).r(m_soundlatch[1], FUNC(generic_latch_16_device::read)); /* from sound cpu */
map(0x084000, 0x084001).w(FUNC(megasys1_typea_state::active_layers_w));
map(0x084008, 0x08400d).rw("scroll2", FUNC(megasys1_tilemap_device::scroll_r), FUNC(megasys1_tilemap_device::scroll_w));
map(0x084100, 0x084101).rw(FUNC(megasys1_typea_state::sprite_flag_r), FUNC(megasys1_typea_state::sprite_flag_w));
map(0x084308, 0x084309).w(FUNC(megasys1_typea_state::soundlatch_w));
map(0x098000, 0x09bfff).ram().w("scroll2", FUNC(megasys1_tilemap_device::write)).share("scroll2");
}
/***************************************************************************
[ Main CPU - System B ]
***************************************************************************/
TIMER_DEVICE_CALLBACK_MEMBER(megasys1_state::megasys1B_scanline)
{
int scanline = param;
if(scanline == 240) // vblank-out irq
m_maincpu->set_input_line(4, HOLD_LINE);
if(scanline == 0)
m_maincpu->set_input_line(2, HOLD_LINE);
if(scanline == 128)
m_maincpu->set_input_line(1, HOLD_LINE);
}
/* Read the input ports, through a protection device:
ip_select_values must contain the 5 codes sent to the protection device
in order to obtain the status of the following 5 input ports:
Coins Player1 Player2 DSW1 DSW2
in that order. */
u16 megasys1_bc_iosim_state::ip_select_r() // FROM MCU
{
return m_ip_latched;
}
void megasys1_bc_iosim_state::ip_select_w(u16 data) // TO MCU
{
int i;
// Coins P1 P2 DSW1 DSW2
// 57 53 54 55 56 < 64street
// 37 35 36 33 34 < avspirit
// 58 54 55 56 57 < bigstrik
// 56 52 53 54 55 < cybattlr
// 20 21 22 23 24 < edf
// 51 52 53 54 55 < hayaosi1
/* f(x) = ((x*x)>>4)&0xFF ; f(f($D)) == 6 */
if (!m_ip_select_values)
return;
for (i = 0; i < 7; i++) if ((data & 0x00ff) == m_ip_select_values[i]) break;
switch (i)
{
case 0 : m_ip_latched = m_io_system->read(); break;
case 1 : m_ip_latched = m_io_p1->read(); break;
case 2 : m_ip_latched = m_io_p2->read(); break;
case 3 : m_ip_latched = m_io_dsw1->read(); break;
case 4 : m_ip_latched = m_io_dsw2->read(); break;
case 5 : m_ip_latched = 0x0d; break; // startup check?
case 6 : m_ip_latched = 0x06; break; // sent before each other command
default: return; // get out if it wasn't a valid request
}
// if the command is valid, generate an IRQ from the MCU
m_maincpu->set_input_line(2, HOLD_LINE);
}
void megasys1_state::megasys1B_map(address_map &map)
{
map.global_mask(0xfffff);
map(0x000000, 0x03ffff).rom();
map(0x044000, 0x044001).w(FUNC(megasys1_state::active_layers_w));
map(0x044008, 0x04400d).rw("scroll2", FUNC(megasys1_tilemap_device::scroll_r), FUNC(megasys1_tilemap_device::scroll_w));
map(0x044100, 0x044101).rw(FUNC(megasys1_state::sprite_flag_r), FUNC(megasys1_state::sprite_flag_w));
map(0x044200, 0x044205).rw("scroll0", FUNC(megasys1_tilemap_device::scroll_r), FUNC(megasys1_tilemap_device::scroll_w));
map(0x044208, 0x04420d).rw("scroll1", FUNC(megasys1_tilemap_device::scroll_r), FUNC(megasys1_tilemap_device::scroll_w));
map(0x044300, 0x044301).w(FUNC(megasys1_state::screen_flag_w));
map(0x044308, 0x044309).w(FUNC(megasys1_state::soundlatch_w));
map(0x048000, 0x0487ff).ram().w(m_palette, FUNC(palette_device::write16)).share("palette");
map(0x04e000, 0x04ffff).ram().share("objectram");
map(0x050000, 0x053fff).ram().w("scroll0", FUNC(megasys1_tilemap_device::write)).share("scroll0");
map(0x054000, 0x057fff).ram().w("scroll1", FUNC(megasys1_tilemap_device::write)).share("scroll1");
map(0x058000, 0x05bfff).ram().w("scroll2", FUNC(megasys1_tilemap_device::write)).share("scroll2");
map(0x060000, 0x06ffff).mirror(0x10000).ram().w(FUNC(megasys1_state::ram_w)).share("ram");
map(0x080000, 0x0bffff).rom();
}
void megasys1_bc_iosim_state::megasys1B_iosim_map(address_map &map)
{
megasys1B_map(map);
map(0x0e0000, 0x0e0001).rw(FUNC(megasys1_bc_iosim_state::ip_select_r), FUNC(megasys1_bc_iosim_state::ip_select_w));
}
void megasys1_state::megasys1B_edfbl_map(address_map &map)
{
map.global_mask(0xfffff);
megasys1B_map(map);
map(0x0e0002, 0x0e0003).portr("SYSTEM");
map(0x0e0004, 0x0e0005).portr("P1");
map(0x0e0006, 0x0e0007).portr("P2");
map(0x0e0008, 0x0e0009).portr("DSW1");
map(0x0e000a, 0x0e000b).portr("DSW2");
//map(0x0e000e, 0x0e000f).w(FUNC(megasys1_state::soundlatch_w));
}
void megasys1_state::megasys1B_monkelf_map(address_map &map)
{
map.global_mask(0xfffff);
megasys1B_map(map);
map(0x044200, 0x044205).w(FUNC(megasys1_state::monkelf_scroll0_w));
map(0x044208, 0x04420d).w(FUNC(megasys1_state::monkelf_scroll1_w));
map(0x0e0002, 0x0e0003).portr("P1");
map(0x0e0004, 0x0e0005).portr("P2");
map(0x0e0006, 0x0e0007).portr("DSW1");
map(0x0e0008, 0x0e0009).portr("DSW2");
map(0x0e000a, 0x0e000b).portr("SYSTEM");
}
/***************************************************************************
[ Main CPU - System C ]
***************************************************************************/
#define INTERRUPT_NUM_C INTERRUPT_NUM_B
#define interrupt_C interrupt_B
void megasys1_state::megasys1c_handle_scanline_irq(int scanline)
{
if(scanline == 224+16) // vblank-out irq
m_maincpu->set_input_line(4, HOLD_LINE);
if(scanline == 80+16)
m_maincpu->set_input_line(1, HOLD_LINE);
}
TIMER_DEVICE_CALLBACK_MEMBER(megasys1_state::megasys1C_scanline)
{
int scanline = param;
megasys1c_handle_scanline_irq(scanline);
if(scanline == 0+16)
m_maincpu->set_input_line(2, HOLD_LINE);
}
TIMER_DEVICE_CALLBACK_MEMBER(megasys1_bc_iomcu_state::megasys1C_iomcu_scanline)
{
int scanline = param;
megasys1c_handle_scanline_irq(scanline);
if(scanline == 0+16) // end of vblank (rising edge)
{
LOG("%s: megasys1C_iomcu_scanline: Send INT1 to MCU: (scanline %03d)\n", machine().describe_context(), scanline);
m_iomcu->set_input_line(INPUT_LINE_IRQ1, ASSERT_LINE);
}
if(scanline == 224+16) // start of vblank (falling edge)
{
LOG("%s: megasys1C_iomcu_scanline: Clear INT1 to MCU: (scanline %03d)\n", machine().describe_context(), scanline);
m_iomcu->set_input_line(INPUT_LINE_IRQ1, CLEAR_LINE);
}
}
void megasys1_state::ram_w(offs_t offset, u16 data)
{
// DON'T use COMBINE_DATA
// byte writes end up mirroring in both bytes of the word like nmk16.cpp
// 64th Street and Chimera Beast rely on this for attract inputs
m_ram[offset] = data;
// if (mem_mask != 0xffff) printf("byte write to RAM %04x %04x %04x\n", offset, data, mem_mask);
}
void megasys1_state::megasys1C_map(address_map &map)
{
map.global_mask(0x1fffff);
map(0x000000, 0x07ffff).rom();
map(0x0c2000, 0x0c2005).rw("scroll0", FUNC(megasys1_tilemap_device::scroll_r), FUNC(megasys1_tilemap_device::scroll_w));
map(0x0c2008, 0x0c200d).rw("scroll1", FUNC(megasys1_tilemap_device::scroll_r), FUNC(megasys1_tilemap_device::scroll_w));
map(0x0c2100, 0x0c2105).rw("scroll2", FUNC(megasys1_tilemap_device::scroll_r), FUNC(megasys1_tilemap_device::scroll_w));
map(0x0c2108, 0x0c2109).w(FUNC(megasys1_state::sprite_bank_w));
map(0x0c2200, 0x0c2201).rw(FUNC(megasys1_state::sprite_flag_r), FUNC(megasys1_state::sprite_flag_w));
map(0x0c2208, 0x0c2209).w(FUNC(megasys1_state::active_layers_w));
map(0x0c2308, 0x0c2309).w(FUNC(megasys1_state::screen_flag_w));
map(0x0c8000, 0x0c8001).r(m_soundlatch[1], FUNC(generic_latch_16_device::read)).w(FUNC(megasys1_state::soundlatch_c_w));
map(0x0d2000, 0x0d3fff).ram().share("objectram");
// 64th Street actively uses 0xe4*** for breakable objects.
map(0x0e0000, 0x0e3fff).mirror(0x4000).ram().w("scroll0", FUNC(megasys1_tilemap_device::write)).share("scroll0");
map(0x0e8000, 0x0ebfff).mirror(0x4000).ram().w("scroll1", FUNC(megasys1_tilemap_device::write)).share("scroll1");
map(0x0f0000, 0x0f3fff).mirror(0x4000).ram().w("scroll2", FUNC(megasys1_tilemap_device::write)).share("scroll2");
map(0x0f8000, 0x0f87ff).ram().w(m_palette, FUNC(palette_device::write16)).share("palette");
map(0x1c0000, 0x1cffff).mirror(0x30000).ram().w(FUNC(megasys1_state::ram_w)).share("ram"); //0x1f****, Cybattler reads attract mode inputs at 0x1d****
}
void megasys1_bc_iosim_state::megasys1C_iosim_map(address_map &map)
{
megasys1C_map(map);
map(0x0d8000, 0x0d8001).rw(FUNC(megasys1_bc_iosim_state::ip_select_r), FUNC(megasys1_bc_iosim_state::ip_select_w));
}
/*
Used by IO MCU to read data from different inputs (DSW1, DSW2, P1, P2, COIN) depending on
which one was previously selected by the MCU itself using the offset.
It also sends the IRQ2 to the main CPU for some case
*/
u8 megasys1_bc_iomcu_state::mcu_capture_inputs_r(offs_t offset)
{
u8 input_data = 0x00;
u8 bank = offset >> 16;
switch (bank)
{
case 0x01: input_data = m_io_p1->read(); break;
case 0x02: input_data = m_io_p2->read(); break;
case 0x03: input_data = m_io_dsw1->read(); break;
case 0x04: input_data = m_io_dsw2->read(); break;
case 0x05: input_data = m_io_system->read(); break;
case 0x07:
m_maincpu->set_input_line(2, HOLD_LINE);
LOG("%s: mcu_capture_inputs_r: Send IRQ2 to main CPU (address %06x)\n", machine().describe_context(), offset);
return input_data;
default: LOG("%s: mcu_capture_inputs_r: Invalid input selected (data %02x)\n", machine().describe_context(), bank); return input_data;
}
LOG("%s: mcu_capture_inputs_r: Read data from inputs: (data %02x)\n", machine().describe_context(), input_data);
return input_data;
}
/*
Used by IO MCU to read data from the main CPU when INT0 is triggered
*/
u8 megasys1_bc_iomcu_state::mcu_port1_r()
{
LOG("%s: mcu_port1_r: Read data from CPU: (data %02x)\n", machine().describe_context(), m_mcu_input_data);
return m_mcu_input_data;
}
/*
Used by IO MCU to send data to the main CPU when INT0 is triggered
*/
void megasys1_bc_iomcu_state::mcu_port2_w(u8 data)
{
LOG("%s: mcu_port2_w: Send data to CPU: (data %02x)\n", machine().describe_context(), data);
m_mcu_io_data = data;
}
/*
Unknown purpose, but the IO MCU writes into the bit 3 of the port 6
*/
void megasys1_bc_iomcu_state::mcu_port6_w(u8 data)
{
LOG("%s: mcu_port6_w: Write data to port 6: (data %02x)\n", machine().describe_context(), data);
}
/*
Read handler triggered by the main CPU at some specific address. Used to read data from port 2 of IO MCU
*/
u16 megasys1_bc_iomcu_state::ip_select_iomcu_r() // FROM MCU
{
LOG("%s: ip_select_iomcu_r: Read data from MCU: (data %02x)\n", machine().describe_context(), m_mcu_io_data);
return m_mcu_io_data;
}
/*
Write handler triggered by the main CPU at some specific address. Used to write data to port 1 of IO MCU and send irq0
*/
void megasys1_bc_iomcu_state::ip_select_iomcu_w(u16 data) // TO MCU
{
LOG("%s: ip_select_iomcu_w: Send data to MCU: (data %02x)\n", machine().describe_context(), data);
m_mcu_input_data = data;
m_iomcu->pulse_input_line(INPUT_LINE_IRQ0, attotime::from_ticks(1, m_maincpu->clock()));
}
void megasys1_bc_iomcu_state::iomcu_map(address_map &map)
{
// 0x000000- 0x003fff is hidden by internal ROM, as are some 0x00fxxx addresses by RAM
map(0x000000, 0x0fffff).r(FUNC(megasys1_bc_iomcu_state::mcu_capture_inputs_r));
}
void megasys1_bc_iomcu_state::megasys1C_iomcu_map(address_map &map)
{
megasys1C_map(map);
map(0x0d8000, 0x0d8001).rw(FUNC(megasys1_bc_iomcu_state::ip_select_iomcu_r), FUNC(megasys1_bc_iomcu_state::ip_select_iomcu_w));
}
/***************************************************************************
[ Main CPU - System D ]
***************************************************************************/
INTERRUPT_GEN_MEMBER(megasys1_typed_state::megasys1D_irq)
{
device.execute().set_input_line(2, HOLD_LINE);
}
void megasys1_typed_state::megasys1D_map(address_map &map)
{
map(0x000000, 0x03ffff).rom();
map(0x0c2000, 0x0c2005).rw("scroll0", FUNC(megasys1_tilemap_device::scroll_r), FUNC(megasys1_tilemap_device::scroll_w));
map(0x0c2008, 0x0c200d).rw("scroll1", FUNC(megasys1_tilemap_device::scroll_r), FUNC(megasys1_tilemap_device::scroll_w));
map(0x0c2108, 0x0c2109).nopw(); //.w(FUNC(megasys1_typed_state::sprite_bank_w));
map(0x0c2200, 0x0c2201).rw(FUNC(megasys1_typed_state::sprite_flag_r), FUNC(megasys1_typed_state::sprite_flag_w));
map(0x0c2208, 0x0c2209).w(FUNC(megasys1_typed_state::active_layers_w));
map(0x0c2308, 0x0c2309).w(FUNC(megasys1_typed_state::screen_flag_w));
map(0x0ca000, 0x0cbfff).ram().share("objectram");
map(0x0d0000, 0x0d3fff).ram().w("scroll1", FUNC(megasys1_tilemap_device::write)).share("scroll1");
map(0x0d8000, 0x0d87ff).mirror(0x3000).ram().w(m_palette, FUNC(palette_device::write16)).share("palette");
map(0x0e0000, 0x0e0001).portr("DSW");
map(0x0e8000, 0x0ebfff).ram().w("scroll0", FUNC(megasys1_tilemap_device::write)).share("scroll0");
map(0x0f0000, 0x0f0001).portr("SYSTEM");
map(0x0f8001, 0x0f8001).rw(m_oki[0], FUNC(okim6295_device::read), FUNC(okim6295_device::write));
// map(0x100000, 0x100001); // protection
map(0x1f0000, 0x1fffff).ram() /*.w(FUNC(megasys1_typed_state::ram_w))*/ .share("ram");
}
void megasys1_typed_state::megasys1D_oki_map(address_map &map)
{
map(0x00000, 0x1ffff).rom();
map(0x20000, 0x3ffff).bankr("okibank");
}
/*************************************
*
* Sound CPU memory handlers
*
*************************************/
/*
[ Sound CPU interrupts ]
[MS1-A]
astyanax all rte
hachoo all reset the program, but the status
register is set to 2700
iganinju all rte
p47 & p47j all rte
phantasm all rte (4 is different, but rte)
plusalph all rte
rodland & rodlandj all rte (4 is different, but rte)
stdragon 4]read & store sound command and echo to main cpu
rest: rte
[MS1-B]
avspirit all rte (4 is different, but rte)
edf all rte (4 is different, but rte)
[MS1-C]
64street all rte (4 is different, but rte)
chimerab all rte
cybattlr
1;3;5-7]400 busy loop
2]40c read & store sound command and echo to main cpu
4]446 rte
These games almost always don't use the interrupts to drive the music
tempo (cybattlr and stdragon do!) but use the YM2151 timers instead
(they poll the status register). Since those timers are affected by
the YM2151 clock, it's this latter that ultimately decides the music
tempo.
Note that some games' music is severely slowed down and out of sync
(avspirit, 64street) by the fact that the game waits for some samples
to be played entirely (M6295 status register polled) but they take
too much time (and raising the M6295 clock rate would, on the other
hand, screw the pitch of the samples)
A temporary fix is to make the status of this chip return 0...
unfortunately, this trick makes most of the effects disappear in at
least one game: hachoo!
IRQ 4 comes from the YM2151. This is confirmed by jitsupro, which
runs at a much slower timer rate than the other games and formerly
required it's own machine driver to get interrupts at around the
right speed. Now with the 2151 driving all games have the proper
tempo with no hacks.
*/
/* YM2151 IRQ */
void megasys1_state::sound_irq(int state)
{
if (state)
m_audiocpu->set_input_line(4, HOLD_LINE);
}
template<int Chip>
u8 megasys1_state::oki_status_r()
{
if (m_ignore_oki_status == 1)
return 0;
else
return m_oki[Chip]->read();
}
void megasys1_typea_state::p47b_adpcm_w(offs_t offset, u8 data)
{
// bit 6 is always set
m_p47b_adpcm[offset]->reset_w(BIT(data, 7));
m_p47b_adpcm[offset]->data_w(data & 0x0f);
m_p47b_adpcm[offset]->vclk_w(1);
m_p47b_adpcm[offset]->vclk_w(0);
}
/***************************************************************************
[ Sound CPU - System A ]
***************************************************************************/
void megasys1_typea_state::megasys1A_sound_map(address_map &map)
{
map(0x000000, 0x01ffff).rom();
map(0x040000, 0x040001).r(m_soundlatch[0], FUNC(generic_latch_16_device::read));
map(0x060000, 0x060001).w(m_soundlatch[1], FUNC(generic_latch_16_device::write)); // to main cpu
map(0x080000, 0x080003).rw("ymsnd", FUNC(ym2151_device::read), FUNC(ym2151_device::write)).umask16(0x00ff);
map(0x0a0001, 0x0a0001).r(FUNC(megasys1_typea_state::oki_status_r<0>));
map(0x0a0000, 0x0a0003).w(m_oki[0], FUNC(okim6295_device::write)).umask16(0x00ff).cswidth(16); // jitsupro writes oki commands to both the lsb and msb; it works because of byte smearing
map(0x0c0001, 0x0c0001).r(FUNC(megasys1_typea_state::oki_status_r<1>));
map(0x0c0000, 0x0c0003).w(m_oki[1], FUNC(okim6295_device::write)).umask16(0x00ff).cswidth(16);
map(0x0e0000, 0x0effff).ram().mirror(0x10000);
}
void megasys1_typea_state::kickoffb_sound_map(address_map &map)
{
map(0x000000, 0x01ffff).rom();
map(0x040000, 0x040001).r(m_soundlatch[0], FUNC(generic_latch_16_device::read));
map(0x060000, 0x060001).w(m_soundlatch[1], FUNC(generic_latch_16_device::write)); // to main cpu
map(0x080000, 0x080003).rw("ymsnd", FUNC(ym2203_device::read), FUNC(ym2203_device::write)).umask16(0x00ff);
map(0x0a0001, 0x0a0001).r(FUNC(megasys1_typea_state::oki_status_r<0>));
map(0x0a0000, 0x0a0003).w(m_oki[0], FUNC(okim6295_device::write)).umask16(0x00ff);
map(0x0e0000, 0x0fffff).ram();
}
void megasys1_typea_state::p47b_sound_map(address_map &map)
{
map(0x000000, 0x01ffff).rom();
map(0x040000, 0x040001).r(m_soundlatch[0], FUNC(generic_latch_16_device::read));
map(0x060000, 0x060001).w(m_soundlatch[1], FUNC(generic_latch_16_device::write)); // to main cpu?
map(0x080000, 0x080003).rw("ymsnd", FUNC(ym2203_device::read), FUNC(ym2203_device::write)).umask16(0x00ff);
map(0x0a0000, 0x0a0003).noprw(); // OKI1 on the original
map(0x0c0001, 0x0c0001).w("soundlatch3", FUNC(generic_latch_8_device::write));
map(0x0c0002, 0x0c0003).noprw(); // OKI2 on the original
map(0x0e0000, 0x0fffff).ram();
}
void megasys1_typea_state::p47b_extracpu_prg_map(address_map &map) // TODO
{
map(0x0000, 0xffff).rom().nopw();
}
void megasys1_typea_state::p47b_extracpu_io_map(address_map &map)
{
map.global_mask(0xff);
map(0x00, 0x01).w(FUNC(megasys1_typea_state::p47b_adpcm_w));
map(0x01, 0x01).r("soundlatch3", FUNC(generic_latch_8_device::read));
}
/***************************************************************************
[ Sound CPU - System B / C ]
***************************************************************************/
void megasys1_state::megasys1B_sound_map(address_map &map)
{
map(0x000000, 0x01ffff).rom();
map(0x040000, 0x040001).r(m_soundlatch[0], FUNC(generic_latch_16_device::read)).w(m_soundlatch[1], FUNC(generic_latch_16_device::write)); /* from/to main cpu */
map(0x060000, 0x060001).r(m_soundlatch[0], FUNC(generic_latch_16_device::read)).w(m_soundlatch[1], FUNC(generic_latch_16_device::write)); /* from/to main cpu */
map(0x080000, 0x080003).rw("ymsnd", FUNC(ym2151_device::read), FUNC(ym2151_device::write)).umask16(0x00ff);
map(0x0a0001, 0x0a0001).r(FUNC(megasys1_state::oki_status_r<0>));
map(0x0a0000, 0x0a0003).w(m_oki[0], FUNC(okim6295_device::write)).umask16(0x00ff);
map(0x0c0001, 0x0c0001).r(FUNC(megasys1_state::oki_status_r<1>));
map(0x0c0000, 0x0c0003).w(m_oki[1], FUNC(okim6295_device::write)).umask16(0x00ff);
map(0x0e0000, 0x0effff).ram().mirror(0x10000);
}
/***************************************************************************
[ Sound CPU - System Z ]
***************************************************************************/
void megasys1_typez_state::z80_sound_map(address_map &map)
{
map(0x0000, 0x3fff).rom();
map(0xc000, 0xc7ff).ram();
map(0xe000, 0xe000).lr8(NAME([this] () { return m_soundlatch[0]->read() & 0xff; }));
map(0xf000, 0xf000).nopw(); /* ?? */
}
void megasys1_typez_state::z80_sound_io_map(address_map &map)
{
map.global_mask(0xff);
map(0x00, 0x01).rw("ymsnd", FUNC(ym2203_device::read), FUNC(ym2203_device::write));
}
/*************************************
*
* Generic port definitions
*
*************************************/
static INPUT_PORTS_START( megasys1_generic )
PORT_START("SYSTEM")
PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_START1 )
PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_START2 )
PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_SERVICE1 )
PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_COIN1 )
PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_COIN2 )
PORT_BIT( 0xff00, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_START("P1")
PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY PORT_PLAYER(1)
PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY PORT_PLAYER(1)
PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY PORT_PLAYER(1)
PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY PORT_PLAYER(1)
PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1)
PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(1)
PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_START("P2")
PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY PORT_PLAYER(2)
PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY PORT_PLAYER(2)
PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY PORT_PLAYER(2)
PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY PORT_PLAYER(2)
PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2)
PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(2)
PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* Reserve 1P */
PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x0800, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x1000, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* Reserve 2P */
PORT_BIT( 0x2000, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_UNKNOWN )
INPUT_PORTS_END
/* Coinage DSWs */
// 1] 01-41 02-31 03-21 07-11 06-12 05-13 04-14 00-FC * 2
// 2] 04-31 02-21 07-11 03-12 05-13 01-14 06-15 00-FC
// 00-41 20-31 10-21 38-11 18-12 28-13 08-14 30-15
#define COINAGE_8BITS \
PORT_DIPNAME( 0x000f, 0x000f, DEF_STR( Coin_A ) )\
PORT_DIPSETTING( 0x0007, DEF_STR( 4C_1C ) )\
PORT_DIPSETTING( 0x0008, DEF_STR( 3C_1C ) )\
PORT_DIPSETTING( 0x0009, DEF_STR( 2C_1C ) )\
PORT_DIPSETTING( 0x000f, DEF_STR( 1C_1C ) )\
/* PORT_DIPSETTING( 0x0005, DEF_STR( 1C_1C ) )*/\
/* PORT_DIPSETTING( 0x0004, DEF_STR( 1C_1C ) )*/\
/* PORT_DIPSETTING( 0x0003, DEF_STR( 1C_1C ) )*/\
/* PORT_DIPSETTING( 0x0002, DEF_STR( 1C_1C ) )*/\
/* PORT_DIPSETTING( 0x0001, DEF_STR( 1C_1C ) )*/\
PORT_DIPSETTING( 0x0006, DEF_STR( 2C_3C ) )\
PORT_DIPSETTING( 0x000e, DEF_STR( 1C_2C ) )\
PORT_DIPSETTING( 0x000d, DEF_STR( 1C_3C ) )\
PORT_DIPSETTING( 0x000c, DEF_STR( 1C_4C ) )\
PORT_DIPSETTING( 0x000b, DEF_STR( 1C_5C ) )\
PORT_DIPSETTING( 0x000a, DEF_STR( 1C_6C ) )\
PORT_DIPSETTING( 0x0000, DEF_STR( Free_Play ) )\
PORT_DIPNAME( 0x00f0, 0x00f0, DEF_STR( Coin_B ) )\
PORT_DIPSETTING( 0x0070, DEF_STR( 4C_1C ) )\
PORT_DIPSETTING( 0x0080, DEF_STR( 3C_1C ) )\
PORT_DIPSETTING( 0x0090, DEF_STR( 2C_1C ) )\
PORT_DIPSETTING( 0x00f0, DEF_STR( 1C_1C ) )\
/* PORT_DIPSETTING( 0x0050, DEF_STR( 1C_1C ) )*/\
/* PORT_DIPSETTING( 0x0040, DEF_STR( 1C_1C ) )*/\
/* PORT_DIPSETTING( 0x0030, DEF_STR( 1C_1C ) )*/\
/* PORT_DIPSETTING( 0x0020, DEF_STR( 1C_1C ) )*/\
/* PORT_DIPSETTING( 0x0010, DEF_STR( 1C_1C ) )*/\
PORT_DIPSETTING( 0x0060, DEF_STR( 2C_3C ) )\
PORT_DIPSETTING( 0x00e0, DEF_STR( 1C_2C ) )\
PORT_DIPSETTING( 0x00d0, DEF_STR( 1C_3C ) )\
PORT_DIPSETTING( 0x00c0, DEF_STR( 1C_4C ) )\
PORT_DIPSETTING( 0x00b0, DEF_STR( 1C_5C ) )\
PORT_DIPSETTING( 0x00a0, DEF_STR( 1C_6C ) )\
PORT_DIPSETTING( 0x0000, DEF_STR( Free_Play ) )
/*************************************
*
* Game-specific port definitions
*
*************************************/
static INPUT_PORTS_START( 64street )
PORT_INCLUDE( megasys1_generic )
PORT_START("DSW1")
COINAGE_8BITS
PORT_START("DSW2")
PORT_DIPNAME( 0x0001, 0x0001, DEF_STR( Flip_Screen ) )
PORT_DIPSETTING( 0x0001, DEF_STR( Off ) )
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
PORT_DIPNAME( 0x0002, 0x0000, DEF_STR( Demo_Sounds ) )
PORT_DIPSETTING( 0x0002, DEF_STR( Off ) )
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
PORT_DIPNAME( 0x0004, 0x0004, DEF_STR( Allow_Continue ) )
PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
PORT_DIPSETTING( 0x0004, DEF_STR( On ) )
PORT_DIPNAME( 0x0018, 0x0018, DEF_STR( Difficulty ) )
PORT_DIPSETTING( 0x0010, DEF_STR( Easy ) )
PORT_DIPSETTING( 0x0018, DEF_STR( Normal ) )
PORT_DIPSETTING( 0x0008, DEF_STR( Hard ) )
PORT_DIPSETTING( 0x0000, DEF_STR( Hardest ) )
PORT_DIPNAME( 0x0060, 0x0020, DEF_STR( Lives ) )
PORT_DIPSETTING( 0x0040, "1" )
PORT_DIPSETTING( 0x0060, "2" )
PORT_DIPSETTING( 0x0020, "3" )
PORT_DIPSETTING( 0x0000, "5" )
PORT_SERVICE( 0x0080, IP_ACTIVE_LOW )
INPUT_PORTS_END
static INPUT_PORTS_START( astyanax )
PORT_INCLUDE( megasys1_generic )
PORT_MODIFY("P1")
PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(1)
PORT_MODIFY("P2")
PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(2)
PORT_START("DSW")
PORT_DIPUNUSED( 0x0001, 0x0001 ) // according to manual
PORT_DIPUNUSED( 0x0002, 0x0002 ) // according to manual
PORT_DIPNAME( 0x0004, 0x0004, DEF_STR( Bonus_Life ) )
PORT_DIPSETTING( 0x0004, "30k 70k 110k then every 30k" )
PORT_DIPSETTING( 0x0000, "50k 100k then every 40k" )
PORT_DIPNAME( 0x0018, 0x0018, DEF_STR( Lives ) )
PORT_DIPSETTING( 0x0008, "2" )
PORT_DIPSETTING( 0x0018, "3" )
PORT_DIPSETTING( 0x0010, "4" )
PORT_DIPSETTING( 0x0000, "5" )
PORT_DIPNAME( 0x0020, 0x0020, DEF_STR( Difficulty ) )
PORT_DIPSETTING( 0x0020, DEF_STR( Normal ) )
PORT_DIPSETTING( 0x0000, DEF_STR( Hard ) )
PORT_DIPNAME( 0x0040, 0x0040, "Swap 1P/2P Controls" )
PORT_DIPSETTING( 0x0040, DEF_STR( Off ) )
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
PORT_DIPNAME( 0x0080, 0x0080, DEF_STR( Flip_Screen ) )
PORT_DIPSETTING( 0x0080, DEF_STR( Off ) )
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
PORT_DIPNAME( 0x0700, 0x0700, DEF_STR( Coin_A ) )
PORT_DIPSETTING( 0x0000, DEF_STR( 4C_1C ) )
PORT_DIPSETTING( 0x0400, DEF_STR( 3C_1C ) )
PORT_DIPSETTING( 0x0200, DEF_STR( 2C_1C ) )
PORT_DIPSETTING( 0x0700, DEF_STR( 1C_1C ) )
// PORT_DIPSETTING( 0x0300, DEF_STR( 1C_1C ) ) // 1_2 shown in test mode
// PORT_DIPSETTING( 0x0500, DEF_STR( 1C_1C ) ) // 1_3
// PORT_DIPSETTING( 0x0100, DEF_STR( 1C_1C ) ) // 1_4
// PORT_DIPSETTING( 0x0600, DEF_STR( 1C_1C ) ) // 1_5
PORT_DIPNAME( 0x3800, 0x3800, DEF_STR( Coin_B ) )
PORT_DIPSETTING( 0x0000, DEF_STR( 4C_1C ) )
PORT_DIPSETTING( 0x2000, DEF_STR( 3C_1C ) )
PORT_DIPSETTING( 0x1000, DEF_STR( 2C_1C ) )
PORT_DIPSETTING( 0x3800, DEF_STR( 1C_1C ) )
// PORT_DIPSETTING( 0x1800, DEF_STR( 1C_1C ) ) // 1_2 shown in test mode
// PORT_DIPSETTING( 0x2800, DEF_STR( 1C_1C ) ) // 1_3
// PORT_DIPSETTING( 0x0800, DEF_STR( 1C_1C ) ) // 1_4
// PORT_DIPSETTING( 0x3000, DEF_STR( 1C_1C ) ) // 1_5
PORT_DIPNAME( 0x4000, 0x0000, DEF_STR( Demo_Sounds ) )
PORT_DIPSETTING( 0x4000, DEF_STR( Off ) )
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
PORT_DIPNAME( 0x8000, 0x8000, "Test Mode" )
PORT_DIPSETTING( 0x8000, DEF_STR( Off ) )
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
INPUT_PORTS_END
static INPUT_PORTS_START( avspirit )
PORT_INCLUDE( 64street )
PORT_MODIFY("DSW2")
PORT_DIPNAME( 0x0018, 0x0018, DEF_STR( Difficulty ) )
PORT_DIPSETTING( 0x0008, DEF_STR( Easy ) )
PORT_DIPSETTING( 0x0018, DEF_STR( Normal ) )
PORT_DIPSETTING( 0x0010, DEF_STR( Hard ) )
PORT_DIPSETTING( 0x0000, DEF_STR( Hardest ) )
PORT_DIPNAME( 0x0020, 0x0020, DEF_STR( Cabinet ) )
PORT_DIPSETTING( 0x0020, DEF_STR( Upright ) )
PORT_DIPSETTING( 0x0000, DEF_STR( Cocktail ) )
PORT_DIPNAME( 0x0040, 0x0040, "Test Mode" ) // freeze & slow motion via P1 + P2 start
PORT_DIPSETTING( 0x0040, DEF_STR( Off ) )
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
INPUT_PORTS_END
static INPUT_PORTS_START( phantasm )
PORT_INCLUDE( megasys1_generic )
PORT_START("DSW")
PORT_DIPNAME( 0x0001, 0x0001, DEF_STR( Flip_Screen ) )
PORT_DIPSETTING( 0x0001, DEF_STR( Off ) )