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p9n.act_fab_io_patch
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p9n.act_fab_io_patch
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--- p9n.act 2017-03-07 08:37:49.679835166 -0600
+++ p9n.act_fab_io 2017-03-07 08:39:34.260687072 -0600
@@ -45,6 +45,7 @@
# cores.
# SW374348 bjs 01/27/17 Additional updates for fused core brkpts
# (requires SIMICs change for full function)
+# SW382230 thi 03/07/17 Need action for Fab IO validation
#
# Minimal SBE action to get Hostboot started
@@ -2165,3 +2166,44 @@
CAUSE: TARGET=[FUSEDCORE(0)] OP=[BIT,ON] BIT=[31]
EFFECT: TARGET=[REG(MYCHIPLET, 0x10AB3)] OP=[BIT,ON] BIT=[63]
}
+
+################################################################################################
+# IOVALID XBUS/OBUS
+################################################################################################
+CAUSE_EFFECT {
+ LABEL=[XBUS/OBUS IOVALID Link Update]
+ WATCH=[REG(0x06000019)]
+ CAUSE: TARGET=[REG(0x06000019)] OP=[AND,ON,BUF,MASK] DATA=[LITERAL(64,0x0FC00000 0x00000000)] MASK=[LITERAL(64,0x0FC00000 0x00000000)]
+ EFFECT: TARGET=[REG(0x06011800)] OP=[BIT,ON] BIT=[0] # XBUS 0 L0 DL TRAINED
+ EFFECT: TARGET=[REG(0x06011800)] OP=[BIT,ON] BIT=[1] # XBUS L1 DL TRAINED
+ EFFECT: TARGET=[REG(0x06011C00)] OP=[BIT,ON] BIT=[0] # XBUS 1 L0 DL TRAINED
+ EFFECT: TARGET=[REG(0x06011C00)] OP=[BIT,ON] BIT=[1] # XBUS L1 DL TRAINED
+ EFFECT: TARGET=[REG(0x06012000)] OP=[BIT,ON] BIT=[0] # XBUS 2 L0 DL TRAINED
+ EFFECT: TARGET=[REG(0x06012000)] OP=[BIT,ON] BIT=[1] # XBUS L1 DL TRAINED
+ EFFECT: TARGET=[REG(0x05013400)] OP=[BIT,ON] BIT=[0] # XBUS 0 FMR00 TL TRAINED
+ EFFECT: TARGET=[REG(0x05013400)] OP=[BIT,ON] BIT=[1] # XBUS FMR01 TL TRAINED
+ EFFECT: TARGET=[REG(0x05013400)] OP=[BIT,ON] BIT=[2] # XBUS 1 FMR02 TL TRAINED
+ EFFECT: TARGET=[REG(0x05013400)] OP=[BIT,ON] BIT=[3] # XBUS FMR03 TL TRAINED
+ EFFECT: TARGET=[REG(0x05013400)] OP=[BIT,ON] BIT=[4] # XBUS 2 FMR04 TL TRAINED
+ EFFECT: TARGET=[REG(0x05013400)] OP=[BIT,ON] BIT=[5] # XBUS FMR05 TL TRAINED
+
+ EFFECT: TARGET=[REG(0x09010800)] OP=[BIT,ON] BIT=[0] # OBUS 0 L0 DL TRAINED OPTICAL
+ EFFECT: TARGET=[REG(0x09010800)] OP=[BIT,ON] BIT=[1] # OBUS L1 DL TRAINED
+ EFFECT: TARGET=[REG(0x0C010800)] OP=[BIT,ON] BIT=[0] # OBUS 3 L0 DL TRAINED OPTICAL
+ EFFECT: TARGET=[REG(0x0C010800)] OP=[BIT,ON] BIT=[1] # OBUS L1 DL TRAINED
+ EFFECT: TARGET=[REG(0x05013800)] OP=[BIT,ON] BIT=[0] # OBUS 0 FMR00 TL TRAINED OPTICAL
+ EFFECT: TARGET=[REG(0x05013800)] OP=[BIT,ON] BIT=[1] # OBUS FMR01 TL TRAINED
+ EFFECT: TARGET=[REG(0x05013800)] OP=[BIT,ON] BIT=[6] # OBUS 3 FMR00 TL TRAINED OPTICAL
+ EFFECT: TARGET=[REG(0x05013800)] OP=[BIT,ON] BIT=[7] # OBUS FMR01 TL TRAINED
+
+# Note: for reference, Cumulus only
+# EFFECT: TARGET=[REG(0x0A010800)] OP=[BIT,ON] BIT=[0] # OBUS 1 L0 DL TRAINED OPTICAL
+# EFFECT: TARGET=[REG(0x0A010800)] OP=[BIT,ON] BIT=[1] # OBUS L1 DL TRAINED
+# EFFECT: TARGET=[REG(0x0B010800)] OP=[BIT,ON] BIT=[0] # OBUS 2 L0 DL TRAINED OPTICAL
+# EFFECT: TARGET=[REG(0x0B010800)] OP=[BIT,ON] BIT=[1] # OBUS L1 DL TRAINED
+# EFFECT: TARGET=[REG(0x05013800)] OP=[BIT,ON] BIT=[2] # OBUS 1 FMR00 TL TRAINED OPTICAL
+# EFFECT: TARGET=[REG(0x05013800)] OP=[BIT,ON] BIT=[3] # OBUS FMR01 TL TRAINED
+# EFFECT: TARGET=[REG(0x05013800)] OP=[BIT,ON] BIT=[4] # OBUS 2 FMR00 TL TRAINED OPTICAL
+# EFFECT: TARGET=[REG(0x05013800)] OP=[BIT,ON] BIT=[5] # OBUS FMR01 TL TRAINED
+
+}