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p9n2_quad_scom_addresses_fld.H
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p9n2_quad_scom_addresses_fld.H
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/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
/* $Source: src/import/chips/p9/common/include/p9n2_quad_scom_addresses_fld.H $ */
/* */
/* OpenPOWER HostBoot Project */
/* */
/* Contributors Listed Below - COPYRIGHT 2017 */
/* [+] International Business Machines Corp. */
/* */
/* */
/* Licensed under the Apache License, Version 2.0 (the "License"); */
/* you may not use this file except in compliance with the License. */
/* You may obtain a copy of the License at */
/* */
/* http://www.apache.org/licenses/LICENSE-2.0 */
/* */
/* Unless required by applicable law or agreed to in writing, software */
/* distributed under the License is distributed on an "AS IS" BASIS, */
/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */
/* implied. See the License for the specific language governing */
/* permissions and limitations under the License. */
/* */
/* IBM_PROLOG_END_TAG */
///
/// @file p9_quad_scom_addresses_fld.H
/// @brief Defines constants for scom addresses
///
// *HWP HWP Owner: Ben Gass <bgass@us.ibm.com>
// *HWP FW Owner: Thi Tran <thi@us.ibm.com>
// *HWP Team: SOA
// *HWP Level: 1
// *HWP Consumed by: FSP:HB:HS:OCC:SBE:CME:SGPE:PGPE:FPPE:IPPE
#ifndef __P9N2_QUAD_SCOM_ADDRESSES_FLD_H
#define __P9N2_QUAD_SCOM_ADDRESSES_FLD_H
#include <stdint.h>
static const uint8_t P9N2_EQ_ADDR_TRAP_REG_PCB_ADDRESS_OF_LAST_TRANSACTION_WITH_ERROR = 0 ;
static const uint8_t P9N2_EQ_ADDR_TRAP_REG_PCB_ADDRESS_OF_LAST_TRANSACTION_WITH_ERROR_LEN = 16 ;
static const uint8_t P9N2_EQ_ADDR_TRAP_REG_PCB_READ_NOTWRITE_OF_LAST_TRANSACTION_WITH_ERROR = 16 ;
static const uint8_t P9N2_EQ_ADDR_TRAP_REG_RESERVED_LAST_LT = 17 ;
static const uint8_t P9N2_EQ_ADDR_TRAP_REG_SERIAL2PARALLEL_STATE_MACHINE_AT_TIME_OF_ERROR = 18 ;
static const uint8_t P9N2_EQ_ADDR_TRAP_REG_SERIAL2PARALLEL_STATE_MACHINE_AT_TIME_OF_ERROR_LEN = 13 ;
static const uint8_t P9N2_EQ_ADDR_TRAP_REG_SATELLITE_ACKNOWLEDGE_BIT_RETURN_PARITY = 31 ;
static const uint8_t P9N2_EQ_ADDR_TRAP_REG_SATELLITE_ACKNOWLEDGE_BIT_WRITE_PARITY_ERROR = 32 ;
static const uint8_t P9N2_EQ_ADDR_TRAP_REG_SATELLITE_ACKNOWLEDGE_BIT_ACCESS_VIOLATION = 33 ;
static const uint8_t P9N2_EQ_ADDR_TRAP_REG_SATELLITE_ACKNOWLEDGE_BIT_INVALID_REGISTER = 34 ;
static const uint8_t P9N2_EX_ADDR_TRAP_REG_PCB_ADDRESS_OF_LAST_TRANSACTION_WITH_ERROR = 0 ;
static const uint8_t P9N2_EX_ADDR_TRAP_REG_PCB_ADDRESS_OF_LAST_TRANSACTION_WITH_ERROR_LEN = 16 ;
static const uint8_t P9N2_EX_ADDR_TRAP_REG_PCB_READ_NOTWRITE_OF_LAST_TRANSACTION_WITH_ERROR = 16 ;
static const uint8_t P9N2_EX_ADDR_TRAP_REG_RESERVED_LAST_LT = 17 ;
static const uint8_t P9N2_EX_ADDR_TRAP_REG_SERIAL2PARALLEL_STATE_MACHINE_AT_TIME_OF_ERROR = 18 ;
static const uint8_t P9N2_EX_ADDR_TRAP_REG_SERIAL2PARALLEL_STATE_MACHINE_AT_TIME_OF_ERROR_LEN = 13 ;
static const uint8_t P9N2_EX_ADDR_TRAP_REG_SATELLITE_ACKNOWLEDGE_BIT_RETURN_PARITY = 31 ;
static const uint8_t P9N2_EX_ADDR_TRAP_REG_SATELLITE_ACKNOWLEDGE_BIT_WRITE_PARITY_ERROR = 32 ;
static const uint8_t P9N2_EX_ADDR_TRAP_REG_SATELLITE_ACKNOWLEDGE_BIT_ACCESS_VIOLATION = 33 ;
static const uint8_t P9N2_EX_ADDR_TRAP_REG_SATELLITE_ACKNOWLEDGE_BIT_INVALID_REGISTER = 34 ;
static const uint8_t P9N2_C_ADDR_TRAP_REG_PCB_ADDRESS_OF_LAST_TRANSACTION_WITH_ERROR = 0 ;
static const uint8_t P9N2_C_ADDR_TRAP_REG_PCB_ADDRESS_OF_LAST_TRANSACTION_WITH_ERROR_LEN = 16 ;
static const uint8_t P9N2_C_ADDR_TRAP_REG_PCB_READ_NOTWRITE_OF_LAST_TRANSACTION_WITH_ERROR = 16 ;
static const uint8_t P9N2_C_ADDR_TRAP_REG_RESERVED_LAST_LT = 17 ;
static const uint8_t P9N2_C_ADDR_TRAP_REG_SERIAL2PARALLEL_STATE_MACHINE_AT_TIME_OF_ERROR = 18 ;
static const uint8_t P9N2_C_ADDR_TRAP_REG_SERIAL2PARALLEL_STATE_MACHINE_AT_TIME_OF_ERROR_LEN = 13 ;
static const uint8_t P9N2_C_ADDR_TRAP_REG_SATELLITE_ACKNOWLEDGE_BIT_RETURN_PARITY = 31 ;
static const uint8_t P9N2_C_ADDR_TRAP_REG_SATELLITE_ACKNOWLEDGE_BIT_WRITE_PARITY_ERROR = 32 ;
static const uint8_t P9N2_C_ADDR_TRAP_REG_SATELLITE_ACKNOWLEDGE_BIT_ACCESS_VIOLATION = 33 ;
static const uint8_t P9N2_C_ADDR_TRAP_REG_SATELLITE_ACKNOWLEDGE_BIT_INVALID_REGISTER = 34 ;
static const uint8_t P9N2_EQ_ASSIST_INTERRUPT_REG_ATTN = 0 ;
static const uint8_t P9N2_EQ_ASSIST_INTERRUPT_REG_RECOV = 1 ;
static const uint8_t P9N2_EQ_ASSIST_INTERRUPT_REG_XSTOP = 2 ;
static const uint8_t P9N2_EX_ASSIST_INTERRUPT_REG_ATTN = 0 ;
static const uint8_t P9N2_EX_ASSIST_INTERRUPT_REG_RECOV = 1 ;
static const uint8_t P9N2_EX_ASSIST_INTERRUPT_REG_XSTOP = 2 ;
static const uint8_t P9N2_C_ASSIST_INTERRUPT_REG_ATTN = 0 ;
static const uint8_t P9N2_C_ASSIST_INTERRUPT_REG_RECOV = 1 ;
static const uint8_t P9N2_C_ASSIST_INTERRUPT_REG_XSTOP = 2 ;
static const uint8_t P9N2_EQ_ATOMIC_LOCK_MASK_LATCH_REG_MASK = 0 ;
static const uint8_t P9N2_EQ_ATOMIC_LOCK_MASK_LATCH_REG_MASK_LEN = 16 ;
static const uint8_t P9N2_EX_ATOMIC_LOCK_MASK_LATCH_REG_MASK = 0 ;
static const uint8_t P9N2_EX_ATOMIC_LOCK_MASK_LATCH_REG_MASK_LEN = 16 ;
static const uint8_t P9N2_C_ATOMIC_LOCK_MASK_LATCH_REG_MASK = 0 ;
static const uint8_t P9N2_C_ATOMIC_LOCK_MASK_LATCH_REG_MASK_LEN = 16 ;
static const uint8_t P9N2_EQ_ATOMIC_LOCK_REG_ENABLE = 0 ;
static const uint8_t P9N2_EQ_ATOMIC_LOCK_REG_ID = 1 ;
static const uint8_t P9N2_EQ_ATOMIC_LOCK_REG_ID_LEN = 4 ;
static const uint8_t P9N2_EQ_ATOMIC_LOCK_REG_ACTIVITY = 8 ;
static const uint8_t P9N2_EQ_ATOMIC_LOCK_REG_ACTIVITY_LEN = 8 ;
static const uint8_t P9N2_EX_ATOMIC_LOCK_REG_ENABLE = 0 ;
static const uint8_t P9N2_EX_ATOMIC_LOCK_REG_ID = 1 ;
static const uint8_t P9N2_EX_ATOMIC_LOCK_REG_ID_LEN = 4 ;
static const uint8_t P9N2_EX_ATOMIC_LOCK_REG_ACTIVITY = 8 ;
static const uint8_t P9N2_EX_ATOMIC_LOCK_REG_ACTIVITY_LEN = 8 ;
static const uint8_t P9N2_C_ATOMIC_LOCK_REG_ENABLE = 0 ;
static const uint8_t P9N2_C_ATOMIC_LOCK_REG_ID = 1 ;
static const uint8_t P9N2_C_ATOMIC_LOCK_REG_ID_LEN = 4 ;
static const uint8_t P9N2_C_ATOMIC_LOCK_REG_ACTIVITY = 8 ;
static const uint8_t P9N2_C_ATOMIC_LOCK_REG_ACTIVITY_LEN = 8 ;
static const uint8_t P9N2_EQ_ATTN_INTERRUPT_REG_ATTN = 0 ;
static const uint8_t P9N2_EX_ATTN_INTERRUPT_REG_ATTN = 0 ;
static const uint8_t P9N2_C_ATTN_INTERRUPT_REG_ATTN = 0 ;
static const uint8_t P9N2_EQ_BIST_TC_START_TEST_DC = 0 ;
static const uint8_t P9N2_EQ_BIST_TC_SRAM_ABIST_MODE_DC = 1 ;
static const uint8_t P9N2_EQ_BIST_TC_EDRAM_ABIST_MODE_DC = 2 ;
static const uint8_t P9N2_EQ_BIST_TC_IOBIST_MODE_DC = 3 ;
static const uint8_t P9N2_EQ_BIST_PERV = 4 ;
static const uint8_t P9N2_EQ_BIST_UNIT1 = 5 ;
static const uint8_t P9N2_EQ_BIST_UNIT2 = 6 ;
static const uint8_t P9N2_EQ_BIST_UNIT3 = 7 ;
static const uint8_t P9N2_EQ_BIST_UNIT4 = 8 ;
static const uint8_t P9N2_EQ_BIST_UNIT5 = 9 ;
static const uint8_t P9N2_EQ_BIST_UNIT6 = 10 ;
static const uint8_t P9N2_EQ_BIST_UNIT7 = 11 ;
static const uint8_t P9N2_EQ_BIST_UNIT8 = 12 ;
static const uint8_t P9N2_EQ_BIST_UNIT9 = 13 ;
static const uint8_t P9N2_EQ_BIST_UNIT10 = 14 ;
static const uint8_t P9N2_EQ_BIST_STROBE_WINDOW_EN = 48 ;
static const uint8_t P9N2_EX_BIST_TC_START_TEST_DC = 0 ;
static const uint8_t P9N2_EX_BIST_TC_SRAM_ABIST_MODE_DC = 1 ;
static const uint8_t P9N2_EX_BIST_TC_EDRAM_ABIST_MODE_DC = 2 ;
static const uint8_t P9N2_EX_BIST_TC_IOBIST_MODE_DC = 3 ;
static const uint8_t P9N2_EX_BIST_PERV = 4 ;
static const uint8_t P9N2_EX_BIST_UNIT1 = 5 ;
static const uint8_t P9N2_EX_BIST_UNIT2 = 6 ;
static const uint8_t P9N2_EX_BIST_UNIT3 = 7 ;
static const uint8_t P9N2_EX_BIST_UNIT4 = 8 ;
static const uint8_t P9N2_EX_BIST_UNIT5 = 9 ;
static const uint8_t P9N2_EX_BIST_UNIT6 = 10 ;
static const uint8_t P9N2_EX_BIST_UNIT7 = 11 ;
static const uint8_t P9N2_EX_BIST_UNIT8 = 12 ;
static const uint8_t P9N2_EX_BIST_UNIT9 = 13 ;
static const uint8_t P9N2_EX_BIST_UNIT10 = 14 ;
static const uint8_t P9N2_EX_BIST_STROBE_WINDOW_EN = 48 ;
static const uint8_t P9N2_C_BIST_TC_START_TEST_DC = 0 ;
static const uint8_t P9N2_C_BIST_TC_SRAM_ABIST_MODE_DC = 1 ;
static const uint8_t P9N2_C_BIST_TC_EDRAM_ABIST_MODE_DC = 2 ;
static const uint8_t P9N2_C_BIST_TC_IOBIST_MODE_DC = 3 ;
static const uint8_t P9N2_C_BIST_PERV = 4 ;
static const uint8_t P9N2_C_BIST_UNIT1 = 5 ;
static const uint8_t P9N2_C_BIST_UNIT2 = 6 ;
static const uint8_t P9N2_C_BIST_UNIT3 = 7 ;
static const uint8_t P9N2_C_BIST_UNIT4 = 8 ;
static const uint8_t P9N2_C_BIST_UNIT5 = 9 ;
static const uint8_t P9N2_C_BIST_UNIT6 = 10 ;
static const uint8_t P9N2_C_BIST_UNIT7 = 11 ;
static const uint8_t P9N2_C_BIST_UNIT8 = 12 ;
static const uint8_t P9N2_C_BIST_UNIT9 = 13 ;
static const uint8_t P9N2_C_BIST_UNIT10 = 14 ;
static const uint8_t P9N2_C_BIST_STROBE_WINDOW_EN = 48 ;
static const uint8_t P9N2_EQ_CC_ATOMIC_LOCK_REG_ENABLE = 0 ;
static const uint8_t P9N2_EQ_CC_ATOMIC_LOCK_REG_ID = 1 ;
static const uint8_t P9N2_EQ_CC_ATOMIC_LOCK_REG_ID_LEN = 4 ;
static const uint8_t P9N2_EQ_CC_ATOMIC_LOCK_REG_ACTIVITY = 8 ;
static const uint8_t P9N2_EQ_CC_ATOMIC_LOCK_REG_ACTIVITY_LEN = 8 ;
static const uint8_t P9N2_EX_CC_ATOMIC_LOCK_REG_ENABLE = 0 ;
static const uint8_t P9N2_EX_CC_ATOMIC_LOCK_REG_ID = 1 ;
static const uint8_t P9N2_EX_CC_ATOMIC_LOCK_REG_ID_LEN = 4 ;
static const uint8_t P9N2_EX_CC_ATOMIC_LOCK_REG_ACTIVITY = 8 ;
static const uint8_t P9N2_EX_CC_ATOMIC_LOCK_REG_ACTIVITY_LEN = 8 ;
static const uint8_t P9N2_C_CC_ATOMIC_LOCK_REG_ENABLE = 0 ;
static const uint8_t P9N2_C_CC_ATOMIC_LOCK_REG_ID = 1 ;
static const uint8_t P9N2_C_CC_ATOMIC_LOCK_REG_ID_LEN = 4 ;
static const uint8_t P9N2_C_CC_ATOMIC_LOCK_REG_ACTIVITY = 8 ;
static const uint8_t P9N2_C_CC_ATOMIC_LOCK_REG_ACTIVITY_LEN = 8 ;
static const uint8_t P9N2_EQ_CC_PROTECT_MODE_REG_READ_ENABLE = 0 ;
static const uint8_t P9N2_EQ_CC_PROTECT_MODE_REG_WRITE_ENABLE = 1 ;
static const uint8_t P9N2_EX_CC_PROTECT_MODE_REG_READ_ENABLE = 0 ;
static const uint8_t P9N2_EX_CC_PROTECT_MODE_REG_WRITE_ENABLE = 1 ;
static const uint8_t P9N2_C_CC_PROTECT_MODE_REG_READ_ENABLE = 0 ;
static const uint8_t P9N2_C_CC_PROTECT_MODE_REG_WRITE_ENABLE = 1 ;
static const uint8_t P9N2_EQ_CLK_REGION_CLOCK_CMD = 0 ;
static const uint8_t P9N2_EQ_CLK_REGION_CLOCK_CMD_LEN = 2 ;
static const uint8_t P9N2_EQ_CLK_REGION_SLAVE_MODE = 2 ;
static const uint8_t P9N2_EQ_CLK_REGION_MASTER_MODE = 3 ;
static const uint8_t P9N2_EQ_CLK_REGION_CLOCK_PERV = 4 ;
static const uint8_t P9N2_EQ_CLK_REGION_CLOCK_UNIT1 = 5 ;
static const uint8_t P9N2_EQ_CLK_REGION_CLOCK_UNIT2 = 6 ;
static const uint8_t P9N2_EQ_CLK_REGION_CLOCK_UNIT3 = 7 ;
static const uint8_t P9N2_EQ_CLK_REGION_CLOCK_UNIT4 = 8 ;
static const uint8_t P9N2_EQ_CLK_REGION_CLOCK_UNIT5 = 9 ;
static const uint8_t P9N2_EQ_CLK_REGION_CLOCK_UNIT6 = 10 ;
static const uint8_t P9N2_EQ_CLK_REGION_CLOCK_UNIT7 = 11 ;
static const uint8_t P9N2_EQ_CLK_REGION_CLOCK_UNIT8 = 12 ;
static const uint8_t P9N2_EQ_CLK_REGION_CLOCK_UNIT9 = 13 ;
static const uint8_t P9N2_EQ_CLK_REGION_CLOCK_UNIT10 = 14 ;
static const uint8_t P9N2_EQ_CLK_REGION_SEL_THOLD_SL = 48 ;
static const uint8_t P9N2_EQ_CLK_REGION_SEL_THOLD_NSL = 49 ;
static const uint8_t P9N2_EQ_CLK_REGION_SEL_THOLD_ARY = 50 ;
static const uint8_t P9N2_EQ_CLK_REGION_CLOCK_PULSE_USE_EVEN = 52 ;
static const uint8_t P9N2_EX_CLK_REGION_CLOCK_CMD = 0 ;
static const uint8_t P9N2_EX_CLK_REGION_CLOCK_CMD_LEN = 2 ;
static const uint8_t P9N2_EX_CLK_REGION_SLAVE_MODE = 2 ;
static const uint8_t P9N2_EX_CLK_REGION_MASTER_MODE = 3 ;
static const uint8_t P9N2_EX_CLK_REGION_CLOCK_PERV = 4 ;
static const uint8_t P9N2_EX_CLK_REGION_CLOCK_UNIT1 = 5 ;
static const uint8_t P9N2_EX_CLK_REGION_CLOCK_UNIT2 = 6 ;
static const uint8_t P9N2_EX_CLK_REGION_CLOCK_UNIT3 = 7 ;
static const uint8_t P9N2_EX_CLK_REGION_CLOCK_UNIT4 = 8 ;
static const uint8_t P9N2_EX_CLK_REGION_CLOCK_UNIT5 = 9 ;
static const uint8_t P9N2_EX_CLK_REGION_CLOCK_UNIT6 = 10 ;
static const uint8_t P9N2_EX_CLK_REGION_CLOCK_UNIT7 = 11 ;
static const uint8_t P9N2_EX_CLK_REGION_CLOCK_UNIT8 = 12 ;
static const uint8_t P9N2_EX_CLK_REGION_CLOCK_UNIT9 = 13 ;
static const uint8_t P9N2_EX_CLK_REGION_CLOCK_UNIT10 = 14 ;
static const uint8_t P9N2_EX_CLK_REGION_SEL_THOLD_SL = 48 ;
static const uint8_t P9N2_EX_CLK_REGION_SEL_THOLD_NSL = 49 ;
static const uint8_t P9N2_EX_CLK_REGION_SEL_THOLD_ARY = 50 ;
static const uint8_t P9N2_EX_CLK_REGION_CLOCK_PULSE_USE_EVEN = 52 ;
static const uint8_t P9N2_C_CLK_REGION_CLOCK_CMD = 0 ;
static const uint8_t P9N2_C_CLK_REGION_CLOCK_CMD_LEN = 2 ;
static const uint8_t P9N2_C_CLK_REGION_SLAVE_MODE = 2 ;
static const uint8_t P9N2_C_CLK_REGION_MASTER_MODE = 3 ;
static const uint8_t P9N2_C_CLK_REGION_CLOCK_PERV = 4 ;
static const uint8_t P9N2_C_CLK_REGION_CLOCK_UNIT1 = 5 ;
static const uint8_t P9N2_C_CLK_REGION_CLOCK_UNIT2 = 6 ;
static const uint8_t P9N2_C_CLK_REGION_CLOCK_UNIT3 = 7 ;
static const uint8_t P9N2_C_CLK_REGION_CLOCK_UNIT4 = 8 ;
static const uint8_t P9N2_C_CLK_REGION_CLOCK_UNIT5 = 9 ;
static const uint8_t P9N2_C_CLK_REGION_CLOCK_UNIT6 = 10 ;
static const uint8_t P9N2_C_CLK_REGION_CLOCK_UNIT7 = 11 ;
static const uint8_t P9N2_C_CLK_REGION_CLOCK_UNIT8 = 12 ;
static const uint8_t P9N2_C_CLK_REGION_CLOCK_UNIT9 = 13 ;
static const uint8_t P9N2_C_CLK_REGION_CLOCK_UNIT10 = 14 ;
static const uint8_t P9N2_C_CLK_REGION_SEL_THOLD_SL = 48 ;
static const uint8_t P9N2_C_CLK_REGION_SEL_THOLD_NSL = 49 ;
static const uint8_t P9N2_C_CLK_REGION_SEL_THOLD_ARY = 50 ;
static const uint8_t P9N2_C_CLK_REGION_CLOCK_PULSE_USE_EVEN = 52 ;
static const uint8_t P9N2_EQ_CLOCK_STAT_ARY_STATUS_PERV = 4 ;
static const uint8_t P9N2_EQ_CLOCK_STAT_ARY_STATUS_UNIT1 = 5 ;
static const uint8_t P9N2_EQ_CLOCK_STAT_ARY_STATUS_UNIT2 = 6 ;
static const uint8_t P9N2_EQ_CLOCK_STAT_ARY_STATUS_UNIT3 = 7 ;
static const uint8_t P9N2_EQ_CLOCK_STAT_ARY_STATUS_UNIT4 = 8 ;
static const uint8_t P9N2_EQ_CLOCK_STAT_ARY_STATUS_UNIT5 = 9 ;
static const uint8_t P9N2_EQ_CLOCK_STAT_ARY_STATUS_UNIT6 = 10 ;
static const uint8_t P9N2_EQ_CLOCK_STAT_ARY_STATUS_UNIT7 = 11 ;
static const uint8_t P9N2_EQ_CLOCK_STAT_ARY_STATUS_UNIT8 = 12 ;
static const uint8_t P9N2_EQ_CLOCK_STAT_ARY_STATUS_UNIT9 = 13 ;
static const uint8_t P9N2_EQ_CLOCK_STAT_ARY_STATUS_UNIT10 = 14 ;
static const uint8_t P9N2_EX_CLOCK_STAT_ARY_STATUS_PERV = 4 ;
static const uint8_t P9N2_EX_CLOCK_STAT_ARY_STATUS_UNIT1 = 5 ;
static const uint8_t P9N2_EX_CLOCK_STAT_ARY_STATUS_UNIT2 = 6 ;
static const uint8_t P9N2_EX_CLOCK_STAT_ARY_STATUS_UNIT3 = 7 ;
static const uint8_t P9N2_EX_CLOCK_STAT_ARY_STATUS_UNIT4 = 8 ;
static const uint8_t P9N2_EX_CLOCK_STAT_ARY_STATUS_UNIT5 = 9 ;
static const uint8_t P9N2_EX_CLOCK_STAT_ARY_STATUS_UNIT6 = 10 ;
static const uint8_t P9N2_EX_CLOCK_STAT_ARY_STATUS_UNIT7 = 11 ;
static const uint8_t P9N2_EX_CLOCK_STAT_ARY_STATUS_UNIT8 = 12 ;
static const uint8_t P9N2_EX_CLOCK_STAT_ARY_STATUS_UNIT9 = 13 ;
static const uint8_t P9N2_EX_CLOCK_STAT_ARY_STATUS_UNIT10 = 14 ;
static const uint8_t P9N2_C_CLOCK_STAT_ARY_STATUS_PERV = 4 ;
static const uint8_t P9N2_C_CLOCK_STAT_ARY_STATUS_UNIT1 = 5 ;
static const uint8_t P9N2_C_CLOCK_STAT_ARY_STATUS_UNIT2 = 6 ;
static const uint8_t P9N2_C_CLOCK_STAT_ARY_STATUS_UNIT3 = 7 ;
static const uint8_t P9N2_C_CLOCK_STAT_ARY_STATUS_UNIT4 = 8 ;
static const uint8_t P9N2_C_CLOCK_STAT_ARY_STATUS_UNIT5 = 9 ;
static const uint8_t P9N2_C_CLOCK_STAT_ARY_STATUS_UNIT6 = 10 ;
static const uint8_t P9N2_C_CLOCK_STAT_ARY_STATUS_UNIT7 = 11 ;
static const uint8_t P9N2_C_CLOCK_STAT_ARY_STATUS_UNIT8 = 12 ;
static const uint8_t P9N2_C_CLOCK_STAT_ARY_STATUS_UNIT9 = 13 ;
static const uint8_t P9N2_C_CLOCK_STAT_ARY_STATUS_UNIT10 = 14 ;
static const uint8_t P9N2_EQ_CLOCK_STAT_NSL_STATUS_PERV = 4 ;
static const uint8_t P9N2_EQ_CLOCK_STAT_NSL_STATUS_UNIT1 = 5 ;
static const uint8_t P9N2_EQ_CLOCK_STAT_NSL_STATUS_UNIT2 = 6 ;
static const uint8_t P9N2_EQ_CLOCK_STAT_NSL_STATUS_UNIT3 = 7 ;
static const uint8_t P9N2_EQ_CLOCK_STAT_NSL_STATUS_UNIT4 = 8 ;
static const uint8_t P9N2_EQ_CLOCK_STAT_NSL_STATUS_UNIT5 = 9 ;
static const uint8_t P9N2_EQ_CLOCK_STAT_NSL_STATUS_UNIT6 = 10 ;
static const uint8_t P9N2_EQ_CLOCK_STAT_NSL_STATUS_UNIT7 = 11 ;
static const uint8_t P9N2_EQ_CLOCK_STAT_NSL_STATUS_UNIT8 = 12 ;
static const uint8_t P9N2_EQ_CLOCK_STAT_NSL_STATUS_UNIT9 = 13 ;
static const uint8_t P9N2_EQ_CLOCK_STAT_NSL_STATUS_UNIT10 = 14 ;
static const uint8_t P9N2_EX_CLOCK_STAT_NSL_STATUS_PERV = 4 ;
static const uint8_t P9N2_EX_CLOCK_STAT_NSL_STATUS_UNIT1 = 5 ;
static const uint8_t P9N2_EX_CLOCK_STAT_NSL_STATUS_UNIT2 = 6 ;
static const uint8_t P9N2_EX_CLOCK_STAT_NSL_STATUS_UNIT3 = 7 ;
static const uint8_t P9N2_EX_CLOCK_STAT_NSL_STATUS_UNIT4 = 8 ;
static const uint8_t P9N2_EX_CLOCK_STAT_NSL_STATUS_UNIT5 = 9 ;
static const uint8_t P9N2_EX_CLOCK_STAT_NSL_STATUS_UNIT6 = 10 ;
static const uint8_t P9N2_EX_CLOCK_STAT_NSL_STATUS_UNIT7 = 11 ;
static const uint8_t P9N2_EX_CLOCK_STAT_NSL_STATUS_UNIT8 = 12 ;
static const uint8_t P9N2_EX_CLOCK_STAT_NSL_STATUS_UNIT9 = 13 ;
static const uint8_t P9N2_EX_CLOCK_STAT_NSL_STATUS_UNIT10 = 14 ;
static const uint8_t P9N2_C_CLOCK_STAT_NSL_STATUS_PERV = 4 ;
static const uint8_t P9N2_C_CLOCK_STAT_NSL_STATUS_UNIT1 = 5 ;
static const uint8_t P9N2_C_CLOCK_STAT_NSL_STATUS_UNIT2 = 6 ;
static const uint8_t P9N2_C_CLOCK_STAT_NSL_STATUS_UNIT3 = 7 ;
static const uint8_t P9N2_C_CLOCK_STAT_NSL_STATUS_UNIT4 = 8 ;
static const uint8_t P9N2_C_CLOCK_STAT_NSL_STATUS_UNIT5 = 9 ;
static const uint8_t P9N2_C_CLOCK_STAT_NSL_STATUS_UNIT6 = 10 ;
static const uint8_t P9N2_C_CLOCK_STAT_NSL_STATUS_UNIT7 = 11 ;
static const uint8_t P9N2_C_CLOCK_STAT_NSL_STATUS_UNIT8 = 12 ;
static const uint8_t P9N2_C_CLOCK_STAT_NSL_STATUS_UNIT9 = 13 ;
static const uint8_t P9N2_C_CLOCK_STAT_NSL_STATUS_UNIT10 = 14 ;
static const uint8_t P9N2_EQ_CLOCK_STAT_SL_STATUS_PERV = 4 ;
static const uint8_t P9N2_EQ_CLOCK_STAT_SL_STATUS_UNIT1 = 5 ;
static const uint8_t P9N2_EQ_CLOCK_STAT_SL_STATUS_UNIT2 = 6 ;
static const uint8_t P9N2_EQ_CLOCK_STAT_SL_STATUS_UNIT3 = 7 ;
static const uint8_t P9N2_EQ_CLOCK_STAT_SL_STATUS_UNIT4 = 8 ;
static const uint8_t P9N2_EQ_CLOCK_STAT_SL_STATUS_UNIT5 = 9 ;
static const uint8_t P9N2_EQ_CLOCK_STAT_SL_STATUS_UNIT6 = 10 ;
static const uint8_t P9N2_EQ_CLOCK_STAT_SL_STATUS_UNIT7 = 11 ;
static const uint8_t P9N2_EQ_CLOCK_STAT_SL_STATUS_UNIT8 = 12 ;
static const uint8_t P9N2_EQ_CLOCK_STAT_SL_STATUS_UNIT9 = 13 ;
static const uint8_t P9N2_EQ_CLOCK_STAT_SL_STATUS_UNIT10 = 14 ;
static const uint8_t P9N2_EX_CLOCK_STAT_SL_STATUS_PERV = 4 ;
static const uint8_t P9N2_EX_CLOCK_STAT_SL_STATUS_UNIT1 = 5 ;
static const uint8_t P9N2_EX_CLOCK_STAT_SL_STATUS_UNIT2 = 6 ;
static const uint8_t P9N2_EX_CLOCK_STAT_SL_STATUS_UNIT3 = 7 ;
static const uint8_t P9N2_EX_CLOCK_STAT_SL_STATUS_UNIT4 = 8 ;
static const uint8_t P9N2_EX_CLOCK_STAT_SL_STATUS_UNIT5 = 9 ;
static const uint8_t P9N2_EX_CLOCK_STAT_SL_STATUS_UNIT6 = 10 ;
static const uint8_t P9N2_EX_CLOCK_STAT_SL_STATUS_UNIT7 = 11 ;
static const uint8_t P9N2_EX_CLOCK_STAT_SL_STATUS_UNIT8 = 12 ;
static const uint8_t P9N2_EX_CLOCK_STAT_SL_STATUS_UNIT9 = 13 ;
static const uint8_t P9N2_EX_CLOCK_STAT_SL_STATUS_UNIT10 = 14 ;
static const uint8_t P9N2_C_CLOCK_STAT_SL_STATUS_PERV = 4 ;
static const uint8_t P9N2_C_CLOCK_STAT_SL_STATUS_UNIT1 = 5 ;
static const uint8_t P9N2_C_CLOCK_STAT_SL_STATUS_UNIT2 = 6 ;
static const uint8_t P9N2_C_CLOCK_STAT_SL_STATUS_UNIT3 = 7 ;
static const uint8_t P9N2_C_CLOCK_STAT_SL_STATUS_UNIT4 = 8 ;
static const uint8_t P9N2_C_CLOCK_STAT_SL_STATUS_UNIT5 = 9 ;
static const uint8_t P9N2_C_CLOCK_STAT_SL_STATUS_UNIT6 = 10 ;
static const uint8_t P9N2_C_CLOCK_STAT_SL_STATUS_UNIT7 = 11 ;
static const uint8_t P9N2_C_CLOCK_STAT_SL_STATUS_UNIT8 = 12 ;
static const uint8_t P9N2_C_CLOCK_STAT_SL_STATUS_UNIT9 = 13 ;
static const uint8_t P9N2_C_CLOCK_STAT_SL_STATUS_UNIT10 = 14 ;
static const uint8_t P9N2_EX_CME_LCL_DBG_EN = 0 ;
static const uint8_t P9N2_EX_CME_LCL_DBG_HALT_ON_XSTOP = 1 ;
static const uint8_t P9N2_EX_CME_LCL_DBG_HALT_ON_TRIG = 2 ;
static const uint8_t P9N2_EX_CME_LCL_DBG_RESERVED3 = 3 ;
static const uint8_t P9N2_EX_CME_LCL_DBG_EN_INTR_ADDR = 4 ;
static const uint8_t P9N2_EX_CME_LCL_DBG_EN_TRACE_EXTRA = 5 ;
static const uint8_t P9N2_EX_CME_LCL_DBG_EN_TRACE_STALL = 6 ;
static const uint8_t P9N2_EX_CME_LCL_DBG_EN_WAIT_CYCLES = 7 ;
static const uint8_t P9N2_EX_CME_LCL_DBG_EN_FULL_SPEED = 8 ;
static const uint8_t P9N2_EX_CME_LCL_DBG_RESERVED9 = 9 ;
static const uint8_t P9N2_EX_CME_LCL_DBG_TRACE_MODE_SEL = 10 ;
static const uint8_t P9N2_EX_CME_LCL_DBG_TRACE_MODE_SEL_LEN = 2 ;
static const uint8_t P9N2_EX_CME_LCL_DBG_RESERVED12_15 = 12 ;
static const uint8_t P9N2_EX_CME_LCL_DBG_RESERVED12_15_LEN = 4 ;
static const uint8_t P9N2_EX_CME_LCL_DBG_FIR_TRIGGER = 16 ;
static const uint8_t P9N2_EX_CME_LCL_DBG_MIB_GPIO = 17 ;
static const uint8_t P9N2_EX_CME_LCL_DBG_MIB_GPIO_LEN = 3 ;
static const uint8_t P9N2_EX_CME_LCL_DBG_TRACE_DATA_SEL = 20 ;
static const uint8_t P9N2_EX_CME_LCL_DBG_TRACE_DATA_SEL_LEN = 4 ;
static const uint8_t P9N2_EX_CME_LCL_DBG_HALT_INPUT = 24 ;
static const uint8_t P9N2_EQ_CME_LCL_EIMR_INTERRUPT_MASK = 0 ;
static const uint8_t P9N2_EQ_CME_LCL_EIMR_INTERRUPT_MASK_LEN = 44 ;
static const uint8_t P9N2_EX_CME_LCL_EIMR_INTERRUPT_MASK = 0 ;
static const uint8_t P9N2_EX_CME_LCL_EIMR_INTERRUPT_MASK_LEN = 44 ;
static const uint8_t P9N2_EQ_CME_LCL_EINR_INTERRUPT_INPUT = 0 ;
static const uint8_t P9N2_EQ_CME_LCL_EINR_INTERRUPT_INPUT_LEN = 44 ;
static const uint8_t P9N2_EX_CME_LCL_EINR_INTERRUPT_INPUT = 0 ;
static const uint8_t P9N2_EX_CME_LCL_EINR_INTERRUPT_INPUT_LEN = 44 ;
static const uint8_t P9N2_EQ_CME_LCL_EIPR_INTERRUPT_POLARITY = 0 ;
static const uint8_t P9N2_EQ_CME_LCL_EIPR_INTERRUPT_POLARITY_LEN = 44 ;
static const uint8_t P9N2_EX_CME_LCL_EIPR_INTERRUPT_POLARITY = 0 ;
static const uint8_t P9N2_EX_CME_LCL_EIPR_INTERRUPT_POLARITY_LEN = 44 ;
static const uint8_t P9N2_EQ_CME_LCL_EISR_DEBUGGER = 0 ;
static const uint8_t P9N2_EQ_CME_LCL_EISR_DEBUG_TRIGGER = 1 ;
static const uint8_t P9N2_EQ_CME_LCL_EISR_QUAD_CHECKSTOP = 2 ;
static const uint8_t P9N2_EQ_CME_LCL_EISR_PVREF_FAIL = 3 ;
static const uint8_t P9N2_EQ_CME_LCL_EISR_OCC_HEARTBEAT_LOST = 4 ;
static const uint8_t P9N2_EQ_CME_LCL_EISR_CORE_CHECKSTOP = 5 ;
static const uint8_t P9N2_EQ_CME_LCL_EISR_DROPOUT_DETECT = 6 ;
static const uint8_t P9N2_EQ_CME_LCL_EISR_INTERCME_DIRECT_IN_0 = 7 ;
static const uint8_t P9N2_EQ_CME_LCL_EISR_BCE_BUSY_HIGH = 8 ;
static const uint8_t P9N2_EQ_CME_LCL_EISR_BCE_TIMEOUT = 9 ;
static const uint8_t P9N2_EQ_CME_LCL_EISR_DOORBELL3_C0 = 10 ;
static const uint8_t P9N2_EQ_CME_LCL_EISR_DOORBELL3_C1 = 11 ;
static const uint8_t P9N2_EQ_CME_LCL_EISR_PC_INTR_PENDING_C0 = 12 ;
static const uint8_t P9N2_EQ_CME_LCL_EISR_PC_INTR_PENDING_C1 = 13 ;
static const uint8_t P9N2_EQ_CME_LCL_EISR_SPECIAL_WAKEUP_C0 = 14 ;
static const uint8_t P9N2_EQ_CME_LCL_EISR_SPECIAL_WAKEUP_C1 = 15 ;
static const uint8_t P9N2_EQ_CME_LCL_EISR_REG_WAKEUP_C0 = 16 ;
static const uint8_t P9N2_EQ_CME_LCL_EISR_REG_WAKEUP_C1 = 17 ;
static const uint8_t P9N2_EQ_CME_LCL_EISR_DOORBELL2_C0 = 18 ;
static const uint8_t P9N2_EQ_CME_LCL_EISR_DOORBELL2_C1 = 19 ;
static const uint8_t P9N2_EQ_CME_LCL_EISR_PC_PM_STATE_ACTIVE_C0 = 20 ;
static const uint8_t P9N2_EQ_CME_LCL_EISR_PC_PM_STATE_ACTIVE_C1 = 21 ;
static const uint8_t P9N2_EQ_CME_LCL_EISR_L2_PURGE_DONE = 22 ;
static const uint8_t P9N2_EQ_CME_LCL_EISR_NCU_PURGE_DONE = 23 ;
static const uint8_t P9N2_EQ_CME_LCL_EISR_CHTM_PURGE_DONE_C0 = 24 ;
static const uint8_t P9N2_EQ_CME_LCL_EISR_CHTM_PURGE_DONE_C1 = 25 ;
static const uint8_t P9N2_EQ_CME_LCL_EISR_BCE_BUSY_LOW = 26 ;
static const uint8_t P9N2_EQ_CME_LCL_EISR_FINAL_VDM_DATA01 = 27 ;
static const uint8_t P9N2_EQ_CME_LCL_EISR_FINAL_VDM_DATA01_LEN = 2 ;
static const uint8_t P9N2_EQ_CME_LCL_EISR_COMM_RECVD = 29 ;
static const uint8_t P9N2_EQ_CME_LCL_EISR_COMM_SEND_ACK = 30 ;
static const uint8_t P9N2_EQ_CME_LCL_EISR_COMM_SEND_NACK = 31 ;
static const uint8_t P9N2_EQ_CME_LCL_EISR_BLOCK_REG_WAKEUP_C0 = 32 ;
static const uint8_t P9N2_EQ_CME_LCL_EISR_BLOCK_REG_WAKEUP_C1 = 33 ;
static const uint8_t P9N2_EQ_CME_LCL_EISR_PMCR_UPDATE_C0 = 34 ;
static const uint8_t P9N2_EQ_CME_LCL_EISR_PMCR_UPDATE_C1 = 35 ;
static const uint8_t P9N2_EQ_CME_LCL_EISR_DOORBELL0_C0 = 36 ;
static const uint8_t P9N2_EQ_CME_LCL_EISR_DOORBELL0_C1 = 37 ;
static const uint8_t P9N2_EQ_CME_LCL_EISR_INTERCME_DIRECT_IN_1_2 = 38 ;
static const uint8_t P9N2_EQ_CME_LCL_EISR_INTERCME_DIRECT_IN_1_2_LEN = 2 ;
static const uint8_t P9N2_EQ_CME_LCL_EISR_DOORBELL1_C0 = 40 ;
static const uint8_t P9N2_EQ_CME_LCL_EISR_DOORBELL1_C1 = 41 ;
static const uint8_t P9N2_EQ_CME_LCL_EISR_RESERVED_42_43 = 42 ;
static const uint8_t P9N2_EQ_CME_LCL_EISR_RESERVED_42_43_LEN = 2 ;
static const uint8_t P9N2_EX_CME_LCL_EISR_DEBUGGER = 0 ;
static const uint8_t P9N2_EX_CME_LCL_EISR_DEBUG_TRIGGER = 1 ;
static const uint8_t P9N2_EX_CME_LCL_EISR_QUAD_CHECKSTOP = 2 ;
static const uint8_t P9N2_EX_CME_LCL_EISR_PVREF_FAIL = 3 ;
static const uint8_t P9N2_EX_CME_LCL_EISR_OCC_HEARTBEAT_LOST = 4 ;
static const uint8_t P9N2_EX_CME_LCL_EISR_CORE_CHECKSTOP = 5 ;
static const uint8_t P9N2_EX_CME_LCL_EISR_DROPOUT_DETECT = 6 ;
static const uint8_t P9N2_EX_CME_LCL_EISR_INTERCME_DIRECT_IN_0 = 7 ;
static const uint8_t P9N2_EX_CME_LCL_EISR_BCE_BUSY_HIGH = 8 ;
static const uint8_t P9N2_EX_CME_LCL_EISR_BCE_TIMEOUT = 9 ;
static const uint8_t P9N2_EX_CME_LCL_EISR_DOORBELL3_C0 = 10 ;
static const uint8_t P9N2_EX_CME_LCL_EISR_DOORBELL3_C1 = 11 ;
static const uint8_t P9N2_EX_CME_LCL_EISR_PC_INTR_PENDING_C0 = 12 ;
static const uint8_t P9N2_EX_CME_LCL_EISR_PC_INTR_PENDING_C1 = 13 ;
static const uint8_t P9N2_EX_CME_LCL_EISR_SPECIAL_WAKEUP_C0 = 14 ;
static const uint8_t P9N2_EX_CME_LCL_EISR_SPECIAL_WAKEUP_C1 = 15 ;
static const uint8_t P9N2_EX_CME_LCL_EISR_REG_WAKEUP_C0 = 16 ;
static const uint8_t P9N2_EX_CME_LCL_EISR_REG_WAKEUP_C1 = 17 ;
static const uint8_t P9N2_EX_CME_LCL_EISR_DOORBELL2_C0 = 18 ;
static const uint8_t P9N2_EX_CME_LCL_EISR_DOORBELL2_C1 = 19 ;
static const uint8_t P9N2_EX_CME_LCL_EISR_PC_PM_STATE_ACTIVE_C0 = 20 ;
static const uint8_t P9N2_EX_CME_LCL_EISR_PC_PM_STATE_ACTIVE_C1 = 21 ;
static const uint8_t P9N2_EX_CME_LCL_EISR_L2_PURGE_DONE = 22 ;
static const uint8_t P9N2_EX_CME_LCL_EISR_NCU_PURGE_DONE = 23 ;
static const uint8_t P9N2_EX_CME_LCL_EISR_CHTM_PURGE_DONE_C0 = 24 ;
static const uint8_t P9N2_EX_CME_LCL_EISR_CHTM_PURGE_DONE_C1 = 25 ;
static const uint8_t P9N2_EX_CME_LCL_EISR_BCE_BUSY_LOW = 26 ;
static const uint8_t P9N2_EX_CME_LCL_EISR_FINAL_VDM_DATA01 = 27 ;
static const uint8_t P9N2_EX_CME_LCL_EISR_FINAL_VDM_DATA01_LEN = 2 ;
static const uint8_t P9N2_EX_CME_LCL_EISR_COMM_RECVD = 29 ;
static const uint8_t P9N2_EX_CME_LCL_EISR_COMM_SEND_ACK = 30 ;
static const uint8_t P9N2_EX_CME_LCL_EISR_COMM_SEND_NACK = 31 ;
static const uint8_t P9N2_EX_CME_LCL_EISR_BLOCK_REG_WAKEUP_C0 = 32 ;
static const uint8_t P9N2_EX_CME_LCL_EISR_BLOCK_REG_WAKEUP_C1 = 33 ;
static const uint8_t P9N2_EX_CME_LCL_EISR_PMCR_UPDATE_C0 = 34 ;
static const uint8_t P9N2_EX_CME_LCL_EISR_PMCR_UPDATE_C1 = 35 ;
static const uint8_t P9N2_EX_CME_LCL_EISR_DOORBELL0_C0 = 36 ;
static const uint8_t P9N2_EX_CME_LCL_EISR_DOORBELL0_C1 = 37 ;
static const uint8_t P9N2_EX_CME_LCL_EISR_INTERCME_DIRECT_IN_1_2 = 38 ;
static const uint8_t P9N2_EX_CME_LCL_EISR_INTERCME_DIRECT_IN_1_2_LEN = 2 ;
static const uint8_t P9N2_EX_CME_LCL_EISR_DOORBELL1_C0 = 40 ;
static const uint8_t P9N2_EX_CME_LCL_EISR_DOORBELL1_C1 = 41 ;
static const uint8_t P9N2_EX_CME_LCL_EISR_RESERVED_42_43 = 42 ;
static const uint8_t P9N2_EX_CME_LCL_EISR_RESERVED_42_43_LEN = 2 ;
static const uint8_t P9N2_EQ_CME_LCL_EISTR_INTERRUPT_STATUS = 0 ;
static const uint8_t P9N2_EQ_CME_LCL_EISTR_INTERRUPT_STATUS_LEN = 44 ;
static const uint8_t P9N2_EX_CME_LCL_EISTR_INTERRUPT_STATUS = 0 ;
static const uint8_t P9N2_EX_CME_LCL_EISTR_INTERRUPT_STATUS_LEN = 44 ;
static const uint8_t P9N2_EQ_CME_LCL_EITR_INTERRUPT_TYPE = 0 ;
static const uint8_t P9N2_EQ_CME_LCL_EITR_INTERRUPT_TYPE_LEN = 44 ;
static const uint8_t P9N2_EX_CME_LCL_EITR_INTERRUPT_TYPE = 0 ;
static const uint8_t P9N2_EX_CME_LCL_EITR_INTERRUPT_TYPE_LEN = 44 ;
static const uint8_t P9N2_EX_CME_LCL_ICCR_COMM_ACK = 0 ;
static const uint8_t P9N2_EX_CME_LCL_ICCR_COMM_NACK = 1 ;
static const uint8_t P9N2_EX_CME_LCL_ICCR_ICRR_INTERCME_DIRECT_OUT = 5 ;
static const uint8_t P9N2_EX_CME_LCL_ICCR_ICRR_INTERCME_DIRECT_OUT_LEN = 3 ;
static const uint8_t P9N2_EX_CME_LCL_ICCR_ICRR_INTERCME_DIRECT_IN = 9 ;
static const uint8_t P9N2_EX_CME_LCL_ICCR_ICRR_INTERCME_DIRECT_IN_LEN = 3 ;
static const uint8_t P9N2_EQ_CME_LCL_ICRR_COMM_RECV = 0 ;
static const uint8_t P9N2_EQ_CME_LCL_ICRR_COMM_RECV_LEN = 32 ;
static const uint8_t P9N2_EX_CME_LCL_ICRR_COMM_RECV = 0 ;
static const uint8_t P9N2_EX_CME_LCL_ICRR_COMM_RECV_LEN = 32 ;
static const uint8_t P9N2_EX_CME_LCL_ICSR_COMM_SEND = 0 ;
static const uint8_t P9N2_EX_CME_LCL_ICSR_COMM_SEND_LEN = 32 ;
static const uint8_t P9N2_EX_CME_LCL_PECESR0_PECE_C_N_T0 = 0 ;
static const uint8_t P9N2_EX_CME_LCL_PECESR0_PECE_C_N_T0_LEN = 6 ;
static const uint8_t P9N2_EX_CME_LCL_PECESR0_PECE_C_N_T1 = 8 ;
static const uint8_t P9N2_EX_CME_LCL_PECESR0_PECE_C_N_T1_LEN = 6 ;
static const uint8_t P9N2_EX_CME_LCL_PECESR0_PECE_C_N_T2 = 16 ;
static const uint8_t P9N2_EX_CME_LCL_PECESR0_PECE_C_N_T2_LEN = 6 ;
static const uint8_t P9N2_EX_CME_LCL_PECESR0_PECE_C_N_T3 = 24 ;
static const uint8_t P9N2_EX_CME_LCL_PECESR0_PECE_C_N_T3_LEN = 6 ;
static const uint8_t P9N2_EX_CME_LCL_PECESR0_USE_PECE = 32 ;
static const uint8_t P9N2_EX_CME_LCL_PECESR0_USE_PECE_LEN = 4 ;
static const uint8_t P9N2_EX_CME_LCL_PECESR1_PECE_C_N_T0 = 0 ;
static const uint8_t P9N2_EX_CME_LCL_PECESR1_PECE_C_N_T0_LEN = 6 ;
static const uint8_t P9N2_EX_CME_LCL_PECESR1_PECE_C_N_T1 = 8 ;
static const uint8_t P9N2_EX_CME_LCL_PECESR1_PECE_C_N_T1_LEN = 6 ;
static const uint8_t P9N2_EX_CME_LCL_PECESR1_PECE_C_N_T2 = 16 ;
static const uint8_t P9N2_EX_CME_LCL_PECESR1_PECE_C_N_T2_LEN = 6 ;
static const uint8_t P9N2_EX_CME_LCL_PECESR1_PECE_C_N_T3 = 24 ;
static const uint8_t P9N2_EX_CME_LCL_PECESR1_PECE_C_N_T3_LEN = 6 ;
static const uint8_t P9N2_EX_CME_LCL_PECESR1_USE_PECE = 32 ;
static const uint8_t P9N2_EX_CME_LCL_PECESR1_USE_PECE_LEN = 4 ;
static const uint8_t P9N2_EQ_CME_LCL_SISR_PM_ENTRY_ACK_C0_ACTUAL = 0 ;
static const uint8_t P9N2_EQ_CME_LCL_SISR_PM_ENTRY_ACK_C1_ACTUAL = 1 ;
static const uint8_t P9N2_EQ_CME_LCL_SISR_PM_BLOCK_INTERRUPTS_C0_ACTUAL = 2 ;
static const uint8_t P9N2_EQ_CME_LCL_SISR_PM_BLOCK_INTERRUPTS_C1_ACTUAL = 3 ;
static const uint8_t P9N2_EQ_CME_LCL_SISR_PM_EXIT_C0_ACTUAL = 4 ;
static const uint8_t P9N2_EQ_CME_LCL_SISR_PM_EXIT_C1_ACTUAL = 5 ;
static const uint8_t P9N2_EQ_CME_LCL_SISR_RESERVED_6_8 = 6 ;
static const uint8_t P9N2_EQ_CME_LCL_SISR_RESERVED_6_8_LEN = 3 ;
static const uint8_t P9N2_EQ_CME_LCL_SISR_FUSED_CORE_MODE = 9 ;
static const uint8_t P9N2_EQ_CME_LCL_SISR_PCBMUX_GRANT_C0 = 10 ;
static const uint8_t P9N2_EQ_CME_LCL_SISR_PCBMUX_GRANT_C1 = 11 ;
static const uint8_t P9N2_EQ_CME_LCL_SISR_PCB_RSP_OOB_0123_C0 = 12 ;
static const uint8_t P9N2_EQ_CME_LCL_SISR_PCB_RSP_OOB_0123_C0_LEN = 4 ;
static const uint8_t P9N2_EQ_CME_LCL_SISR_SPECIAL_WAKEUP_DONE_C0_ACTUAL = 16 ;
static const uint8_t P9N2_EQ_CME_LCL_SISR_SPECIAL_WAKEUP_DONE_C1_ACTUAL = 17 ;
static const uint8_t P9N2_EQ_CME_LCL_SISR_RESERVED_18_19 = 18 ;
static const uint8_t P9N2_EQ_CME_LCL_SISR_RESERVED_18_19_LEN = 2 ;
static const uint8_t P9N2_EQ_CME_LCL_SISR_PC_THREAD_INSTR_RUNNING_C0 = 20 ;
static const uint8_t P9N2_EQ_CME_LCL_SISR_PC_THREAD_INSTR_RUNNING_C0_LEN = 4 ;
static const uint8_t P9N2_EQ_CME_LCL_SISR_PC_THREAD_INSTR_RUNNING_C1 = 24 ;
static const uint8_t P9N2_EQ_CME_LCL_SISR_PC_THREAD_INSTR_RUNNING_C1_LEN = 4 ;
static const uint8_t P9N2_EQ_CME_LCL_SISR_RESERVED_28_29 = 28 ;
static const uint8_t P9N2_EQ_CME_LCL_SISR_RESERVED_28_29_LEN = 2 ;
static const uint8_t P9N2_EQ_CME_LCL_SISR_L2_INTF_QUIESCE_DONE_LVL_0_1 = 30 ;
static const uint8_t P9N2_EQ_CME_LCL_SISR_L2_INTF_QUIESCE_DONE_LVL_0_1_LEN = 2 ;
static const uint8_t P9N2_EQ_CME_LCL_SISR_PC_UNMASKED_ATTN_C0 = 32 ;
static const uint8_t P9N2_EQ_CME_LCL_SISR_PC_UNMASKED_ATTN_C1 = 33 ;
static const uint8_t P9N2_EQ_CME_LCL_SISR_PM_STATE_ACTIVE_C0 = 34 ;
static const uint8_t P9N2_EQ_CME_LCL_SISR_PM_STATE_ACTIVE_C1 = 35 ;
static const uint8_t P9N2_EQ_CME_LCL_SISR_PM_STATE_C0 = 36 ;
static const uint8_t P9N2_EQ_CME_LCL_SISR_PM_STATE_C0_LEN = 4 ;
static const uint8_t P9N2_EQ_CME_LCL_SISR_PM_STATE_C1 = 40 ;
static const uint8_t P9N2_EQ_CME_LCL_SISR_PM_STATE_C1_LEN = 4 ;
static const uint8_t P9N2_EQ_CME_LCL_SISR_PM_STATE_ALL_HV_C0 = 44 ;
static const uint8_t P9N2_EQ_CME_LCL_SISR_PM_STATE_ALL_HV_C1 = 45 ;
static const uint8_t P9N2_EQ_CME_LCL_SISR_PC_INSTR_RUNNING_C0 = 46 ;
static const uint8_t P9N2_EQ_CME_LCL_SISR_PC_INSTR_RUNNING_C1 = 47 ;
static const uint8_t P9N2_EQ_CME_LCL_SISR_PC_NON_HV_RUNNING_C0 = 48 ;
static const uint8_t P9N2_EQ_CME_LCL_SISR_PC_NON_HV_RUNNING_C0_LEN = 4 ;
static const uint8_t P9N2_EQ_CME_LCL_SISR_PC_NON_HV_RUNNING_C1 = 52 ;
static const uint8_t P9N2_EQ_CME_LCL_SISR_PC_NON_HV_RUNNING_C1_LEN = 4 ;
static const uint8_t P9N2_EQ_CME_LCL_SISR_ALLOW_REG_WAKEUP_C0 = 56 ;
static const uint8_t P9N2_EQ_CME_LCL_SISR_ALLOW_REG_WAKEUP_C1 = 57 ;
static const uint8_t P9N2_EQ_CME_LCL_SISR_PCB_RSP_OOB_9_C0 = 58 ;
static const uint8_t P9N2_EQ_CME_LCL_SISR_PCB_RSP_OOB_9_C1 = 59 ;
static const uint8_t P9N2_EQ_CME_LCL_SISR_PCB_RSP_OOB_0123_C1 = 60 ;
static const uint8_t P9N2_EQ_CME_LCL_SISR_PCB_RSP_OOB_0123_C1_LEN = 4 ;
static const uint8_t P9N2_EX_CME_LCL_SISR_PM_ENTRY_ACK_C0_ACTUAL = 0 ;
static const uint8_t P9N2_EX_CME_LCL_SISR_PM_ENTRY_ACK_C1_ACTUAL = 1 ;
static const uint8_t P9N2_EX_CME_LCL_SISR_PM_BLOCK_INTERRUPTS_C0_ACTUAL = 2 ;
static const uint8_t P9N2_EX_CME_LCL_SISR_PM_BLOCK_INTERRUPTS_C1_ACTUAL = 3 ;
static const uint8_t P9N2_EX_CME_LCL_SISR_PM_EXIT_C0_ACTUAL = 4 ;
static const uint8_t P9N2_EX_CME_LCL_SISR_PM_EXIT_C1_ACTUAL = 5 ;
static const uint8_t P9N2_EX_CME_LCL_SISR_RESERVED_6_8 = 6 ;
static const uint8_t P9N2_EX_CME_LCL_SISR_RESERVED_6_8_LEN = 3 ;
static const uint8_t P9N2_EX_CME_LCL_SISR_FUSED_CORE_MODE = 9 ;
static const uint8_t P9N2_EX_CME_LCL_SISR_PCBMUX_GRANT_C0 = 10 ;
static const uint8_t P9N2_EX_CME_LCL_SISR_PCBMUX_GRANT_C1 = 11 ;
static const uint8_t P9N2_EX_CME_LCL_SISR_PCB_RSP_OOB_0123_C0 = 12 ;
static const uint8_t P9N2_EX_CME_LCL_SISR_PCB_RSP_OOB_0123_C0_LEN = 4 ;
static const uint8_t P9N2_EX_CME_LCL_SISR_SPECIAL_WAKEUP_DONE_C0_ACTUAL = 16 ;
static const uint8_t P9N2_EX_CME_LCL_SISR_SPECIAL_WAKEUP_DONE_C1_ACTUAL = 17 ;
static const uint8_t P9N2_EX_CME_LCL_SISR_RESERVED_18_19 = 18 ;
static const uint8_t P9N2_EX_CME_LCL_SISR_RESERVED_18_19_LEN = 2 ;
static const uint8_t P9N2_EX_CME_LCL_SISR_PC_THREAD_INSTR_RUNNING_C0 = 20 ;
static const uint8_t P9N2_EX_CME_LCL_SISR_PC_THREAD_INSTR_RUNNING_C0_LEN = 4 ;
static const uint8_t P9N2_EX_CME_LCL_SISR_PC_THREAD_INSTR_RUNNING_C1 = 24 ;
static const uint8_t P9N2_EX_CME_LCL_SISR_PC_THREAD_INSTR_RUNNING_C1_LEN = 4 ;
static const uint8_t P9N2_EX_CME_LCL_SISR_RESERVED_28_29 = 28 ;
static const uint8_t P9N2_EX_CME_LCL_SISR_RESERVED_28_29_LEN = 2 ;
static const uint8_t P9N2_EX_CME_LCL_SISR_L2_INTF_QUIESCE_DONE_LVL_0_1 = 30 ;
static const uint8_t P9N2_EX_CME_LCL_SISR_L2_INTF_QUIESCE_DONE_LVL_0_1_LEN = 2 ;
static const uint8_t P9N2_EX_CME_LCL_SISR_PC_UNMASKED_ATTN_C0 = 32 ;
static const uint8_t P9N2_EX_CME_LCL_SISR_PC_UNMASKED_ATTN_C1 = 33 ;
static const uint8_t P9N2_EX_CME_LCL_SISR_PM_STATE_ACTIVE_C0 = 34 ;
static const uint8_t P9N2_EX_CME_LCL_SISR_PM_STATE_ACTIVE_C1 = 35 ;
static const uint8_t P9N2_EX_CME_LCL_SISR_PM_STATE_C0 = 36 ;
static const uint8_t P9N2_EX_CME_LCL_SISR_PM_STATE_C0_LEN = 4 ;
static const uint8_t P9N2_EX_CME_LCL_SISR_PM_STATE_C1 = 40 ;
static const uint8_t P9N2_EX_CME_LCL_SISR_PM_STATE_C1_LEN = 4 ;
static const uint8_t P9N2_EX_CME_LCL_SISR_PM_STATE_ALL_HV_C0 = 44 ;
static const uint8_t P9N2_EX_CME_LCL_SISR_PM_STATE_ALL_HV_C1 = 45 ;
static const uint8_t P9N2_EX_CME_LCL_SISR_PC_INSTR_RUNNING_C0 = 46 ;
static const uint8_t P9N2_EX_CME_LCL_SISR_PC_INSTR_RUNNING_C1 = 47 ;
static const uint8_t P9N2_EX_CME_LCL_SISR_PC_NON_HV_RUNNING_C0 = 48 ;
static const uint8_t P9N2_EX_CME_LCL_SISR_PC_NON_HV_RUNNING_C0_LEN = 4 ;
static const uint8_t P9N2_EX_CME_LCL_SISR_PC_NON_HV_RUNNING_C1 = 52 ;
static const uint8_t P9N2_EX_CME_LCL_SISR_PC_NON_HV_RUNNING_C1_LEN = 4 ;
static const uint8_t P9N2_EX_CME_LCL_SISR_ALLOW_REG_WAKEUP_C0 = 56 ;
static const uint8_t P9N2_EX_CME_LCL_SISR_ALLOW_REG_WAKEUP_C1 = 57 ;
static const uint8_t P9N2_EX_CME_LCL_SISR_PCB_RSP_OOB_9_C0 = 58 ;
static const uint8_t P9N2_EX_CME_LCL_SISR_PCB_RSP_OOB_9_C1 = 59 ;
static const uint8_t P9N2_EX_CME_LCL_SISR_PCB_RSP_OOB_0123_C1 = 60 ;
static const uint8_t P9N2_EX_CME_LCL_SISR_PCB_RSP_OOB_0123_C1_LEN = 4 ;
static const uint8_t P9N2_EX_CME_LCL_TSEL_FIT_SEL = 0 ;
static const uint8_t P9N2_EX_CME_LCL_TSEL_FIT_SEL_LEN = 4 ;
static const uint8_t P9N2_EX_CME_LCL_TSEL_WATCHDOG_SEL = 4 ;
static const uint8_t P9N2_EX_CME_LCL_TSEL_WATCHDOG_SEL_LEN = 4 ;
static const uint8_t P9N2_EQ_CME_SCOM_AFSR_INST_CYCLE_SAMPLE = 0 ;
static const uint8_t P9N2_EQ_CME_SCOM_AFSR_INST_CYCLE_SAMPLE_LEN = 20 ;
static const uint8_t P9N2_EQ_CME_SCOM_AFSR_AVG_CYCLE_SAMPLE = 32 ;
static const uint8_t P9N2_EQ_CME_SCOM_AFSR_AVG_CYCLE_SAMPLE_LEN = 20 ;
static const uint8_t P9N2_EQ_CME_SCOM_AFSR_SAMPLE_VALID = 63 ;
static const uint8_t P9N2_EX_CME_SCOM_AFSR_INST_CYCLE_SAMPLE = 0 ;
static const uint8_t P9N2_EX_CME_SCOM_AFSR_INST_CYCLE_SAMPLE_LEN = 20 ;
static const uint8_t P9N2_EX_CME_SCOM_AFSR_AVG_CYCLE_SAMPLE = 32 ;
static const uint8_t P9N2_EX_CME_SCOM_AFSR_AVG_CYCLE_SAMPLE_LEN = 20 ;
static const uint8_t P9N2_EX_CME_SCOM_AFSR_SAMPLE_VALID = 63 ;
static const uint8_t P9N2_EQ_CME_SCOM_AFTR_MAX_CYCLE_SAMPLE = 0 ;
static const uint8_t P9N2_EQ_CME_SCOM_AFTR_MAX_CYCLE_SAMPLE_LEN = 20 ;
static const uint8_t P9N2_EQ_CME_SCOM_AFTR_MIN_CYCLE_SAMPLE = 32 ;
static const uint8_t P9N2_EQ_CME_SCOM_AFTR_MIN_CYCLE_SAMPLE_LEN = 20 ;
static const uint8_t P9N2_EX_CME_SCOM_AFTR_MAX_CYCLE_SAMPLE = 0 ;
static const uint8_t P9N2_EX_CME_SCOM_AFTR_MAX_CYCLE_SAMPLE_LEN = 20 ;
static const uint8_t P9N2_EX_CME_SCOM_AFTR_MIN_CYCLE_SAMPLE = 32 ;
static const uint8_t P9N2_EX_CME_SCOM_AFTR_MIN_CYCLE_SAMPLE_LEN = 20 ;
static const uint8_t P9N2_EQ_CME_SCOM_BCEBAR0_BASE = 8 ;
static const uint8_t P9N2_EQ_CME_SCOM_BCEBAR0_BASE_LEN = 36 ;
static const uint8_t P9N2_EQ_CME_SCOM_BCEBAR0_RD_SCOPE = 57 ;
static const uint8_t P9N2_EQ_CME_SCOM_BCEBAR0_RD_SCOPE_LEN = 2 ;
static const uint8_t P9N2_EQ_CME_SCOM_BCEBAR0_WR_SCOPE = 59 ;
static const uint8_t P9N2_EQ_CME_SCOM_BCEBAR0_VG_TARGET_SEL = 60 ;
static const uint8_t P9N2_EQ_CME_SCOM_BCEBAR0_SIZE = 61 ;
static const uint8_t P9N2_EQ_CME_SCOM_BCEBAR0_SIZE_LEN = 3 ;
static const uint8_t P9N2_EX_CME_SCOM_BCEBAR0_BASE = 8 ;
static const uint8_t P9N2_EX_CME_SCOM_BCEBAR0_BASE_LEN = 36 ;
static const uint8_t P9N2_EX_CME_SCOM_BCEBAR0_RD_SCOPE = 57 ;
static const uint8_t P9N2_EX_CME_SCOM_BCEBAR0_RD_SCOPE_LEN = 2 ;
static const uint8_t P9N2_EX_CME_SCOM_BCEBAR0_WR_SCOPE = 59 ;
static const uint8_t P9N2_EX_CME_SCOM_BCEBAR0_VG_TARGET_SEL = 60 ;
static const uint8_t P9N2_EX_CME_SCOM_BCEBAR0_SIZE = 61 ;
static const uint8_t P9N2_EX_CME_SCOM_BCEBAR0_SIZE_LEN = 3 ;
static const uint8_t P9N2_EQ_CME_SCOM_BCEBAR1_BASE = 8 ;
static const uint8_t P9N2_EQ_CME_SCOM_BCEBAR1_BASE_LEN = 36 ;
static const uint8_t P9N2_EQ_CME_SCOM_BCEBAR1_RD_SCOPE = 57 ;
static const uint8_t P9N2_EQ_CME_SCOM_BCEBAR1_RD_SCOPE_LEN = 2 ;
static const uint8_t P9N2_EQ_CME_SCOM_BCEBAR1_WR_SCOPE = 59 ;
static const uint8_t P9N2_EQ_CME_SCOM_BCEBAR1_VG_TARGET_SEL = 60 ;
static const uint8_t P9N2_EQ_CME_SCOM_BCEBAR1_SIZE = 61 ;
static const uint8_t P9N2_EQ_CME_SCOM_BCEBAR1_SIZE_LEN = 3 ;
static const uint8_t P9N2_EX_CME_SCOM_BCEBAR1_BASE = 8 ;
static const uint8_t P9N2_EX_CME_SCOM_BCEBAR1_BASE_LEN = 36 ;
static const uint8_t P9N2_EX_CME_SCOM_BCEBAR1_RD_SCOPE = 57 ;
static const uint8_t P9N2_EX_CME_SCOM_BCEBAR1_RD_SCOPE_LEN = 2 ;
static const uint8_t P9N2_EX_CME_SCOM_BCEBAR1_WR_SCOPE = 59 ;
static const uint8_t P9N2_EX_CME_SCOM_BCEBAR1_VG_TARGET_SEL = 60 ;
static const uint8_t P9N2_EX_CME_SCOM_BCEBAR1_SIZE = 61 ;
static const uint8_t P9N2_EX_CME_SCOM_BCEBAR1_SIZE_LEN = 3 ;
static const uint8_t P9N2_EQ_CME_SCOM_BCECSR_BUSY = 0 ;
static const uint8_t P9N2_EQ_CME_SCOM_BCECSR_ERROR = 1 ;
static const uint8_t P9N2_EQ_CME_SCOM_BCECSR_RNW = 4 ;
static const uint8_t P9N2_EQ_CME_SCOM_BCECSR_BARSEL = 5 ;
static const uint8_t P9N2_EQ_CME_SCOM_BCECSR_PRIORITY = 6 ;
static const uint8_t P9N2_EQ_CME_SCOM_BCECSR_INJECT_ERR = 7 ;
static const uint8_t P9N2_EQ_CME_SCOM_BCECSR_TYPE = 13 ;
static const uint8_t P9N2_EQ_CME_SCOM_BCECSR_TYPE_LEN = 3 ;
static const uint8_t P9N2_EQ_CME_SCOM_BCECSR_NUM_BLOCKS = 17 ;
static const uint8_t P9N2_EQ_CME_SCOM_BCECSR_NUM_BLOCKS_LEN = 11 ;
static const uint8_t P9N2_EQ_CME_SCOM_BCECSR_SBASE = 28 ;
static const uint8_t P9N2_EQ_CME_SCOM_BCECSR_SBASE_LEN = 12 ;
static const uint8_t P9N2_EQ_CME_SCOM_BCECSR_MBASE = 42 ;
static const uint8_t P9N2_EQ_CME_SCOM_BCECSR_MBASE_LEN = 22 ;
static const uint8_t P9N2_EX_CME_SCOM_BCECSR_BUSY = 0 ;
static const uint8_t P9N2_EX_CME_SCOM_BCECSR_ERROR = 1 ;
static const uint8_t P9N2_EX_CME_SCOM_BCECSR_RNW = 4 ;
static const uint8_t P9N2_EX_CME_SCOM_BCECSR_BARSEL = 5 ;
static const uint8_t P9N2_EX_CME_SCOM_BCECSR_PRIORITY = 6 ;
static const uint8_t P9N2_EX_CME_SCOM_BCECSR_INJECT_ERR = 7 ;
static const uint8_t P9N2_EX_CME_SCOM_BCECSR_TYPE = 13 ;
static const uint8_t P9N2_EX_CME_SCOM_BCECSR_TYPE_LEN = 3 ;
static const uint8_t P9N2_EX_CME_SCOM_BCECSR_NUM_BLOCKS = 17 ;
static const uint8_t P9N2_EX_CME_SCOM_BCECSR_NUM_BLOCKS_LEN = 11 ;
static const uint8_t P9N2_EX_CME_SCOM_BCECSR_SBASE = 28 ;
static const uint8_t P9N2_EX_CME_SCOM_BCECSR_SBASE_LEN = 12 ;
static const uint8_t P9N2_EX_CME_SCOM_BCECSR_MBASE = 42 ;
static const uint8_t P9N2_EX_CME_SCOM_BCECSR_MBASE_LEN = 22 ;
static const uint8_t P9N2_EQ_CME_SCOM_CIDSR_C0_DROPOUT_EVENT_COUNT = 0 ;
static const uint8_t P9N2_EQ_CME_SCOM_CIDSR_C0_DROPOUT_EVENT_COUNT_LEN = 24 ;
static const uint8_t P9N2_EQ_CME_SCOM_CIDSR_C0_DROPOUT_INAROW_COUNT = 24 ;
static const uint8_t P9N2_EQ_CME_SCOM_CIDSR_C0_DROPOUT_INAROW_COUNT_LEN = 8 ;
static const uint8_t P9N2_EQ_CME_SCOM_CIDSR_C1_DROPOUT_EVENT_COUNT = 32 ;
static const uint8_t P9N2_EQ_CME_SCOM_CIDSR_C1_DROPOUT_EVENT_COUNT_LEN = 24 ;
static const uint8_t P9N2_EQ_CME_SCOM_CIDSR_C1_DROPOUT_INAROW_COUNT = 56 ;
static const uint8_t P9N2_EQ_CME_SCOM_CIDSR_C1_DROPOUT_INAROW_COUNT_LEN = 8 ;
static const uint8_t P9N2_EX_CME_SCOM_CIDSR_C0_DROPOUT_EVENT_COUNT = 0 ;
static const uint8_t P9N2_EX_CME_SCOM_CIDSR_C0_DROPOUT_EVENT_COUNT_LEN = 24 ;
static const uint8_t P9N2_EX_CME_SCOM_CIDSR_C0_DROPOUT_INAROW_COUNT = 24 ;
static const uint8_t P9N2_EX_CME_SCOM_CIDSR_C0_DROPOUT_INAROW_COUNT_LEN = 8 ;
static const uint8_t P9N2_EX_CME_SCOM_CIDSR_C1_DROPOUT_EVENT_COUNT = 32 ;
static const uint8_t P9N2_EX_CME_SCOM_CIDSR_C1_DROPOUT_EVENT_COUNT_LEN = 24 ;
static const uint8_t P9N2_EX_CME_SCOM_CIDSR_C1_DROPOUT_INAROW_COUNT = 56 ;
static const uint8_t P9N2_EX_CME_SCOM_CIDSR_C1_DROPOUT_INAROW_COUNT_LEN = 8 ;
static const uint8_t P9N2_EQ_CME_SCOM_EIIR_DEBUGGER = 0 ;
static const uint8_t P9N2_EQ_CME_SCOM_EIIR_DEBUG_TRIGGER = 1 ;
static const uint8_t P9N2_EQ_CME_SCOM_EIIR_BCE_TIMEOUT = 9 ;
static const uint8_t P9N2_EQ_CME_SCOM_EIIR_PC_INTR_PENDING_C0 = 12 ;
static const uint8_t P9N2_EQ_CME_SCOM_EIIR_PC_INTR_PENDING_C1 = 13 ;
static const uint8_t P9N2_EQ_CME_SCOM_EIIR_SPECIAL_WAKEUP_C0 = 14 ;
static const uint8_t P9N2_EQ_CME_SCOM_EIIR_SPECIAL_WAKEUP_C1 = 15 ;
static const uint8_t P9N2_EQ_CME_SCOM_EIIR_REG_WAKEUP_C0 = 16 ;
static const uint8_t P9N2_EQ_CME_SCOM_EIIR_REG_WAKEUP_C1 = 17 ;
static const uint8_t P9N2_EQ_CME_SCOM_EIIR_PC_PM_STATE_ACTIVE_C0 = 20 ;
static const uint8_t P9N2_EQ_CME_SCOM_EIIR_PC_PM_STATE_ACTIVE_C1 = 21 ;
static const uint8_t P9N2_EQ_CME_SCOM_EIIR_L2_PURGE_DONE = 22 ;
static const uint8_t P9N2_EQ_CME_SCOM_EIIR_NCU_PURGE_DONE = 23 ;
static const uint8_t P9N2_EQ_CME_SCOM_EIIR_CHTM_PURGE_DONE_C0 = 24 ;
static const uint8_t P9N2_EQ_CME_SCOM_EIIR_CHTM_PURGE_DONE_C1 = 25 ;
static const uint8_t P9N2_EX_CME_SCOM_EIIR_DEBUGGER = 0 ;
static const uint8_t P9N2_EX_CME_SCOM_EIIR_DEBUG_TRIGGER = 1 ;
static const uint8_t P9N2_EX_CME_SCOM_EIIR_BCE_TIMEOUT = 9 ;
static const uint8_t P9N2_EX_CME_SCOM_EIIR_PC_INTR_PENDING_C0 = 12 ;
static const uint8_t P9N2_EX_CME_SCOM_EIIR_PC_INTR_PENDING_C1 = 13 ;
static const uint8_t P9N2_EX_CME_SCOM_EIIR_SPECIAL_WAKEUP_C0 = 14 ;
static const uint8_t P9N2_EX_CME_SCOM_EIIR_SPECIAL_WAKEUP_C1 = 15 ;
static const uint8_t P9N2_EX_CME_SCOM_EIIR_REG_WAKEUP_C0 = 16 ;
static const uint8_t P9N2_EX_CME_SCOM_EIIR_REG_WAKEUP_C1 = 17 ;
static const uint8_t P9N2_EX_CME_SCOM_EIIR_PC_PM_STATE_ACTIVE_C0 = 20 ;
static const uint8_t P9N2_EX_CME_SCOM_EIIR_PC_PM_STATE_ACTIVE_C1 = 21 ;
static const uint8_t P9N2_EX_CME_SCOM_EIIR_L2_PURGE_DONE = 22 ;
static const uint8_t P9N2_EX_CME_SCOM_EIIR_NCU_PURGE_DONE = 23 ;
static const uint8_t P9N2_EX_CME_SCOM_EIIR_CHTM_PURGE_DONE_C0 = 24 ;
static const uint8_t P9N2_EX_CME_SCOM_EIIR_CHTM_PURGE_DONE_C1 = 25 ;
static const uint8_t P9N2_EQ_CME_SCOM_FLAGS_DATA = 0 ;
static const uint8_t P9N2_EQ_CME_SCOM_FLAGS_DATA_LEN = 32 ;
static const uint8_t P9N2_EX_CME_SCOM_FLAGS_DATA = 0 ;
static const uint8_t P9N2_EX_CME_SCOM_FLAGS_DATA_LEN = 32 ;
static const uint8_t P9N2_EQ_CME_SCOM_IDCR_DROPOUT_EVENT_THRESHOLD = 0 ;
static const uint8_t P9N2_EQ_CME_SCOM_IDCR_DROPOUT_EVENT_THRESHOLD_LEN = 24 ;
static const uint8_t P9N2_EQ_CME_SCOM_IDCR_DROPOUT_INAROW_THRESHOLD = 24 ;
static const uint8_t P9N2_EQ_CME_SCOM_IDCR_DROPOUT_INAROW_THRESHOLD_LEN = 8 ;
static const uint8_t P9N2_EQ_CME_SCOM_IDCR_DROPOUT_TIMER_MODE = 32 ;
static const uint8_t P9N2_EQ_CME_SCOM_IDCR_DROPOUT_CHAR_MODE = 33 ;
static const uint8_t P9N2_EQ_CME_SCOM_IDCR_SIBLING_CORE_DROPOUT_ENABLE = 34 ;
static const uint8_t P9N2_EQ_CME_SCOM_IDCR_SIBLING_CORE_DROPOUT_ENABLE_LEN = 2 ;
static const uint8_t P9N2_EQ_CME_SCOM_IDCR_CORE_DROPOUT_ENABLE = 36 ;
static const uint8_t P9N2_EQ_CME_SCOM_IDCR_CORE_DROPOUT_ENABLE_LEN = 2 ;
static const uint8_t P9N2_EQ_CME_SCOM_IDCR_CACHE_DROPOUT_ENABLE = 38 ;
static const uint8_t P9N2_EQ_CME_SCOM_IDCR_SPARE = 39 ;
static const uint8_t P9N2_EQ_CME_SCOM_IDCR_DROPOUT_NOTIFY_ENABLE = 40 ;
static const uint8_t P9N2_EQ_CME_SCOM_IDCR_SPARE41_43 = 41 ;
static const uint8_t P9N2_EQ_CME_SCOM_IDCR_SPARE41_43_LEN = 3 ;
static const uint8_t P9N2_EQ_CME_SCOM_IDCR_DROPOUT_SAMPLE_RATE = 59 ;
static const uint8_t P9N2_EQ_CME_SCOM_IDCR_DROPOUT_SAMPLE_RATE_LEN = 5 ;
static const uint8_t P9N2_EX_CME_SCOM_IDCR_DROPOUT_EVENT_THRESHOLD = 0 ;
static const uint8_t P9N2_EX_CME_SCOM_IDCR_DROPOUT_EVENT_THRESHOLD_LEN = 24 ;
static const uint8_t P9N2_EX_CME_SCOM_IDCR_DROPOUT_INAROW_THRESHOLD = 24 ;
static const uint8_t P9N2_EX_CME_SCOM_IDCR_DROPOUT_INAROW_THRESHOLD_LEN = 8 ;
static const uint8_t P9N2_EX_CME_SCOM_IDCR_DROPOUT_TIMER_MODE = 32 ;
static const uint8_t P9N2_EX_CME_SCOM_IDCR_DROPOUT_CHAR_MODE = 33 ;
static const uint8_t P9N2_EX_CME_SCOM_IDCR_SIBLING_CORE_DROPOUT_ENABLE = 34 ;
static const uint8_t P9N2_EX_CME_SCOM_IDCR_SIBLING_CORE_DROPOUT_ENABLE_LEN = 2 ;
static const uint8_t P9N2_EX_CME_SCOM_IDCR_CORE_DROPOUT_ENABLE = 36 ;
static const uint8_t P9N2_EX_CME_SCOM_IDCR_CORE_DROPOUT_ENABLE_LEN = 2 ;
static const uint8_t P9N2_EX_CME_SCOM_IDCR_CACHE_DROPOUT_ENABLE = 38 ;
static const uint8_t P9N2_EX_CME_SCOM_IDCR_SPARE = 39 ;
static const uint8_t P9N2_EX_CME_SCOM_IDCR_DROPOUT_NOTIFY_ENABLE = 40 ;
static const uint8_t P9N2_EX_CME_SCOM_IDCR_SPARE41_43 = 41 ;
static const uint8_t P9N2_EX_CME_SCOM_IDCR_SPARE41_43_LEN = 3 ;
static const uint8_t P9N2_EX_CME_SCOM_IDCR_DROPOUT_SAMPLE_RATE = 59 ;
static const uint8_t P9N2_EX_CME_SCOM_IDCR_DROPOUT_SAMPLE_RATE_LEN = 5 ;
static const uint8_t P9N2_EQ_CME_SCOM_LFIR_PPE_INTERNAL_ERROR = 0 ;
static const uint8_t P9N2_EQ_CME_SCOM_LFIR_PPE_EXTERNAL_ERROR = 1 ;
static const uint8_t P9N2_EQ_CME_SCOM_LFIR_PPE_PROGRESS_ERROR = 2 ;
static const uint8_t P9N2_EQ_CME_SCOM_LFIR_PPE_BREAKPOINT_ERROR = 3 ;
static const uint8_t P9N2_EQ_CME_SCOM_LFIR_PPE_WATCHDOG = 4 ;
static const uint8_t P9N2_EQ_CME_SCOM_LFIR_PPE_HALTED = 5 ;
static const uint8_t P9N2_EQ_CME_SCOM_LFIR_PPE_DEBUG_TRIGGER = 6 ;
static const uint8_t P9N2_EQ_CME_SCOM_LFIR_SRAM_UE = 7 ;
static const uint8_t P9N2_EQ_CME_SCOM_LFIR_SRAM_CE = 8 ;
static const uint8_t P9N2_EQ_CME_SCOM_LFIR_SRAM_SCRUB_ERR = 9 ;
static const uint8_t P9N2_EQ_CME_SCOM_LFIR_BCE_ERROR = 10 ;
static const uint8_t P9N2_EQ_CME_SCOM_LFIR_SPARE11 = 11 ;
static const uint8_t P9N2_EQ_CME_SCOM_LFIR_SPARE12 = 12 ;
static const uint8_t P9N2_EQ_CME_SCOM_LFIR_C0_IVRM_DROPOUT = 13 ;
static const uint8_t P9N2_EQ_CME_SCOM_LFIR_C1_IVRM_DROPOUT = 14 ;
static const uint8_t P9N2_EQ_CME_SCOM_LFIR_CACHE_IVRM_DROPOUT = 15 ;
static const uint8_t P9N2_EQ_CME_SCOM_LFIR_EXTREME_DROOP_ERR = 16 ;
static const uint8_t P9N2_EQ_CME_SCOM_LFIR_LARGE_DROOP_ERR = 17 ;
static const uint8_t P9N2_EQ_CME_SCOM_LFIR_SMALL_DROOP_ERR = 18 ;
static const uint8_t P9N2_EQ_CME_SCOM_LFIR_UNEXPECTED_DROOP_ENCODE = 19 ;
static const uint8_t P9N2_EQ_CME_SCOM_LFIR_FIR_PARITY_ERR_DUP = 20 ;
static const uint8_t P9N2_EQ_CME_SCOM_LFIR_FIR_PARITY_ERR = 21 ;
static const uint8_t P9N2_EX_CME_SCOM_LFIR_PPE_INTERNAL_ERROR = 0 ;
static const uint8_t P9N2_EX_CME_SCOM_LFIR_PPE_EXTERNAL_ERROR = 1 ;
static const uint8_t P9N2_EX_CME_SCOM_LFIR_PPE_PROGRESS_ERROR = 2 ;
static const uint8_t P9N2_EX_CME_SCOM_LFIR_PPE_BREAKPOINT_ERROR = 3 ;
static const uint8_t P9N2_EX_CME_SCOM_LFIR_PPE_WATCHDOG = 4 ;
static const uint8_t P9N2_EX_CME_SCOM_LFIR_PPE_HALTED = 5 ;
static const uint8_t P9N2_EX_CME_SCOM_LFIR_PPE_DEBUG_TRIGGER = 6 ;
static const uint8_t P9N2_EX_CME_SCOM_LFIR_SRAM_UE = 7 ;
static const uint8_t P9N2_EX_CME_SCOM_LFIR_SRAM_CE = 8 ;
static const uint8_t P9N2_EX_CME_SCOM_LFIR_SRAM_SCRUB_ERR = 9 ;
static const uint8_t P9N2_EX_CME_SCOM_LFIR_BCE_ERROR = 10 ;
static const uint8_t P9N2_EX_CME_SCOM_LFIR_SPARE11 = 11 ;
static const uint8_t P9N2_EX_CME_SCOM_LFIR_SPARE12 = 12 ;
static const uint8_t P9N2_EX_CME_SCOM_LFIR_C0_IVRM_DROPOUT = 13 ;
static const uint8_t P9N2_EX_CME_SCOM_LFIR_C1_IVRM_DROPOUT = 14 ;
static const uint8_t P9N2_EX_CME_SCOM_LFIR_CACHE_IVRM_DROPOUT = 15 ;
static const uint8_t P9N2_EX_CME_SCOM_LFIR_EXTREME_DROOP_ERR = 16 ;
static const uint8_t P9N2_EX_CME_SCOM_LFIR_LARGE_DROOP_ERR = 17 ;
static const uint8_t P9N2_EX_CME_SCOM_LFIR_SMALL_DROOP_ERR = 18 ;
static const uint8_t P9N2_EX_CME_SCOM_LFIR_UNEXPECTED_DROOP_ENCODE = 19 ;
static const uint8_t P9N2_EX_CME_SCOM_LFIR_FIR_PARITY_ERR_DUP = 20 ;
static const uint8_t P9N2_EX_CME_SCOM_LFIR_FIR_PARITY_ERR = 21 ;
static const uint8_t P9N2_EQ_CME_SCOM_LFIRACT0_FIR_ACTION0 = 0 ;
static const uint8_t P9N2_EQ_CME_SCOM_LFIRACT0_FIR_ACTION0_LEN = 22 ;
static const uint8_t P9N2_EX_CME_SCOM_LFIRACT0_FIR_ACTION0 = 0 ;
static const uint8_t P9N2_EX_CME_SCOM_LFIRACT0_FIR_ACTION0_LEN = 22 ;
static const uint8_t P9N2_EQ_CME_SCOM_LFIRACT1_FIR_ACTION1 = 0 ;
static const uint8_t P9N2_EQ_CME_SCOM_LFIRACT1_FIR_ACTION1_LEN = 22 ;
static const uint8_t P9N2_EX_CME_SCOM_LFIRACT1_FIR_ACTION1 = 0 ;
static const uint8_t P9N2_EX_CME_SCOM_LFIRACT1_FIR_ACTION1_LEN = 22 ;
static const uint8_t P9N2_EQ_CME_SCOM_LFIRMASK_FIR_MASK = 0 ;
static const uint8_t P9N2_EQ_CME_SCOM_LFIRMASK_FIR_MASK_LEN = 22 ;
static const uint8_t P9N2_EX_CME_SCOM_LFIRMASK_FIR_MASK = 0 ;
static const uint8_t P9N2_EX_CME_SCOM_LFIRMASK_FIR_MASK_LEN = 22 ;
static const uint8_t P9N2_EQ_CME_SCOM_LMCR_PMCR_OVERRIDE_EN = 0 ;
static const uint8_t P9N2_EQ_CME_SCOM_LMCR_PSCR_OVERRIDE_EN = 1 ;
static const uint8_t P9N2_EQ_CME_SCOM_LMCR_PMSR_OVERRIDE_EN = 2 ;
static const uint8_t P9N2_EQ_CME_SCOM_LMCR_BCECSR_OVERRIDE_EN = 3 ;
static const uint8_t P9N2_EQ_CME_SCOM_LMCR_IDR_LCL_SAMPLE_EN = 4 ;
static const uint8_t P9N2_EQ_CME_SCOM_LMCR_VDM_LCL_SAMPLE_EN = 5 ;
static const uint8_t P9N2_EQ_CME_SCOM_LMCR_FREQ_LCL_SAMPLE_EN = 6 ;
static const uint8_t P9N2_EQ_CME_SCOM_LMCR_LOCK_PCB_ON_ERR = 7 ;
static const uint8_t P9N2_EQ_CME_SCOM_LMCR_QUEUED_WR_EN = 8 ;
static const uint8_t P9N2_EQ_CME_SCOM_LMCR_QUEUED_RD_EN = 9 ;
static const uint8_t P9N2_EQ_CME_SCOM_LMCR_MASK_PURGE_INTERFACE = 10 ;
static const uint8_t P9N2_EQ_CME_SCOM_LMCR_AUTO_BLOCK_REG_WAKEUP_DISABLE = 11 ;
static const uint8_t P9N2_EQ_CME_SCOM_LMCR_C0_AUTO_SPECIAL_WAKEUP_DISABLE = 12 ;
static const uint8_t P9N2_EQ_CME_SCOM_LMCR_C1_AUTO_SPECIAL_WAKEUP_DISABLE = 13 ;
static const uint8_t P9N2_EQ_CME_SCOM_LMCR_C0_HALTED_STOP_OVERRIDE_DISABLE = 14 ;
static const uint8_t P9N2_EQ_CME_SCOM_LMCR_C1_HALTED_STOP_OVERRIDE_DISABLE = 15 ;
static const uint8_t P9N2_EQ_CME_SCOM_LMCR_STOP_OVERRIDE_MODE = 16 ;
static const uint8_t P9N2_EQ_CME_SCOM_LMCR_STOP_ACTIVE_MASK = 17 ;
static const uint8_t P9N2_EQ_CME_SCOM_LMCR_AUTO_STOP1_DISABLE = 18 ;
static const uint8_t P9N2_EQ_CME_SCOM_LMCR_STOP1_ACTIVE_ENABLE = 19 ;
static const uint8_t P9N2_EQ_CME_SCOM_LMCR_FENCE_EISR = 20 ;
static const uint8_t P9N2_EQ_CME_SCOM_LMCR_PC_DISABLE_DROOP = 21 ;
static const uint8_t P9N2_EQ_CME_SCOM_LMCR_BLOCK_PM_EXIT_DISABLE = 22 ;
static const uint8_t P9N2_EQ_CME_SCOM_LMCR_SPARE_23 = 23 ;
static const uint8_t P9N2_EQ_CME_SCOM_LMCR_AVG_FREQ_TSEL = 24 ;
static const uint8_t P9N2_EQ_CME_SCOM_LMCR_AVG_FREQ_TSEL_LEN = 4 ;
static const uint8_t P9N2_EQ_CME_SCOM_LMCR_SPARE_28_31 = 28 ;
static const uint8_t P9N2_EQ_CME_SCOM_LMCR_SPARE_28_31_LEN = 4 ;
static const uint8_t P9N2_EQ_CME_SCOM_LMCR_RESET_IMPRECISE_QERR = 32 ;
static const uint8_t P9N2_EQ_CME_SCOM_LMCR_SET_ECC_INJECT_ERR = 33 ;
static const uint8_t P9N2_EQ_CME_SCOM_LMCR_SPARE_34 = 34 ;
static const uint8_t P9N2_EQ_CME_SCOM_LMCR_OOB_ERR_DISABLE = 35 ;
static const uint8_t P9N2_EQ_CME_SCOM_LMCR_OOB_ERR_DISABLE_LEN = 5 ;
static const uint8_t P9N2_EX_CME_SCOM_LMCR_PMCR_OVERRIDE_EN = 0 ;
static const uint8_t P9N2_EX_CME_SCOM_LMCR_PSCR_OVERRIDE_EN = 1 ;
static const uint8_t P9N2_EX_CME_SCOM_LMCR_PMSR_OVERRIDE_EN = 2 ;
static const uint8_t P9N2_EX_CME_SCOM_LMCR_BCECSR_OVERRIDE_EN = 3 ;
static const uint8_t P9N2_EX_CME_SCOM_LMCR_IDR_LCL_SAMPLE_EN = 4 ;
static const uint8_t P9N2_EX_CME_SCOM_LMCR_VDM_LCL_SAMPLE_EN = 5 ;
static const uint8_t P9N2_EX_CME_SCOM_LMCR_FREQ_LCL_SAMPLE_EN = 6 ;
static const uint8_t P9N2_EX_CME_SCOM_LMCR_LOCK_PCB_ON_ERR = 7 ;
static const uint8_t P9N2_EX_CME_SCOM_LMCR_QUEUED_WR_EN = 8 ;
static const uint8_t P9N2_EX_CME_SCOM_LMCR_QUEUED_RD_EN = 9 ;
static const uint8_t P9N2_EX_CME_SCOM_LMCR_MASK_PURGE_INTERFACE = 10 ;
static const uint8_t P9N2_EX_CME_SCOM_LMCR_AUTO_BLOCK_REG_WAKEUP_DISABLE = 11 ;
static const uint8_t P9N2_EX_CME_SCOM_LMCR_C0_AUTO_SPECIAL_WAKEUP_DISABLE = 12 ;
static const uint8_t P9N2_EX_CME_SCOM_LMCR_C1_AUTO_SPECIAL_WAKEUP_DISABLE = 13 ;
static const uint8_t P9N2_EX_CME_SCOM_LMCR_C0_HALTED_STOP_OVERRIDE_DISABLE = 14 ;
static const uint8_t P9N2_EX_CME_SCOM_LMCR_C1_HALTED_STOP_OVERRIDE_DISABLE = 15 ;
static const uint8_t P9N2_EX_CME_SCOM_LMCR_STOP_OVERRIDE_MODE = 16 ;
static const uint8_t P9N2_EX_CME_SCOM_LMCR_STOP_ACTIVE_MASK = 17 ;
static const uint8_t P9N2_EX_CME_SCOM_LMCR_AUTO_STOP1_DISABLE = 18 ;
static const uint8_t P9N2_EX_CME_SCOM_LMCR_STOP1_ACTIVE_ENABLE = 19 ;
static const uint8_t P9N2_EX_CME_SCOM_LMCR_FENCE_EISR = 20 ;
static const uint8_t P9N2_EX_CME_SCOM_LMCR_PC_DISABLE_DROOP = 21 ;
static const uint8_t P9N2_EX_CME_SCOM_LMCR_BLOCK_PM_EXIT_DISABLE = 22 ;
static const uint8_t P9N2_EX_CME_SCOM_LMCR_SPARE_23 = 23 ;
static const uint8_t P9N2_EX_CME_SCOM_LMCR_AVG_FREQ_TSEL = 24 ;
static const uint8_t P9N2_EX_CME_SCOM_LMCR_AVG_FREQ_TSEL_LEN = 4 ;
static const uint8_t P9N2_EX_CME_SCOM_LMCR_SPARE_28_31 = 28 ;
static const uint8_t P9N2_EX_CME_SCOM_LMCR_SPARE_28_31_LEN = 4 ;
static const uint8_t P9N2_EX_CME_SCOM_LMCR_RESET_IMPRECISE_QERR = 32 ;
static const uint8_t P9N2_EX_CME_SCOM_LMCR_SET_ECC_INJECT_ERR = 33 ;
static const uint8_t P9N2_EX_CME_SCOM_LMCR_SPARE_34 = 34 ;
static const uint8_t P9N2_EX_CME_SCOM_LMCR_OOB_ERR_DISABLE = 35 ;
static const uint8_t P9N2_EX_CME_SCOM_LMCR_OOB_ERR_DISABLE_LEN = 5 ;
static const uint8_t P9N2_EQ_CME_SCOM_PMCRS0_DATA = 0 ;
static const uint8_t P9N2_EQ_CME_SCOM_PMCRS0_DATA_LEN = 64 ;
static const uint8_t P9N2_EX_CME_SCOM_PMCRS0_DATA = 0 ;
static const uint8_t P9N2_EX_CME_SCOM_PMCRS0_DATA_LEN = 64 ;
static const uint8_t P9N2_EQ_CME_SCOM_PMCRS1_DATA = 0 ;
static const uint8_t P9N2_EQ_CME_SCOM_PMCRS1_DATA_LEN = 64 ;
static const uint8_t P9N2_EX_CME_SCOM_PMCRS1_DATA = 0 ;
static const uint8_t P9N2_EX_CME_SCOM_PMCRS1_DATA_LEN = 64 ;
static const uint8_t P9N2_EQ_CME_SCOM_PMSRS0_DATA = 0 ;
static const uint8_t P9N2_EQ_CME_SCOM_PMSRS0_DATA_LEN = 64 ;
static const uint8_t P9N2_EX_CME_SCOM_PMSRS0_DATA = 0 ;
static const uint8_t P9N2_EX_CME_SCOM_PMSRS0_DATA_LEN = 64 ;
static const uint8_t P9N2_EQ_CME_SCOM_PMSRS1_DATA = 0 ;
static const uint8_t P9N2_EQ_CME_SCOM_PMSRS1_DATA_LEN = 64 ;
static const uint8_t P9N2_EX_CME_SCOM_PMSRS1_DATA = 0 ;
static const uint8_t P9N2_EX_CME_SCOM_PMSRS1_DATA_LEN = 64 ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS00_SPARE0 = 0 ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS00_OS_STATUS_DISABLE_A_N = 1 ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS00_STATE_LOSS_ENABLE_A_N = 2 ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS00_EXIT_CRITERION_A_N = 3 ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS00_POWER_SAVING_LIMIT_A_N = 4 ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS00_POWER_SAVING_LIMIT_A_N_LEN = 4 ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS00_HYP_VIRT_EXIT_ENABLE = 8 ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS00_EXT_EBB_EXIT_ENABLE = 9 ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS00_EXT_RESUME_EXIT_ENABLE = 10 ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS00_EXT_EXIT_ENABLE = 11 ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS00_DEC_EXIT_ENABLE = 12 ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS00_HMI_EXIT_ENABLE = 13 ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS00_LEVEL_TRANSITION_RATE_A_N = 14 ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS00_LEVEL_TRANSITION_RATE_A_N_LEN = 2 ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS00_MAX_PROMOTE_LEVEL_A_N = 16 ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS00_MAX_PROMOTE_LEVEL_A_N_LEN = 4 ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS00_STOP_REQUEST_LEVEL_A_N = 20 ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS00_STOP_REQUEST_LEVEL_A_N_LEN = 4 ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS00_SPARE0 = 0 ;