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genHwsvMrwXml.pl
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genHwsvMrwXml.pl
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#!/usr/bin/perl
# IBM_PROLOG_BEGIN_TAG
# This is an automatically generated prolog.
#
# $Source: src/usr/targeting/common/genHwsvMrwXml.pl $
#
# OpenPOWER HostBoot Project
#
# Contributors Listed Below - COPYRIGHT 2013,2017
# [+] International Business Machines Corp.
#
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
# You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS,
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
# implied. See the License for the specific language governing
# permissions and limitations under the License.
#
# IBM_PROLOG_END_TAG
#
# Usage:
#
# genHwsvMrwXml.pl --system=systemname --mrwdir=pathname
# [--build=hb] [--outfile=XmlFilename]
# --system=systemname
# Specify which system MRW XML to be generated
# --systemnodes=systemnodesinbrazos
# Specify number of nodes for brazos system, by default it is 4
# --mrwdir=pathname
# Specify the complete dir pathname of the MRW. Colon-delimited
# list accepted to specify multiple directories to search.
# --build=hb
# Specify HostBoot build (hb)
# --outfile=XmlFilename
# Specify the filename for the output XML. If omitted, the output
# is written to STDOUT which can be saved by redirection.
#
# Purpose:
#
# This perl script processes the various xml files of the MRW to
# extract the needed information for generating the final xml file.
#
use strict;
use XML::Simple;
use Data::Dumper;
# Enables the state variable feature
use feature "state";
################################################################################
# Set PREFERRED_PARSER to XML::Parser. Otherwise it uses XML::SAX which contains
# bugs that result in XML parse errors that can be fixed by adjusting white-
# space (i.e. parse errors that do not make sense).
################################################################################
$XML::Simple::PREFERRED_PARSER = 'XML::Parser';
#------------------------------------------------------------------------------
# Constants
#------------------------------------------------------------------------------
use constant CHIP_NODE_INDEX => 0; # Position in array of chip's node
use constant CHIP_POS_INDEX => 1; # Position in array of chip's position
use constant CHIP_ATTR_START_INDEX => 2; # Position in array of start of attrs
use constant
{
MAX_PROC_PER_NODE => 8,
MAX_CORE_PER_PROC => 24,
MAX_EX_PER_PROC => 12,
MAX_EQ_PER_PROC => 6,
MAX_ABUS_PER_PROC => 3,
MAX_XBUS_PER_PROC => 3,
MAX_MCS_PER_PROC => 4,
MAX_MCA_PER_PROC => 8,
MAX_MCBIST_PER_PROC => 2,
MAX_PEC_PER_PROC => 3, # PEC is same as PBCQ
MAX_PHB_PER_PROC => 6, # PHB is same as PCIE
MAX_MBA_PER_MEMBUF => 2,
MAX_OBUS_PER_PROC => 4,
MAX_OBUS_BRICK_PER_PROC => 12,
MAX_NPU_PER_PROC => 1,
MAX_PPE_PER_PROC => 51, #Only 21, but they are sparsely populated
MAX_PERV_PER_PROC => 56, #Only 42, but they are sparsely populated
MAX_CAPP_PER_PROC => 2,
MAX_SBE_PER_PROC => 1,
MAX_MI_PER_PROC => 4,
};
# Architecture limits, for the purpose of calculating FAPI_POS.
# This sometimes differs subtley from the max constants above
# due to trying to account for worst case across all present and
# future designs for a processor generation, as well as to account for
# holes in the mapping. It is also more geared towards parent/child
# maxes. Some constants pass through to the above.
use constant
{
ARCH_LIMIT_DIMM_PER_MCA => 2,
ARCH_LIMIT_DIMM_PER_MBA => 4,
# Note: this is proc per fabric group, vs. physical node
ARCH_LIMIT_PROC_PER_FABRIC_GROUP => 4,
ARCH_LIMIT_MEMBUF_PER_DMI => 1,
ARCH_LIMIT_EX_PER_EQ => MAX_EX_PER_PROC / MAX_EQ_PER_PROC,
ARCH_LIMIT_MBA_PER_MEMBUF => MAX_MBA_PER_MEMBUF,
ARCH_LIMIT_MCS_PER_MCBIST => MAX_MCS_PER_PROC / MAX_MCBIST_PER_PROC,
ARCH_LIMIT_XBUS_PER_PROC => MAX_XBUS_PER_PROC,
ARCH_LIMIT_ABUS_PER_PROC => MAX_ABUS_PER_PROC,
ARCH_LIMIT_L4_PER_MEMBUF => 1,
ARCH_LIMIT_CORE_PER_EX => MAX_CORE_PER_PROC / MAX_EX_PER_PROC,
ARCH_LIMIT_EQ_PER_PROC => MAX_EQ_PER_PROC,
ARCH_LIMIT_MCA_PER_MCS => MAX_MCA_PER_PROC / MAX_MCS_PER_PROC,
ARCH_LIMIT_MCBIST_PER_PROC => MAX_MCBIST_PER_PROC,
ARCH_LIMIT_MI_PER_PROC => MAX_MI_PER_PROC,
ARCH_LIMIT_CAPP_PER_PROC => MAX_CAPP_PER_PROC,
ARCH_LIMIT_DMI_PER_MI => 2,
ARCH_LIMIT_NPU_PER_PROC => MAX_NPU_PER_PROC,
ARCH_LIMIT_OBUS_PER_PROC => MAX_OBUS_PER_PROC,
ARCH_LIMIT_OBUS_BRICK_PER_OBUS => MAX_OBUS_BRICK_PER_PROC / MAX_OBUS_PER_PROC,
ARCH_LIMIT_SBE_PER_PROC => MAX_SBE_PER_PROC,
# There are 20+ PPE, but lots of holes in the mapping. Further the
# architecture supports potentially many more PPEs. So, for now we'll pick
# power of 2 value larger than largest pervasive unit of 50
ARCH_LIMIT_PPE_PER_PROC => 64,
# Pervasives are numbered 1..55. 0 Is not possible but acts as a hole.
# Some pervasives within the range are holes as well
ARCH_LIMIT_PERV_PER_PROC => 56,
ARCH_LIMIT_PEC_PER_PROC => MAX_PEC_PER_PROC,
# There are only 6 PHBs per chip, but they are unbalanced across the 3
# PECs. To make the math easy, we'll assume there are potentially 3 PHBs
# per PEC, but PEC0 and PEC1 will have 2 and 1 holes respectively
ARCH_LIMIT_PHB_PER_PEC => 3,
};
# for SPI connections in the @SPIs array
use constant SPI_PROC_PATH_FIELD => 0;
use constant SPI_NODE_FIELD => 1;
use constant SPI_POS_FIELD => 2;
use constant SPI_ENDPOINT_PATH_FIELD => 3;
use constant SPI_APSS_POS_FIELD => 4;
use constant SPI_APSS_ORD_FIELD => 5;
use constant SPI_APSS_RID_FIELD => 6;
use constant
{
# Domain is programmed as part of regular power on sequence.
# No need to do anything in host_enable_memvolt
POWERON_PROGRAM => 0,
# Domain needs to be programmed during host_enable_memvolt, but
# there is no special computation involved
STATIC_PROGRAM => 1,
# Domain needs to be programmed during host_enable_memvolt, and the
# new dynamic vid values must be computed beyond what p9_mss_volt() did
DYNAMIC_PROGRAM => 2,
};
our $mrwdir = "";
my $sysname = "";
my $sysnodes = "";
my $usage = 0;
my $DEBUG = 0;
my $outFile = "";
my $build = "fsp";
# used to map voltage domains to mcbist target
my %mcbist_dimms; # $node$proc_$mcbist -> @(n0p1, n0p2, ...)
use Getopt::Long;
GetOptions( "mrwdir:s" => \$mrwdir,
"system:s" => \$sysname,
"systemnodes:s" => \$sysnodes,
"outfile:s" => \$outFile,
"build:s" => \$build,
"DEBUG" => \$DEBUG,
"help" => \$usage, );
if ($usage || ($mrwdir eq ""))
{
display_help();
exit 0;
}
our %hwsvmrw_plugins;
# FSP-specific functions
if ($build eq "fsp")
{
eval("use genHwsvMrwXml_fsp; return 1;");
genHwsvMrwXml_fsp::return_plugins();
}
if ($outFile ne "")
{
# Uncomment to emit debug trace to STDERR
# print STDERR "Opening OUTFILE $outFile\n";
open OUTFILE, '+>', $outFile ||
die "ERROR: unable to create $outFile\n";
select OUTFILE;
}
my $SYSNAME = uc($sysname);
my $CHIPNAME = "";
my $MAXNODE = 0;
if ($sysname =~ /brazos/)
{
$MAXNODE = 4;
}
my $NODECONF = "";
if( ($sysnodes) && ($sysnodes =~ /2/) )
{
$NODECONF = "2-node";
}
else
{
$NODECONF = "3-and-4-node";
}
my $mru_ids_file = open_mrw_file($mrwdir, "${sysname}-mru-ids.xml");
my $mruAttr = parse_xml_file($mru_ids_file);
#------------------------------------------------------------------------------
# Process the system-policy MRW file
#------------------------------------------------------------------------------
my $system_policy_file = open_mrw_file($mrwdir, "${sysname}-system-policy.xml");
my $sysPolicy = parse_xml_file($system_policy_file,
forcearray=>['proc_r_loadline_vdd','proc_r_distloss_vdd',
'proc_vrm_voffset_vdd','proc_r_loadline_vcs',
'proc_r_distloss_vcs','proc_vrm_voffset_vcs',
'proc_r_loadline_vdn','proc_r_distloss_vdn',
'proc_vrm_voffset_vdn']);
my $reqPol = $sysPolicy->{"required-policy-settings"};
my @systemAttr; # Repeated {ATTR, VAL, ATTR, VAL, ATTR, VAL...}
my @nodeAttr; # Repeated {ATTR, VAL, ATTR, VAL, ATTR, VAL...}
#No mirroring supported yet so the policy is just based on multi-node or not
my $placement = 0x0; #NORMAL
if ($sysname =~ /brazos/)
{
$placement = 0x3; #DRAWER
}
push @systemAttr,
[
"FREQ_PROC_REFCLOCK", $reqPol->{'processor-refclock-frequency'}->{content},
"FREQ_PROC_REFCLOCK_KHZ",
$reqPol->{'processor-refclock-frequency-khz'}->{content},
"FREQ_MEM_REFCLOCK", $reqPol->{'memory-refclock-frequency'}->{content},
"BOOT_FREQ_MHZ", $reqPol->{'boot-frequency'}->{content},
"FREQ_A_MHZ", $reqPol->{'proc_a_frequency'}->{content},
"FREQ_PB_MHZ", $reqPol->{'proc_pb_frequency'}->{content},
"ASYNC_NEST_FREQ_MHZ", $reqPol->{'proc_pb_frequency'}->{content},
"FREQ_PCIE_MHZ", $reqPol->{'proc_pcie_frequency'}->{content},
"FREQ_X_MHZ", $reqPol->{'proc_x_frequency'}->{content},
"PROC_EPS_TABLE_TYPE", $reqPol->{'proc_eps_table_type'},
"PROC_FABRIC_PUMP_MODE", $reqPol->{'proc_fabric_pump_mode'},
"PROC_FABRIC_X_BUS_WIDTH", $reqPol->{'proc_fabric_x_bus_width'},
"PROC_FABRIC_A_BUS_WIDTH", $reqPol->{'proc_fabric_a_bus_width'},
"PROC_FABRIC_SMP_OPTICS_MODE", $reqPol->{'proc_fabric_smp_optics_mode'},
"PROC_FABRIC_CAPI_MODE", $reqPol->{'proc_fabric_capi_mode'},
"X_EREPAIR_THRESHOLD_FIELD", $reqPol->{'x-erepair-threshold-field'},
"A_EREPAIR_THRESHOLD_FIELD", $reqPol->{'a-erepair-threshold-field'},
"DMI_EREPAIR_THRESHOLD_FIELD", $reqPol->{'dmi-erepair-threshold-field'},
"X_EREPAIR_THRESHOLD_MNFG", $reqPol->{'x-erepair-threshold-mnfg'},
"A_EREPAIR_THRESHOLD_MNFG", $reqPol->{'a-erepair-threshold-mnfg'},
"DMI_EREPAIR_THRESHOLD_MNFG", $reqPol->{'dmi-erepair-threshold-mnfg'},
"MSS_MBA_ADDR_INTERLEAVE_BIT", $reqPol->{'mss_mba_addr_interleave_bit'},
"EXTERNAL_VRM_STEPSIZE", $reqPol->{'pm_external_vrm_stepsize'},
"EXTERNAL_VRM_STEPDELAY", $reqPol->{'pm_external_vrm_stepdelay'},
"PM_SPIVID_FREQUENCY", $reqPol->{'pm_spivid_frequency'}->{content},
"PM_SAFE_FREQUENCY", $reqPol->{'pm_safe_frequency'}->{content},
"PM_SAFE_FREQUENCY_MHZ", $reqPol->{'pm_safe_frequency'}->{content},
"PM_RESONANT_CLOCK_FULL_CLOCK_SECTOR_BUFFER_FREQUENCY",
$reqPol->{'pm_resonant_clock_full_clock_sector_buffer_frequency'}->
{content},
"PM_RESONANT_CLOCK_LOW_BAND_LOWER_FREQUENCY",
$reqPol->{'pm_resonant_clock_low_band_lower_frequency'}->{content},
"PM_RESONANT_CLOCK_LOW_BAND_UPPER_FREQUENCY",
$reqPol->{'pm_resonant_clock_low_band_upper_frequency'}->{content},
"PM_RESONANT_CLOCK_HIGH_BAND_LOWER_FREQUENCY",
$reqPol->{'pm_resonant_clock_high_band_lower_frequency'}->{content},
"PM_RESONANT_CLOCK_HIGH_BAND_UPPER_FREQUENCY",
$reqPol->{'pm_resonant_clock_high_band_upper_frequency'}->{content},
"SPIPSS_FREQUENCY", $reqPol->{'pm_spipss_frequency'}->{content},
"MEM_MIRROR_PLACEMENT_POLICY", $placement,
"MSS_MRW_DIMM_POWER_CURVE_PERCENT_UPLIFT",
$reqPol->{'mss_mrw_dimm_power_curve_percent_uplift'},
"MSS_MRW_DIMM_POWER_CURVE_PERCENT_UPLIFT_IDLE",
$reqPol->{'mss_mrw_dimm_power_curve_percent_uplift_idle'},
"MRW_MEM_THROTTLE_DENOMINATOR",
$reqPol->{'mss_mrw_mem_m_dram_clocks'},
"MSS_MRW_MAX_DRAM_DATABUS_UTIL",
$reqPol->{'mss_mrw_max_dram_databus_util'},
"MSS_MRW_MAX_NUMBER_DIMMS_POSSIBLE_PER_VMEM_REGULATOR",
$reqPol->{'mss_mrw_max_number_dimms_possible_per_vmem_regulator'},
"MSS_MRW_THERMAL_MEMORY_POWER_LIMIT",
$reqPol->{'mss_mrw_thermal_memory_power_limit'},
"SYSTEM_IVRMS_ENABLED", $reqPol->{'pm_system_ivrms_enabled'},
"PM_SYSTEM_IVRM_VPD_MIN_LEVEL", $reqPol->{'pm_system_ivrm_vpd_min_level'},
"MNFG_DMI_MIN_EYE_WIDTH", $reqPol->{'mnfg-dmi-min-eye-width'},
"MNFG_DMI_MIN_EYE_HEIGHT", $reqPol->{'mnfg-dmi-min-eye-height'},
"MNFG_ABUS_MIN_EYE_WIDTH", $reqPol->{'mnfg-abus-min-eye-width'},
"MNFG_ABUS_MIN_EYE_HEIGHT", $reqPol->{'mnfg-abus-min-eye-height'},
"MNFG_XBUS_MIN_EYE_WIDTH", $reqPol->{'mnfg-xbus-min-eye-width'},
"REDUNDANT_CLOCKS", $reqPol->{'redundant-clocks'},
"MSS_MRW_POWER_CONTROL_REQUESTED", (uc $reqPol->{'mss_mrw_mem_power_control_requested'}),
"MSS_MRW_IDLE_POWER_CONTROL_REQUESTED", (uc $reqPol->{'mss_mrw_idle_power_control_requested'}),
"MNFG_TH_P8EX_L2_CACHE_CES", $reqPol->{'mnfg_th_p8ex_l2_cache_ces'},
"MNFG_TH_P8EX_L2_DIR_CES", $reqPol->{'mnfg_th_p8ex_l2_dir_ces'},
"MNFG_TH_P8EX_L3_CACHE_CES", $reqPol->{'mnfg_th_p8ex_l3_cache_ces'},
"MNFG_TH_P8EX_L3_DIR_CES", $reqPol->{'mnfg_th_p8ex_l3_dir_ces'},
"FIELD_TH_P8EX_L2_LINE_DELETES", $reqPol->{'field_th_p8ex_l2_line_deletes'},
"FIELD_TH_P8EX_L3_LINE_DELETES", $reqPol->{'field_th_p8ex_l3_line_deletes'},
"FIELD_TH_P8EX_L2_COL_REPAIRS", $reqPol->{'field_th_p8ex_l2_col_repairs'},
"FIELD_TH_P8EX_L3_COL_REPAIRS", $reqPol->{'field_th_p8ex_l3_col_repairs'},
"MNFG_TH_P8EX_L2_LINE_DELETES", $reqPol->{'mnfg_th_p8ex_l2_line_deletes'},
"MNFG_TH_P8EX_L3_LINE_DELETES", $reqPol->{'mnfg_th_p8ex_l3_line_deletes'},
"MNFG_TH_P8EX_L2_COL_REPAIRS", $reqPol->{'mnfg_th_p8ex_l2_col_repairs'},
"MNFG_TH_P8EX_L3_COL_REPAIRS", $reqPol->{'mnfg_th_p8ex_l3_col_repairs'},
"MNFG_TH_CEN_MBA_RT_SOFT_CE_TH_ALGO",
$reqPol->{'mnfg_th_cen_mba_rt_soft_ce_th_algo'},
"MNFG_TH_CEN_MBA_IPL_SOFT_CE_TH_ALGO",
$reqPol->{'mnfg_th_cen_mba_ipl_soft_ce_th_algo'},
"MNFG_TH_CEN_MBA_RT_RCE_PER_RANK",
$reqPol->{'mnfg_th_cen_mba_rt_rce_per_rank'},
"MNFG_TH_CEN_L4_CACHE_CES", $reqPol->{'mnfg_th_cen_l4_cache_ces'},
"BRAZOS_RX_FIFO_OVERRIDE", $reqPol->{'rx_fifo_final_l2u_dly_override'},
"MAX_ALLOWED_DIMM_FREQ", $reqPol->{'max_allowed_dimm_freq'},
"MRW_VMEM_REGULATOR_MEMORY_POWER_LIMIT_PER_DIMM_DDR3", $reqPol->{'vmem_regulator_memory_power_limit_per_dimm'},
"MRW_VMEM_REGULATOR_MEMORY_POWER_LIMIT_PER_DIMM_DDR4", $reqPol->{'mss_mrw_vmem_regulator_memory_power_limit_per_dimm_ddr4'},
"MSS_MRW_VMEM_REGULATOR_POWER_LIMIT_PER_DIMM_ADJ_ENABLE", $reqPol->{'vmem_regulator_memory_power_limit_per_dimm_adjustment_enable'},
"MSS_MRW_PREFETCH_ENABLE", $reqPol->{'mss_prefetch_enable'},
"MSS_MRW_CLEANER_ENABLE", $reqPol->{'mss_cleaner_enable'},
#TODO RTC:161768 these need to come from MRW
"MSS_MRW_MEM_M_DRAM_CLOCKS", $reqPol->{'mss_mrw_mem_m_dram_clocks'},
"MSS_MRW_PERIODIC_MEMCAL_MODE_OPTIONS", $reqPol->{'mss_mrw_periodic_memcal_mode_options'},
"MSS_MRW_PERIODIC_ZQCAL_MODE_OPTIONS", $reqPol->{'mss_mrw_periodic_zqcal_mode_options'},
"MSS_MRW_SAFEMODE_MEM_THROTTLED_N_COMMANDS_PER_PORT", $reqPol->{'mss_mrw_safemode_mem_throttled_n_commands_per_port'},
"MSS_MRW_PWR_SLOPE", $reqPol->{'mss_mrw_pwr_slope'},
"MSS_MRW_PWR_INTERCEPT", $reqPol->{'mss_mrw_pwr_intercept'},
"PROC_FSP_MMIO_MASK_SIZE", 0x0000000100000000,
"PROC_FSP_BAR_SIZE", 0xFFFFFC00FFFFFFFF,
"PROC_FSP_BAR_BASE_ADDR_OFFSET", 0x0000030100000000 ,
"PROC_PSI_BRIDGE_BAR_BASE_ADDR_OFFSET", 0x0000030203000000 ,
"PROC_NPU_PHY0_BAR_BASE_ADDR_OFFSET",0x0000030201200000 ,
"PROC_NPU_PHY1_BAR_BASE_ADDR_OFFSET", 0x0000030201400000 ,
"PROC_NX_RNG_BAR_BASE_ADDR_OFFSET", 0x00000302031D0000 ,
"PROC_NPU_MMIO_BAR_BASE_ADDR_OFFSET", 0x0000030200000000,
"CP_REFCLOCK_RCVR_TERM", $reqPol->{'processor-refclock-receiver-termination'},
"IO_REFCLOCK_RCVR_TERM", $reqPol->{'pci-refclock-receiver-termination'},
"SYSTEM_WOF_ENABLED", $reqPol->{'system_wof_enabled'},
"VDM_ENABLE", $reqPol->{'vdm_enable'},
"IVRM_DEADZONE_MV", $reqPol->{'ivrm_deadzone_mv'},
"SYSTEM_RESCLK_STEP_DELAY", $reqPol->{'system_resclk_step_delay'},
"NEST_LEAKAGE_PERCENT", $reqPol->{'nest_leakage_percent'},
"PM_SAFE_VOLTAGE_MV", $reqPol->{'pm_safe_voltage_mv'},
"IVRM_STRENGTH_LOOKUP", $reqPol->{'ivrm_strength_lookup'},
"IVRM_VIN_MULTIPLIER", $reqPol->{'ivrm_vin_multiplier'},
"IVRM_VIN_MAX_MV", $reqPol->{'ivrm_vin_max_mv'},
"IVRM_STEP_DELAY_NS", $reqPol->{'ivrm_step_delay_ns'},
"IVRM_STABILIZATION_DELAY_NS", $reqPol->{'ivrm_stabilization_delay_ns'},
"SBE_UPDATE_DISABLE", 0,
];
if ($reqPol->{'system_resclk_enable'} eq 'ON')
{
push @systemAttr, ['SYSTEM_RESCLK_ENABLE', 1];
}
elsif ($reqPol->{'system_resclk_enable'} eq 'OFF')
{
push @systemAttr, ['SYSTEM_RESCLK_ENABLE', 0];
}
if ($reqPol->{'mss_mrw_refresh_rate_request'} eq 'SINGLE')
{
push @systemAttr, ['MSS_MRW_REFRESH_RATE_REQUEST', 0];
}
elsif ($reqPol->{'mss_mrw_refresh_rate_request'} eq 'DOUBLE')
{
push @systemAttr, ['MSS_MRW_REFRESH_RATE_REQUEST', 1];
}
elsif ($reqPol->{'mss_mrw_refresh_rate_request'} eq 'SINGLE_10_PERCENT_FASTER')
{
push @systemAttr, ['MSS_MRW_REFRESH_RATE_REQUEST', 2];
}
elsif ($reqPol->{'mss_mrw_refresh_rate_request'} eq 'DOUBLE_10_PERCENT_FASTER')
{
push @systemAttr, ['MSS_MRW_REFRESH_RATE_REQUEST', 3];
}
if ($reqPol->{'mss_mrw_fine_refresh_mode'} eq 'NORMAL')
{
push @systemAttr, ['MSS_MRW_FINE_REFRESH_MODE', 0];
}
elsif ($reqPol->{'mss_mrw_fine_refresh_mode'} eq 'FIXED_2X')
{
push @systemAttr, ['MSS_MRW_FINE_REFRESH_MODE', 1];
}
elsif ($reqPol->{'mss_mrw_fine_refresh_mode'} eq 'FIXED_4X')
{
push @systemAttr, ['MSS_MRW_FINE_REFRESH_MODE', 2];
}
elsif ($reqPol->{'mss_mrw_fine_refresh_mode'} eq 'FLY_2X')
{
push @systemAttr, ['MSS_MRW_FINE_REFRESH_MODE', 5];
}
elsif ($reqPol->{'mss_mrw_fine_refresh_mode'} eq 'FLY_4X')
{
push @systemAttr, ['MSS_MRW_FINE_REFRESH_MODE', 6];
}
if ($reqPol->{'mss_mrw_temp_refresh_range'} eq 'NORMAL')
{
push @systemAttr, ['MSS_MRW_TEMP_REFRESH_RANGE', 0];
}
elsif ($reqPol->{'mss_mrw_temp_refresh_range'} eq 'EXTEND')
{
push @systemAttr, ['MSS_MRW_TEMP_REFRESH_RANGE', 1];
}
if ($reqPol->{'mss_mrw_dram_2N_mode'} eq 'AUTO')
{
push @systemAttr, ['MSS_MRW_DRAM_2N_MODE', 0];
}
elsif ($reqPol->{'mss_mrw_dram_2N_mode'} eq 'FORCE_TO_1N_MODE')
{
push @systemAttr, ['MSS_MRW_DRAM_2N_MODE', 1];
}
elsif ($reqPol->{'mss_mrw_dram_2N_mode'} eq 'FORCE_TO_2N_MODE')
{
push @systemAttr, ['MSS_MRW_DRAM_2N_MODE', 2];
}
if ($reqPol->{'required_synch_mode'} eq 'never')
{
push @systemAttr, ['REQUIRED_SYNCH_MODE', 2];
}
elsif ($reqPol->{'required_synch_mode'} eq 'always')
{
push @systemAttr, ['REQUIRED_SYNCH_MODE', 1];
}
elsif ($reqPol->{'required_synch_mode'} eq 'undetermined')
{
push @systemAttr, ['REQUIRED_SYNCH_MODE', 0];
}
my $xBusWidth = $reqPol->{'proc_x_bus_width'};
if( $xBusWidth == 1 )
{
push @systemAttr, ['PROC_FABRIC_X_BUS_WIDTH', '2_BYTE'];
}
else
{
push @systemAttr, ['PROC_FABRIC_X_BUS_WIDTH', '4_BYTE'];
}
# Note - if below attribute is specified with im-id, it will not get
# set into the output
if( exists $reqPol->{'mss_mrw_interleave_enable'} )
{
push @systemAttr, ['MSS_INTERLEAVE_ENABLE',
$reqPol->{'mss_mrw_interleave_enable'}];
}
if ($reqPol->{'supports_dynamic_mem_volt'} eq 'true')
{
push @systemAttr, ['SUPPORTS_DYNAMIC_MEM_VOLT', 1];
}
else
{
push @systemAttr, ['SUPPORTS_DYNAMIC_MEM_VOLT', 0];
}
my $nestFreq = $reqPol->{'proc_pb_frequency'}->{content};
if($nestFreq == 1600)
{
push @systemAttr, ['NEST_PLL_BUCKET', 1];
}
elsif ($nestFreq == 1866)
{
push @systemAttr, ['NEST_PLL_BUCKET', 2];
}
elsif ($nestFreq == 2000)
{
push @systemAttr, ['NEST_PLL_BUCKET', 3];
}
elsif ($nestFreq == 2133)
{
push @systemAttr, ['NEST_PLL_BUCKET', 4];
}
elsif ($nestFreq == 2400)
{
push @systemAttr, ['NEST_PLL_BUCKET', 5];
}
my %domainProgram = ( MSS_VDD_PROGRAM => $reqPol->{'mss_vdd_program'},
MSS_VCS_PROGRAM => $reqPol->{'mss_vcs_program'},
MSS_AVDD_PROGRAM => $reqPol->{'mss_avdd_program'},
MSS_VDDR_PROGRAM => $reqPol->{'mss_vddr_program'},
MSS_VPP_PROGRAM => $reqPol->{'mss_vpp_program'} );
for my $domain (keys %domainProgram)
{
if ($domainProgram{$domain} eq "poweron")
{
push @systemAttr, [$domain, POWERON_PROGRAM];
}
elsif ($domainProgram{$domain} eq "static")
{
push @systemAttr, [$domain, STATIC_PROGRAM];
}
elsif ($domainProgram{$domain} eq "dynamic")
{
push @systemAttr, [$domain, DYNAMIC_PROGRAM];
}
else
{
# default to not program in host_enable_memvolt
push @systemAttr, [$domain, POWERON_PROGRAM];
}
}
my %procLoadline = ();
$procLoadline{PROC_R_LOADLINE_VDD_UOHM}{sys}
= $reqPol->{'proc_r_loadline_vdd' }[0];
$procLoadline{PROC_R_DISTLOSS_VDD_UOHM}{sys}
= $reqPol->{'proc_r_distloss_vdd' }[0];
$procLoadline{PROC_VRM_VOFFSET_VDD_UV}{sys}
= $reqPol->{'proc_vrm_voffset_vdd'}[0];
$procLoadline{PROC_R_LOADLINE_VCS_UOHM}{sys}
= $reqPol->{'proc_r_loadline_vcs' }[0];
$procLoadline{PROC_R_DISTLOSS_VCS_UOHM}{sys}
= $reqPol->{'proc_r_distloss_vcs' }[0];
$procLoadline{PROC_VRM_VOFFSET_VCS_UV}{sys}
= $reqPol->{'proc_vrm_voffset_vcs'}[0];
$procLoadline{PROC_R_LOADLINE_VDN_UOHM}{sys}
= $reqPol->{'proc_r_loadline_vdn' }[0];
$procLoadline{PROC_R_DISTLOSS_VDN_UOHM}{sys}
= $reqPol->{'proc_r_distloss_vdn' }[0];
$procLoadline{PROC_VRM_VOFFSET_VDN_UV}{sys}
= $reqPol->{'proc_vrm_voffset_vdn'}[0];
#Save avsbus data to add to proc target type later
our %voltageRails = (
"vdd_avsbus_busnum" => $reqPol->{'vdd_avsbus_busnum'},
"vdd_avsbus_rail" => $reqPol->{'vdd_avsbus_rail' },
"vdn_avsbus_busnum" => $reqPol->{'vdn_avsbus_busnum'},
"vdn_avsbus_rail" => $reqPol->{'vdn_avsbus_rail' },
"vcs_avsbus_busnum" => $reqPol->{'vcs_avsbus_busnum'},
"vcs_avsbus_rail" => $reqPol->{'vcs_avsbus_rail' }, );
my $optPol = $sysPolicy->{"optional-policy-settings"};
if(defined $optPol->{'loadline-overrides'})
{
foreach my $attr (keys %procLoadline)
{
my $mrwPolicy = lc $attr;
foreach my $pol (@ {$optPol->{'loadline-overrides'}{$mrwPolicy}} )
{
if(defined $pol->{target})
{
if(defined $procLoadline{$attr}{ $pol->{target} })
{
die "Multiple overrides of $attr specified for same target "
. "proc $pol->{target}\n";
}
$procLoadline{$attr}{ $pol->{target} } = $pol->{content} ;
}
}
}
}
my $xbusFfePrecursor = $reqPol->{'io_xbus_tx_ffe_precursor'};
if ($reqPol->{'mba_cacheline_interleave_mode_control'} eq 'required')
{
push @systemAttr, ["MRW_MBA_CACHELINE_INTERLEAVE_MODE_CONTROL", 1];
}
elsif ($reqPol->{'mba_cacheline_interleave_mode_control'} eq 'requested')
{
push @systemAttr, ["MRW_MBA_CACHELINE_INTERLEAVE_MODE_CONTROL", 2];
}
else
{
push @systemAttr, ["MRW_MBA_CACHELINE_INTERLEAVE_MODE_CONTROL", 0];
}
if ($MAXNODE > 1 && $sysname !~ m/mfg/)
{
push @systemAttr, ["DO_ABUS_DECONFIG", 0];
}
# Process optional policies related to dyanmic VID
my $optMrwPolicies = $sysPolicy->{"optional-policy-settings"};
use constant MRW_NAME => 'mrw-name';
my %optSysPolicies = ();
my %optNodePolicies = ();
# Add the optional system-level attributes
$optSysPolicies{'MIN_FREQ_MHZ'}{MRW_NAME}
= "minimum-frequency" ;
$optSysPolicies{'NOMINAL_FREQ_MHZ'}{MRW_NAME}
= "nominal-frequency" ;
$optSysPolicies{'FREQ_CORE_MAX'}{MRW_NAME}
= "maximum-frequency" ;
$optSysPolicies{'MSS_CENT_AVDD_SLOPE_ACTIVE'}{MRW_NAME}
= "mem_avdd_slope_active" ;
$optSysPolicies{'MSS_CENT_AVDD_SLOPE_INACTIVE'}{MRW_NAME}
= "mem_avdd_slope_inactive" ;
$optSysPolicies{'MSS_CENT_AVDD_INTERCEPT'}{MRW_NAME}
= "mem_avdd_intercept" ;
$optSysPolicies{'MSS_VOLT_VPP_SLOPE'}{MRW_NAME}
= "mem_vpp_slope" ;
$optSysPolicies{'MSS_VOLT_VPP_INTERCEPT'}{MRW_NAME}
= "mem_vpp_intercept" ;
$optSysPolicies{'MSS_VOLT_DDR3_VDDR_SLOPE'}{MRW_NAME}
= "mem_ddr3_vddr_slope" ;
$optSysPolicies{'MSS_VOLT_DDR3_VDDR_INTERCEPT'}{MRW_NAME}
= "mem_ddr3_vddr_intercept" ;
$optSysPolicies{'MSS_VOLT_DDR4_VDDR_SLOPE'}{MRW_NAME}
= "mem_ddr4_vddr_slope" ;
$optSysPolicies{'MSS_VOLT_DDR4_VDDR_INTERCEPT'}{MRW_NAME}
= "mem_ddr4_vddr_intercept" ;
$optSysPolicies{'MRW_DDR3_VDDR_MAX_LIMIT'}{MRW_NAME}
= "mem_ddr3_vddr_max_limit" ;
$optSysPolicies{'MRW_DDR4_VDDR_MAX_LIMIT'}{MRW_NAME}
= "mem_ddr4_vddr_max_limit" ;
# Add the optional node-level attributes
$optNodePolicies{'MSS_CENT_VDD_SLOPE_ACTIVE'}{MRW_NAME}
= "mem_vdd_slope_active" ;
$optNodePolicies{'MSS_CENT_VDD_SLOPE_INACTIVE'}{MRW_NAME}
= "mem_vdd_slope_inactive" ;
$optNodePolicies{'MSS_CENT_VDD_INTERCEPT'}{MRW_NAME}
= "mem_vdd_intercept" ;
$optNodePolicies{'MSS_CENT_VCS_SLOPE_ACTIVE'}{MRW_NAME}
= "mem_vcs_slope_active" ;
$optNodePolicies{'MSS_CENT_VCS_SLOPE_INACTIVE'}{MRW_NAME}
= "mem_vcs_slope_inactive" ;
$optNodePolicies{'MSS_CENT_VCS_INTERCEPT'}{MRW_NAME}
= "mem_vcs_intercept" ;
# Add System Attributes
foreach my $policy ( keys %optSysPolicies )
{
if(exists $optMrwPolicies->{ $optSysPolicies{$policy}{MRW_NAME}})
{
push @systemAttr, [ $policy ,
$optMrwPolicies->{$optSysPolicies{$policy}{MRW_NAME}}];
}
}
# Add Node Attribues
foreach my $policy ( keys %optNodePolicies )
{
if(exists $optMrwPolicies->{ $optNodePolicies{$policy}{MRW_NAME}})
{
push @nodeAttr, [ $policy ,
$optMrwPolicies->{$optNodePolicies{$policy}{MRW_NAME}}];
}
}
#OpenPOWER policies
foreach my $policy (keys %{$optMrwPolicies->{"open_power"}})
{
push(@systemAttr,[ uc($policy),
$optMrwPolicies->{"open_power"}->{$policy} ] );
}
#------------------------------------------------------------------------------
# Process the pm-settings MRW file
#------------------------------------------------------------------------------
my $pm_settings_file = open_mrw_file($mrwdir, "${sysname}-pm-settings.xml");
my $pmSettings = parse_xml_file($pm_settings_file,
forcearray=>['processor-settings']);
my @pmChipAttr; # Repeated [NODE, POS, ATTR, VAL, ATTR, VAL, ATTR, VAL...]
my $pbaxAttr;
my $pbaxId;
foreach my $i (@{$pmSettings->{'processor-settings'}})
{
if(exists $i->{pbax_groupid})
{
$pbaxAttr = "PBAX_GROUPID";
$pbaxId = $i->{pbax_groupid};
}
else
{
$pbaxAttr = "PBAX_GROUPID";
$pbaxId = $i->{pm_pbax_nodeid};
}
push @pmChipAttr,
[
$i->{target}->{node}, $i->{target}->{position},
"PM_UNDERVOLTING_FRQ_MINIMUM",
$i->{pm_undervolting_frq_minimum}->{content},
"PM_UNDERVOLTING_FREQ_MAXIMUM",
$i->{pm_undervolting_frq_maximum}->{content},
"PM_SPIVID_PORT_ENABLE", $i->{pm_spivid_port_enable},
"PM_APSS_CHIP_SELECT", $i->{pm_apss_chip_select},
$pbaxAttr, $pbaxId,
"PBAX_CHIPID", $i->{pm_pbax_chipid},
"PBAX_BRDCST_ID_VECTOR", $i->{pm_pbax_brdcst_id_vector},
"PM_SLEEP_ENTRY", $i->{pm_sleep_entry},
"PM_SLEEP_EXIT", $i->{pm_sleep_exit},
"PM_SLEEP_TYPE", $i->{pm_sleep_type},
"PM_WINKLE_ENTRY", $i->{pm_winkle_entry},
"PM_WINKLE_EXIT", $i->{pm_winkle_exit},
"PM_WINKLE_TYPE", $i->{pm_winkle_type}
];
}
my @SortedPmChipAttr = sort byNodePos @pmChipAttr;
if ((scalar @SortedPmChipAttr) == 0)
{
# For all systems without a populated <sys>-pm-settings file, this script
# defaults the values.
# Orlena: Platform dropped so there will never be a populated
# orlena-pm-settings file
# Brazos: SW231069 raised to get brazos-pm-settings populated
print STDOUT "WARNING: No data in mrw dir(s): $mrwdir with ".
"filename:${sysname}-pm-settings.xml. Defaulting values\n";
}
#------------------------------------------------------------------------------
# Process the proc-pcie-settings MRW file
#------------------------------------------------------------------------------
my $proc_pcie_settings_file = open_mrw_file($mrwdir,
"${sysname}-proc-pcie-settings.xml");
my $ProcPcie = parse_xml_file($proc_pcie_settings_file,
forcearray=>['processor-settings']);
my %procPcieTargetList = ();
my $pcieInit = 0;
# MAX Phb values Per PROC is 6 in P9 and is hard coded here
use constant MAX_NUM_PHB_PER_PROC => 6;
# MAX lane settings value is 16 lanes per phb and is hard coded here
use constant MAX_LANE_SETTINGS_PER_PHB => 16;
################################################################################
# If value is hex, convert to regular number
###############################################################################
sub unhexify {
my($val) = @_;
if($val =~ m/^0[xX][01234567890A-Fa-f]+$/)
{
$val = hex($val);
}
return $val;
}
# Determine values of proc pcie attributes
# Currently
# PROC_PCIE_LANE_EQUALIZATION_GEN3/4 PROC_PCIE_IOP_CONFIG PROC_PCIE_PHB_ACTIVE
sub pcie_init ($)
{
my $proc = $_[0];
# Used for handling shifting operations of hex values read from mrw
# done in scope to not affect sort functions
use bigint;
my $procPcieKey = "";
my @gen3_phb_values = (); # [PHB#][lane#] = uint16 value
my @gen4_phb_values = (); # [PHB#][lane#] = uint16 value
my $procPcieIopConfig = 0;
my $procPciePhbActive = 0;
$procPcieKey = sprintf("n%dp%d\,", $proc->{'target'}->{'node'},
$proc->{'target'}->{'position'});
if(!(exists($procPcieTargetList{$procPcieKey})))
{
# Loop through each PHB which each contain 32 bytes (2 bytes * 16) of EQ
foreach my $Phb (@{$proc->{'phb-settings'}})
{
my $phb_number = 0;
if(exists($Phb->{'phb-number'}))
{
$phb_number = $Phb->{'phb-number'};
}
else
{
die "ERROR: phb-number does not exist for
proc:$procPcieKey\n";
}
# Each PHB has 16 lanes (Each lane containing 2 total bytes of EQ)
foreach my $Lane (@{$Phb->{'lane-settings'}})
{
my $lane_number = 0;
if(exists($Lane->{'lane-number'}))
{
$lane_number = $Lane->{'lane-number'};
}
else
{
die "ERROR: lane-number does not exist for
proc:$procPcieKey\n";
}
my $gen = 3;
my $pPhb_value = \@gen3_phb_values;
while ($gen < 5) # go through gen3 and gen4
{
if ($gen == 4)
{
$pPhb_value = \@gen4_phb_values
}
my $genKey = "gen".$gen;
foreach my $Equ (@{$Lane->{$genKey}{'equalization-setting'}})
{
my $eq_value = hex($Equ->{value});
# Accumulate all values for each of the lanes from the MRW
# (2 Bytes)
# First Byte:
# - Nibble 1: up_rx_hint (bit 0 reserved)
# - Nibble 2: up_tx_preset
# Second Byte:
# - Nibble 1: dn_rx_hint (bit 0 reserved)
# - Nibble 2: dn_tx_preset
if($Equ->{'type'} eq 'up_rx_hint')
{
$pPhb_value->[$phb_number][$lane_number] =
$pPhb_value->[$phb_number][$lane_number] |
(($eq_value & 0x0007) << 12);
if($eq_value > 0x7)
{
die "ERROR: Attempting to modify the
reserved bit in $genKey PHB$phb_number
(up_rx_hint value: ". $Equ->{value} . ")\n";
}
}
if($Equ->{'type'} eq 'up_tx_preset')
{
$pPhb_value->[$phb_number][$lane_number] =
$pPhb_value->[$phb_number][$lane_number] |
(($eq_value & 0x000F) << 8);
}
if($Equ->{'type'} eq 'dn_rx_hint')
{
$pPhb_value->[$phb_number][$lane_number] =
$pPhb_value->[$phb_number][$lane_number] |
(($eq_value & 0x0007) << 4);
if($eq_value > 0x7)
{
die "ERROR: Attempting to modify the
reserved bit in $genKey PHB$phb_number
(dn_rx_hint value: ". $Equ->{value} . ")\n";
}
}
if($Equ->{'type'} eq 'dn_tx_preset')
{
$pPhb_value->[$phb_number][$lane_number] =
$pPhb_value->[$phb_number][$lane_number] |
($eq_value & 0x000F);
}
} # end of equalization-setting
$gen++;
} # end of gen
} # end of lane-number
} # end of phb
my @gen3PhbValues; # gen3 PHB values for this processor
my @gen4PhbValues; # gen4 PHB values for this processor
for (my $phbnumber = 0; $phbnumber < MAX_NUM_PHB_PER_PROC;
++$phbnumber)
{
my $gen3PhbValue;
my $gen4PhbValue;
for(my $lane_settings_count = 0;
$lane_settings_count < MAX_LANE_SETTINGS_PER_PHB;
++$lane_settings_count)
{
$gen3PhbValue = sprintf("%s0x%04X\,", $gen3PhbValue,
$gen3_phb_values[$phbnumber][$lane_settings_count]);
$gen4PhbValue = sprintf("%s0x%04X\,", $gen4PhbValue,
$gen4_phb_values[$phbnumber][$lane_settings_count]);
}
$gen3PhbValues[$phbnumber] = substr($gen3PhbValue, 0, -1);
$gen4PhbValues[$phbnumber] = substr($gen4PhbValue, 0, -1);
}
if ( exists($proc->{proc_pcie_iop_config}) )
{
$procPcieIopConfig = $proc->{proc_pcie_iop_config};
}
if ( exists($proc->{proc_pcie_phb_active}) )
{
$procPciePhbActive = $proc->{proc_pcie_phb_active};
}
$procPcieTargetList{$procPcieKey} = {
'procName' => $proc->{'target'}->{'name'},
'procPosition' => $proc->{'target'}->{'position'},
'nodePosition' => $proc->{'target'}->{'node'},
'gen3phbValues' => \@gen3PhbValues,
'gen4phbValues' => \@gen4PhbValues,
'phbActive' => $procPciePhbActive,
'iopConfig' => $procPcieIopConfig,
};
} # end of processor loop
}
# Repeated [NODE, POS, ATTR, IOP0-VAL, IOP1-VAL, ATTR, IOP0-VAL, IOP1-VAL]
my @pecPcie;
foreach my $proc (@{$ProcPcie->{'processor-settings'}})
{
# determine values of proc pcie attributes
pcie_init($proc);
}
#------------------------------------------------------------------------------
# Process the chip-ids MRW file
#------------------------------------------------------------------------------
my $chip_ids_file = open_mrw_file($mrwdir, "${sysname}-chip-ids.xml");
my $chipIds = parse_xml_file($chip_ids_file, forcearray=>['chip-id']);
use constant CHIP_ID_NODE => 0;
use constant CHIP_ID_POS => 1;
use constant CHIP_ID_PATH => 2;
use constant CHIP_ID_NXPX => 3;
my @chipIDs;
foreach my $i (@{$chipIds->{'chip-id'}})
{
push @chipIDs, [ $i->{node}, $i->{position}, $i->{'instance-path'},
"n$i->{target}->{node}:p$i->{target}->{position}" ];
}
#------------------------------------------------------------------------------
# Process the power-busses MRW file
#------------------------------------------------------------------------------
my $power_busses_file = open_mrw_file($mrwdir, "${sysname}-power-busses.xml");
my $powerbus = parse_xml_file($power_busses_file);
my @pbus;
use constant PBUS_FIRST_END_POINT_INDEX => 0;
use constant PBUS_SECOND_END_POINT_INDEX => 1;
use constant PBUS_DOWNSTREAM_INDEX => 2;
use constant PBUS_UPSTREAM_INDEX => 3;
use constant PBUS_TX_MSB_LSB_SWAP => 4;
use constant PBUS_RX_MSB_LSB_SWAP => 5;
use constant PBUS_ENDPOINT_INSTANCE_PATH => 6;
use constant PBUS_NODE_CONFIG_FLAG => 7;
foreach my $i (@{$powerbus->{'power-bus'}})
{
# Pull out the connection information from the description
# example: n0:p0:A2 to n0:p2:A2
my $endp1 = $i->{'description'};
my $endp2 = "null";
my $dwnstrm_swap = 0;
my $upstrm_swap = 0;
my $nodeconfig = "null";
my $present = index $endp1, 'not connected';
if ($present eq -1)
{
$endp2 = $endp1;
$endp1 =~ s/^(.*) to.*/$1/;
$endp2 =~ s/.* to (.*)\s*$/$1/;
# Grab the lane swap information