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O/X Bus I/O Ppe Loader + Wrapper Updates
Change-Id: Ibc21b6284fa163bee140dee0df9552837e4082d8 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/37002 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Gary A. Peterson <garyp@us.ibm.com> Reviewed-by: Richard J. Knight <rjknight@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41247 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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‎src/import/chips/p9/procedures/hwp/io/p9_io_obus_image_build.C

Lines changed: 50 additions & 108 deletions
Original file line numberDiff line numberDiff line change
@@ -41,162 +41,104 @@
4141
#include "p9_xip_image.h"
4242

4343
//---------------------------------------------------------------------------
44-
fapi2::ReturnCode getBaseAddress(
45-
const fapi2::Target < fapi2::TARGET_TYPE_OBUS > i_tgt,
46-
uint64_t& o_baseAddr )
44+
fapi2::ReturnCode extractPpeImg(void* const iImagePtr, uint8_t*& oObusImgPtr, uint32_t& oSize)
4745
{
48-
FAPI_IMP( "Entering get_base_scom_address." );
49-
50-
uint8_t unitPos = 0;
51-
52-
FAPI_TRY( FAPI_ATTR_GET( fapi2::ATTR_CHIP_UNIT_POS, i_tgt, unitPos ),
53-
"Fapi Attr Get Chip Unit Pos Failed." );
54-
55-
switch( unitPos )
56-
{
57-
case 0:
58-
o_baseAddr = 0x0000000009011040ull;
59-
break;
60-
61-
case 1:
62-
o_baseAddr = 0x000000000A011040ull;
63-
break;
64-
65-
case 2:
66-
o_baseAddr = 0x000000000B011040ull;
67-
break;
68-
69-
case 3:
70-
o_baseAddr = 0x000000000C011040ull;
71-
break;
72-
73-
default:
74-
o_baseAddr = 0x0000000000000000ull;
75-
break;
76-
77-
}
78-
79-
FAPI_IMP( "Exiting get_base_scom_address." );
80-
fapi_try_exit:
81-
return fapi2::current_err;
82-
}
83-
84-
//---------------------------------------------------------------------------
85-
fapi2::ReturnCode getObusImageFromHcode( void* const i_pImage, uint8_t* i_pObusImg, uint32_t& o_size )
86-
{
87-
uint8_t* pIoSection;
46+
FAPI_IMP("Entering getObusImageFromHwImage.");
8847
P9XipSection ppeSection;
89-
9048
ppeSection.iv_offset = 0;
9149
ppeSection.iv_size = 0;
9250

93-
94-
FAPI_ASSERT( i_pImage != NULL ,
95-
fapi2::P9_IO_PPE_OBUS_IMG_PTR_ERROR().set_HW_IMG_PTR( i_pImage ),
96-
"Bad pointer to HW Image." );
51+
FAPI_ASSERT(iImagePtr != NULL ,
52+
fapi2::P9_IO_PPE_OBUS_IMG_PTR_ERROR().set_HW_IMG_PTR(iImagePtr),
53+
"Bad pointer to HW Image.");
9754

9855
// Pulls the IO PPE Section from the HW/XIP Image
9956
// XIP(Execution In Place) -- Points to Seeprom
100-
FAPI_TRY( p9_xip_get_section( i_pImage, P9_XIP_SECTION_HW_IOPPE, &ppeSection ) );
57+
FAPI_TRY(p9_xip_get_section(iImagePtr, P9_XIP_SECTION_HW_IOPPE, &ppeSection));
10158

102-
// Point to the Io Section in the HW/XIP Image
103-
pIoSection = ppeSection.iv_offset + (uint8_t*) ( i_pImage );
59+
// Point to the I/O PPE Section in the HW/XIP Image
60+
oObusImgPtr = ppeSection.iv_offset + (uint8_t*)(iImagePtr);
10461

105-
// From the Io Section, lets pull the IOO Image.
106-
// TODO : Need to get an updated section for IOO Image.
107-
FAPI_TRY( p9_xip_get_section( pIoSection, P9_XIP_SECTIONS_IOPPE, &ppeSection ) );
62+
// From the I/O Section, lets pull the IOO Nvlink Image.
63+
FAPI_TRY(p9_xip_get_section(oObusImgPtr, P9_XIP_SECTION_IOPPE_IOO_NV, &ppeSection));
10864

109-
// Point to the IOO PPE Image of the Io Section
110-
i_pObusImg = ppeSection.iv_offset + (uint8_t*) ( pIoSection );
65+
// Point to the IOO PPE Image of the I/O PPE Section
66+
oObusImgPtr = ppeSection.iv_offset + (uint8_t*)(oObusImgPtr);
11167

11268
// Set the Size of the IOO Image
113-
o_size = ppeSection.iv_size;
69+
oSize = ppeSection.iv_size;
11470

11571
fapi_try_exit:
72+
FAPI_IMP("Exiting getObusImageFromHwImage.");
11673
return fapi2::current_err;
11774
}
11875

11976
//---------------------------------------------------------------------------
120-
fapi2::ReturnCode scomWrite(
121-
const fapi2::Target<fapi2::TARGET_TYPE_OBUS>& i_tgt,
122-
const uint64_t i_addr,
123-
const uint64_t i_data )
77+
fapi2::ReturnCode scomWrite(CONST_OBUS& iTgt, const uint64_t iAddr, const uint64_t iData)
12478
{
125-
fapi2::buffer<uint64_t> data64( i_data );
126-
79+
fapi2::buffer<uint64_t> data64(iData);
12780
// Xscom -- Scom from core in Hostboot mode
128-
return fapi2::putScom( i_tgt, i_addr, data64 );
81+
return fapi2::putScom(iTgt, iAddr, data64);
12982
}
13083

13184

13285
//---------------------------------------------------------------------------
133-
fapi2::ReturnCode p9_io_obus_image_build(
134-
const fapi2::Target < fapi2::TARGET_TYPE_OBUS >& i_tgt,
135-
void* const i_pImage )
86+
fapi2::ReturnCode p9_io_obus_image_build(CONST_OBUS& iTgt, void* const iHwImagePtr)
13687
{
137-
FAPI_IMP( "Entering p9_io_ioo_ppe_hcode_build." );
88+
FAPI_IMP("Entering p9_io_obus_image_build.");
13889

139-
const uint64_t SRAM_BASE_ADDR = 0xFFFF000000000000ull;
140-
const uint64_t PPE_AUTOINC_EN = 0x8000000000000000ull;
141-
const uint64_t PPE_AUTOINC_DIS = 0x0000000000000000ull;
142-
const uint64_t PPE_HARD_RESET = 0x6000000000000000ull; // xcr cmd=110
143-
const uint64_t PPE_RESUME_FROM_HALT = 0x2000000000000000ull; // xcr cmd=010
90+
const uint64_t SRAM_BASE_ADDR = 0xFFFF000000000000ull;
91+
const uint64_t AUTOINC_EN = 0x8000000000000000ull;
92+
const uint64_t AUTOINC_DIS = 0x0000000000000000ull;
93+
const uint64_t HARD_RESET = 0x6000000000000000ull; // xcr cmd=110
94+
const uint64_t RESUME_FROM_HALT = 0x2000000000000000ull; // xcr cmd=010
14495
// PPE Address
145-
const uint64_t MEM_ARB_CSAR = 0x0D; // Sram Address Reg
146-
const uint64_t MEM_ARB_SCR = 0x0A; // Sram Source Control Reg
147-
const uint64_t MEM_ARB_CSDR = 0x0E; // Sram Data Reg
148-
const uint64_t XCR_NONE = 0x10; // External Control Reg
96+
const uint64_t BASE_ADDR = 0x0000000006010C00ull;
97+
const uint64_t MEM_ARB_CSAR = 0x000000000000000Dull | BASE_ADDR; // Sram Address Reg
98+
const uint64_t MEM_ARB_SCR = 0x000000000000000Aull | BASE_ADDR; // Sram Source Control Reg
99+
const uint64_t MEM_ARB_CSDR = 0x000000000000000Eull | BASE_ADDR; // Sram Data Reg
100+
const uint64_t XCR_NONE = 0x0000000000000010ull | BASE_ADDR; // External Control Reg
149101

150102
uint64_t data = 0;
151-
uint64_t baseAddr = 0;
152-
uint8_t* pObusImg = NULL;
103+
uint8_t* pObusImg = NULL;
153104
uint32_t imgSize = 0;
154105

155-
// Sets the base address based on the chip unit position
156-
FAPI_TRY( getBaseAddress( i_tgt, baseAddr ),
157-
"getBaseAddress Failed." );
106+
FAPI_TRY(extractPpeImg(iHwImagePtr, pObusImg, imgSize), "Extract PPE Image Failed.");
158107

159-
// Get Image from Hcode
160-
FAPI_TRY( getObusImageFromHcode( i_pImage, pObusImg, imgSize ),
161-
"Get Obus PPE Image Failed." );
108+
// PPE Reset
109+
FAPI_TRY(scomWrite(iTgt, XCR_NONE, HARD_RESET), "Hard Reset Failed.");
162110

163111
// Set PPE Base Address
164-
FAPI_TRY( scomWrite( i_tgt, baseAddr | MEM_ARB_CSAR, SRAM_BASE_ADDR ),
165-
"I/O Obus PPE Set Base Address Failed." );
112+
FAPI_TRY(scomWrite(iTgt, MEM_ARB_CSAR, SRAM_BASE_ADDR), "Set Base Address Failed.");
166113

167114
// Set PPE into Autoincrement Mode
168-
FAPI_TRY( scomWrite( i_tgt, baseAddr | MEM_ARB_SCR, PPE_AUTOINC_EN ),
169-
"I/O Obus PPE Auto Increment Enable Failed." );
115+
FAPI_TRY(scomWrite(iTgt, MEM_ARB_SCR, AUTOINC_EN), "Auto-Increment Enable Failed.");
170116

171-
for( uint32_t i = 0; i < imgSize; i += 8 )
117+
for(uint32_t i = 0; i < imgSize; i += 8)
172118
{
173-
data = ( ( (uint64_t)pObusImg[i + 0] << 56 ) & 0xFF00000000000000ull ) |
174-
( ( (uint64_t)pObusImg[i + 1] << 48 ) & 0x00FF000000000000ull ) |
175-
( ( (uint64_t)pObusImg[i + 2] << 40 ) & 0x0000FF0000000000ull ) |
176-
( ( (uint64_t)pObusImg[i + 3] << 32 ) & 0x000000FF00000000ull ) |
177-
( ( (uint64_t)pObusImg[i + 4] << 24 ) & 0x00000000FF000000ull ) |
178-
( ( (uint64_t)pObusImg[i + 5] << 16 ) & 0x0000000000FF0000ull ) |
179-
( ( (uint64_t)pObusImg[i + 6] << 8 ) & 0x000000000000FF00ull ) |
180-
( ( (uint64_t)pObusImg[i + 7] << 0 ) & 0x00000000000000FFull );
119+
data = (((uint64_t) * (pObusImg + i + 0) << 56) & 0xFF00000000000000ull) |
120+
(((uint64_t) * (pObusImg + i + 1) << 48) & 0x00FF000000000000ull) |
121+
(((uint64_t) * (pObusImg + i + 2) << 40) & 0x0000FF0000000000ull) |
122+
(((uint64_t) * (pObusImg + i + 3) << 32) & 0x000000FF00000000ull) |
123+
(((uint64_t) * (pObusImg + i + 4) << 24) & 0x00000000FF000000ull) |
124+
(((uint64_t) * (pObusImg + i + 5) << 16) & 0x0000000000FF0000ull) |
125+
(((uint64_t) * (pObusImg + i + 6) << 8) & 0x000000000000FF00ull) |
126+
(((uint64_t) * (pObusImg + i + 7) << 0) & 0x00000000000000FFull);
127+
181128
// Write Data, as the address will be autoincremented.
182-
FAPI_TRY( scomWrite( i_tgt, baseAddr | MEM_ARB_CSDR, data ),
183-
"I/O Obus PPE Data Write Failed." );
129+
FAPI_TRY(scomWrite(iTgt, MEM_ARB_CSDR, data), "Data Write Failed.");
184130
}
185131

186132
// Disable Auto Increment
187-
FAPI_TRY( scomWrite( i_tgt, baseAddr | MEM_ARB_SCR, PPE_AUTOINC_DIS ),
188-
"I/O Obus PPE Auto-Increment Disable Failed." );
133+
FAPI_TRY(scomWrite(iTgt, MEM_ARB_SCR, AUTOINC_DIS), "Auto-Increment Disable Failed.");
189134

190135
// PPE Reset
191-
FAPI_TRY( scomWrite( i_tgt, baseAddr | XCR_NONE, PPE_HARD_RESET ),
192-
"I/O Obus PPE Hard Reset Failed. " );
136+
FAPI_TRY(scomWrite(iTgt, XCR_NONE, HARD_RESET), "Hard Reset Failed.");
193137

194138
// PPE Resume From Halt
195-
FAPI_TRY( scomWrite( i_tgt, baseAddr | XCR_NONE, PPE_RESUME_FROM_HALT ),
196-
"I/O Obus PPE Resume From Halt Failed." );
197-
198-
FAPI_IMP( "Exit p9_hcode_image_build." );
139+
FAPI_TRY(scomWrite(iTgt, XCR_NONE, RESUME_FROM_HALT), "Resume From Halt Failed.");
199140

200141
fapi_try_exit:
142+
FAPI_IMP("Exit p9_io_obus_image_build.");
201143
return fapi2::current_err;
202144
}

‎src/import/chips/p9/procedures/hwp/io/p9_io_obus_image_build.H

Lines changed: 5 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -32,7 +32,7 @@
3232
/// *HWP HPW Backup Owner : Gary Peterson <garyp@us.ibm.com>
3333
/// *HWP FW Owner : Jamie Knight <rjknight@us.ibm.com>
3434
/// *HWP Team : IO
35-
/// *HWP Level : 1
35+
/// *HWP Level : 2
3636
/// *HWP Consumed by : FSP:HB
3737
///----------------------------------------------------------------------------
3838

@@ -43,20 +43,17 @@
4343
#include <fapi2.H>
4444

4545

46-
typedef fapi2::ReturnCode ( *p9_io_obus_image_build_FP_t )
47-
( const fapi2::Target < fapi2::TARGET_TYPE_OBUS >,
48-
void* const );
46+
typedef const fapi2::Target<fapi2::TARGET_TYPE_OBUS> CONST_OBUS;
47+
48+
typedef fapi2::ReturnCode (*p9_io_obus_image_build_FP_t)(CONST_OBUS&, void* const);
4949

5050
extern "C"
5151
{
52-
5352
/**
5453
* @brief builds a STOP image using a refrence image as input.
5554
* @param i_tgt fapi2 target for obus chip unit.
5655
* @param i_pimage points to memory mapped refrence image in PNOR.
5756
*/
58-
fapi2::ReturnCode p9_io_obus_image_build(
59-
const fapi2::Target < fapi2::TARGET_TYPE_OBUS > i_target,
60-
void* const i_pimage );
57+
fapi2::ReturnCode p9_io_obus_image_build(CONST_OBUS& iTgt, void* const iImagePtr);
6158
} // extern C
6259
#endif //__IO_IOO_HCODE_IMG_BUILD_H_

‎src/import/chips/p9/procedures/hwp/io/p9_io_obus_image_build.mk

Lines changed: 2 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -23,7 +23,6 @@
2323
#
2424
# IBM_PROLOG_END_TAG
2525
PROCEDURE=p9_io_obus_image_build
26-
OBUS_BUILD_UTIL=$(ROOTPATH)/chips/p9/xip/
27-
$(PROCEDURE)_DEPLIBS+=p9_xip_image
28-
$(call ADD_MODULE_INCDIR,$(PROCEDURE),$(OBUS_BUILD_UTIL))
26+
lib$(PROCEDURE)_DEPLIBS+=p9_xip_image
27+
$(call ADD_MODULE_INCDIR,$(PROCEDURE),$(ROOTPATH)/chips/p9/xip)
2928
$(call BUILD_PROCEDURE)

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