PM: Fixed offset for CME Instance rings in CPMR Header.

After realization of compact image layout, CPMR header's field pointing to core specific ring must be populated with a dynamically calculated offset instead of a fixed value of 300KB. CME's boot code doing second block copy too needs to be updated accordigly. Hcode Image build wrapper doing extraction of CPMR-CME region needs update as well. Rebase Change-Id: I366daca2d4fb81b683c387d2b6942a904b631ab0 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/35529 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: ASHISH A. MORE <ashish.more@in.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Dev-Ready: Gregory S. Still <stillgs@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/35531 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
open-power · Feb 2, 2017 · 16ed14f · 16ed14f
1 parent de8ec0a
commit 16ed14f
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Showing 2 changed files with 6 additions and 2 deletions.
diff --git a/src/import/chips/p9/procedures/hwp/lib/p9_hcode_image_defines.H b/src/import/chips/p9/procedures/hwp/lib/p9_hcode_image_defines.H
@@ -386,7 +386,6 @@ enum
     CME_INSTRUMENTATION_SIZE    = HALF_KB,      // per CME
     INSTRUMENTATION_COUNTERS    = HALF_KB,      // (???)
     CME_SRAM_HCODE_OFFSET       = 0x00, //(???)
-    CME_INST_SPEC_RING_START    = 300 * ONE_KB,
     CME_REGION_START            =  (CORE_SCOM_START + CORE_SCOM_RES_SIZE),
     CME_BLOCK_READ_LEN          = 32,
     CME_BLK_SIZE_SHIFT          = 0x05,

diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_hcode_image_build.C b/src/import/chips/p9/procedures/hwp/pm/p9_hcode_image_build.C
@@ -672,7 +672,12 @@ extern "C"
 
         if( pCmeHdr->g_cme_max_spec_ring_length )
         {
-            pCpmrHdr->coreSpecRingOffset        =   SWIZZLE_4_BYTE(CME_INST_SPEC_RING_START);
+            pCpmrHdr->coreSpecRingOffset        =   ( SWIZZLE_4_BYTE(pCpmrHdr->cmeImgOffset) << CME_BLK_SIZE_SHIFT ) +
+                                                    SWIZZLE_4_BYTE( pCpmrHdr->cmeImgLength) +
+                                                    SWIZZLE_4_BYTE(pCpmrHdr->cmePstateLength) +
+                                                    SWIZZLE_4_BYTE(pCpmrHdr->cmeCommonRingLength);
+            pCpmrHdr->coreSpecRingOffset        =   (pCpmrHdr->coreSpecRingOffset + CME_BLOCK_READ_LEN - 1) >> CME_BLK_SIZE_SHIFT;
+            pCpmrHdr->coreSpecRingOffset        =   SWIZZLE_4_BYTE(pCpmrHdr->coreSpecRingOffset);
             pCpmrHdr->coreSpecRingLength        =   pCmeHdr->g_cme_max_spec_ring_length; // already swizzled
         }