Skip to content

Commit

Permalink
p9_chiplet_scominit - add Cumulus support
Browse files Browse the repository at this point in the history 
requirers ecmd 14-7

Change-Id: I01a4529cc53718dbcd5aabc5157ef027db52418a
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/39697
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Reviewed-by: LENNARD G. STREAT <lstreat@us.ibm.com>
Reviewed-by: Benjamin Gass <bgass@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/39698
Reviewed-by: Hostboot Team <hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Dean Sanner <dsanner@us.ibm.com>
  • Loading branch information
@LiuYangFan @sannerd
LiuYangFan authored and sannerd committed Jul 14, 2017
1 parent c0cb66e commit 34514fe
Showing 1 changed file with 160 additions and 62 deletions.
222 changes: 160 additions & 62 deletions src/import/chips/p9/procedures/hwp/nest/p9_chiplet_scominit.C
View file
Expand Up @@ -43,6 +43,14 @@
#include <p9_fbc_ioo_tl_scom.H>
#include <p9_fbc_ioo_dl_scom.H>
#include <p9n_mcs_scom.H>

//TODO: RTC 176054
#ifndef __HOSTBOOT_MODULE
#include <p9c_dmi_scom.H>
#include <p9c_mi_scom.H>
#include <p9c_mc_scom.H>
#endif

#include <p9_cxa_scom.H>
#include <p9_nx_scom.H>
#include <p9_int_scom.H>
Expand Down Expand Up @@ -93,6 +101,14 @@ fapi2::ReturnCode p9_chiplet_scominit(const fapi2::Target<fapi2::TARGET_TYPE_PRO
fapi2::Target<fapi2::TARGET_TYPE_SYSTEM> FAPI_SYSTEM;
std::vector<fapi2::Target<fapi2::TARGET_TYPE_OBUS>> l_obus_chiplets;
std::vector<fapi2::Target<fapi2::TARGET_TYPE_MCS>> l_mcs_targets;
std::vector<fapi2::Target<fapi2::TARGET_TYPE_MI>> l_mi_targets;

//TODO: RTC 176054
#ifndef __HOSTBOOT_MODULE
std::vector<fapi2::Target<fapi2::TARGET_TYPE_MC>> l_mc_targets;
#endif

std::vector<fapi2::Target<fapi2::TARGET_TYPE_DMI>> l_dmi_targets;
std::vector<fapi2::Target<fapi2::TARGET_TYPE_CAPP>> l_capp_targets;
std::vector<fapi2::Target<fapi2::TARGET_TYPE_OBUS_BRICK>> l_obrick_targets;
fapi2::buffer<uint64_t> l_ob0data(0x0);
Expand All @@ -110,95 +126,177 @@ fapi2::ReturnCode p9_chiplet_scominit(const fapi2::Target<fapi2::TARGET_TYPE_PRO
// Get proc target string
fapi2::toString(i_target, l_procTargetStr, sizeof(l_procTargetStr));

// invoke IOO (OBUS FBC IO) SCOM initfiles
l_obus_chiplets = i_target.getChildren<fapi2::TARGET_TYPE_OBUS>();

if (!l_no_ndl_iovalid)
for (auto l_obus_target : l_obus_chiplets)
{
uint8_t l_unit_pos;
uint8_t l_obus_mode;
FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_UNIT_POS, l_obus_target, l_unit_pos),
"Error from FAPI_ATTR_GET(ATTR_CHIP_UNIT_POS)");
FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_OPTICS_CONFIG_MODE, l_obus_target, l_obus_mode),
"Error from FAPI_ATTR_GET(ATTR_OPTICS_CONFIG_MODE)");

//Update NDL IOValid data as needed
if (!l_no_ndl_iovalid && (l_unit_pos == 0 || l_unit_pos == 3) && //NDL only exists on obus 0 and 3
l_obus_mode == fapi2::ENUM_ATTR_OPTICS_CONFIG_MODE_NV)
{

l_obrick_targets = i_target.getChildren<fapi2::TARGET_TYPE_OBUS_BRICK>();
l_obrick_targets = l_obus_target.getChildren<fapi2::TARGET_TYPE_OBUS_BRICK>();

for (auto l_obrick_target : l_obrick_targets)
{
fapi2::toString(l_obrick_target, l_chipletTargetStr, sizeof(l_chipletTargetStr));
FAPI_DBG("Setting NDL IOValid for %s...", l_chipletTargetStr);

uint8_t l_unit_pos;
FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_UNIT_POS, l_obrick_target, l_unit_pos),
"Error from FAPI_ATTR_GET(ATTR_CHIP_UNIT_POS)");

//Mapping from John Irish (jdirish@us.ibm.com)
//OBus Register bit NV instance NV pos
//OB0 NV0 io_valid(A) STK0.NTL0.. 0
//OB0 NV1 io_valid(B) STK0.NTL1.. 1
//OB0 NV2 io_valid(C) STK1.NTL0.. 2
//OB3 NV2 io_valid(C) STK1.NTL1.. 3
//OB3 NV1 io_valid(B) STK2.NTL0.. 4
//OB3 NV0 io_valid(A) STK2.NTL1.. 5
switch (l_unit_pos)
for (auto l_obrick_target : l_obrick_targets)
{
case OBRICK0_POS:
l_ob0data.setBit<PERV_OB_CPLT_CONF1_OBRICKA_IOVALID>();
break;
fapi2::toString(l_obrick_target, l_chipletTargetStr, sizeof(l_chipletTargetStr));
FAPI_DBG("Setting NDL IOValid for %s...", l_chipletTargetStr);

uint8_t l_unit_pos;
FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_UNIT_POS, l_obrick_target, l_unit_pos),
"Error from FAPI_ATTR_GET(ATTR_CHIP_UNIT_POS)");

//Mapping from John Irish (jdirish@us.ibm.com)
//OBus Register bit NV instance NV pos
//OB0 NV0 io_valid(A) STK0.NTL0.. 0
//OB0 NV1 io_valid(B) STK0.NTL1.. 1
//OB0 NV2 io_valid(C) STK1.NTL0.. 2
//OB3 NV2 io_valid(C) STK1.NTL1.. 3
//OB3 NV1 io_valid(B) STK2.NTL0.. 4
//OB3 NV0 io_valid(A) STK2.NTL1.. 5
switch (l_unit_pos)
{
case OBRICK0_POS:
l_ob0data.setBit<PERV_OB_CPLT_CONF1_OBRICKA_IOVALID>();
break;

case OBRICK1_POS:
l_ob0data.setBit<PERV_OB_CPLT_CONF1_OBRICKB_IOVALID>();
break;

case OBRICK2_POS:
l_ob0data.setBit<PERV_OB_CPLT_CONF1_OBRICKC_IOVALID>();
break;

//OBRICK3..8 associated with OBUS 1 & 2 do not have NDL

case OBRICK9_POS:
l_ob3data.setBit<PERV_OB_CPLT_CONF1_OBRICKC_IOVALID>();
break;

case OBRICK10_POS:
l_ob3data.setBit<PERV_OB_CPLT_CONF1_OBRICKB_IOVALID>();
break;

case OBRICK11_POS:
l_ob3data.setBit<PERV_OB_CPLT_CONF1_OBRICKA_IOVALID>();
break;

default:
FAPI_ASSERT(false, fapi2::P9_CHIPLET_SCOMINIT_UNSUPPORTED_OBRICK_POS_ERR().set_TARGET(l_obrick_target),
"ERROR; Unsupported NV position.");

}

case OBRICK1_POS:
l_ob0data.setBit<PERV_OB_CPLT_CONF1_OBRICKB_IOVALID>();
break;
}

case OBRICK2_POS:
l_ob0data.setBit<PERV_OB_CPLT_CONF1_OBRICKC_IOVALID>();
break;
}

case OBRICK9_POS:
l_ob3data.setBit<PERV_OB_CPLT_CONF1_OBRICKC_IOVALID>();
break;
}

case OBRICK10_POS:
l_ob3data.setBit<PERV_OB_CPLT_CONF1_OBRICKB_IOVALID>();
break;
//Write the NDL IOValid registers as needed.
if (l_ob0data != 0)
{
FAPI_TRY(putScom(i_target, PERV_OB0_CPLT_CONF1_OR, l_ob0data));
}

case OBRICK11_POS:
l_ob3data.setBit<PERV_OB_CPLT_CONF1_OBRICKA_IOVALID>();
break;
if (l_ob3data != 0)
{
FAPI_TRY(putScom(i_target, PERV_OB3_CPLT_CONF1_OR, l_ob3data));
}

default:
FAPI_ASSERT(false, fapi2::P9_CHIPLET_SCOMINIT_UNSUPPORTED_OBRICK_POS_ERR().set_TARGET(l_obrick_target),
"ERROR; Unsupported NV position.");

}
l_mcs_targets = i_target.getChildren<fapi2::TARGET_TYPE_MCS>();
l_mi_targets = i_target.getChildren<fapi2::TARGET_TYPE_MI>();
l_dmi_targets = i_target.getChildren<fapi2::TARGET_TYPE_DMI>();

}
//TODO: RTC 176054
#ifndef __HOSTBOOT_MODULE
l_mc_targets = i_target.getChildren<fapi2::TARGET_TYPE_MC>();
#endif

if (l_ob0data != 0)
if (l_mcs_targets.size())
{
for (auto l_mcs_target : l_mcs_targets)
{
FAPI_TRY(putScom(i_target, PERV_OB0_CPLT_CONF1_OR, l_ob0data));
}
fapi2::toString(l_mcs_target, l_chipletTargetStr, sizeof(l_chipletTargetStr));
FAPI_DBG("Invoking p9n.mcs.scom.initfile on target %s...", l_chipletTargetStr);
FAPI_EXEC_HWP(l_rc, p9n_mcs_scom, l_mcs_target, FAPI_SYSTEM, i_target,
l_mcs_target.getParent<fapi2::TARGET_TYPE_MCBIST>());

if (l_ob3data != 0)
{
FAPI_TRY(putScom(i_target, PERV_OB3_CPLT_CONF1_OR, l_ob3data));
if (l_rc)
{
FAPI_ERR("Error from p9.mcs.scom.initfile");
fapi2::current_err = l_rc;
goto fapi_try_exit;
}
}

}

l_mcs_targets = i_target.getChildren<fapi2::TARGET_TYPE_MCS>();
//TODO: RTC 176054
#ifndef __HOSTBOOT_MODULE

for (auto l_mcs_target : l_mcs_targets)
else if (l_mc_targets.size())
{
fapi2::toString(l_mcs_target, l_chipletTargetStr, sizeof(l_chipletTargetStr));
FAPI_DBG("Invoking p9.mcs.scom.initfile on target %s...", l_chipletTargetStr);
FAPI_EXEC_HWP(l_rc, p9n_mcs_scom, l_mcs_target, FAPI_SYSTEM, i_target,
l_mcs_target.getParent<fapi2::TARGET_TYPE_MCBIST>());
for (auto l_mc_target : l_mc_targets)
{
fapi2::toString(l_mc_target, l_chipletTargetStr, sizeof(l_chipletTargetStr));
FAPI_DBG("Invoking p9c.mc.scom.initfile on target %s...", l_chipletTargetStr);
FAPI_EXEC_HWP(l_rc, p9c_mc_scom, l_mc_target, FAPI_SYSTEM);

if (l_rc)
if (l_rc)
{
FAPI_ERR("Error from p9c.mc.scom.initfile");
fapi2::current_err = l_rc;
goto fapi_try_exit;
}
}

for (auto l_mi_target : l_mi_targets)
{
FAPI_ERR("Error from p9.mcs.scom.initfile");
fapi2::current_err = l_rc;
goto fapi_try_exit;
fapi2::toString(l_mi_target, l_chipletTargetStr, sizeof(l_chipletTargetStr));
FAPI_DBG("Invoking p9c.mi.scom.initfile on target %s...", l_chipletTargetStr);
FAPI_EXEC_HWP(l_rc, p9c_mi_scom, l_mi_target, FAPI_SYSTEM);

if (l_rc)
{
FAPI_ERR("Error from p9c.mi.scom.initfile");
fapi2::current_err = l_rc;
goto fapi_try_exit;
}
}

for (auto l_dmi_target : l_dmi_targets)
{
fapi2::toString(l_dmi_target, l_chipletTargetStr, sizeof(l_chipletTargetStr));
FAPI_DBG("Invoking p9c.dmi.scom.initfile on target %s...", l_chipletTargetStr);
FAPI_EXEC_HWP(l_rc, p9c_dmi_scom, l_dmi_target, FAPI_SYSTEM);

if (l_rc)
{
FAPI_ERR("Error from p9c.dmi.scom.initfile");
fapi2::current_err = l_rc;
goto fapi_try_exit;
}
}
}

//TODO: RTC 176054
#endif // __HOSTBOOT_MODULE

else
{
FAPI_INF("No MCS/MI targets found! Do nothing!");
}

// invoke IOO (OBUS FBC IO) SCOM initfiles
l_obus_chiplets = i_target.getChildren<fapi2::TARGET_TYPE_OBUS>();

FAPI_DBG("Invoking p9.fbc.ioo_tl.scom.initfile on target %s...", l_procTargetStr);
FAPI_EXEC_HWP(l_rc, p9_fbc_ioo_tl_scom, i_target, FAPI_SYSTEM);
Expand Down

0 comments on commit 34514fe

Please sign in to comment.