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DMI Linktraining and Centaur Dccal
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Change-Id: I29e43df88a2a4ff2fff0b6bea8d1608a0b78edb1
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41730
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Matt K. Light <mklight@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Gary A. Peterson <garyp@us.ibm.com>
Reviewed-by: Richard J. Knight <rjknight@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41841
Reviewed-by: Hostboot Team <hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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@steffenchris @dcrowell77
steffenchris authored and dcrowell77 committed Jun 19, 2017
1 parent 0483af6 commit 413854f
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151 changes: 109 additions & 42 deletions src/import/chips/p9/procedures/hwp/io/p9_io_common.C
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Expand Up @@ -5,7 +5,7 @@
/* */
/* OpenPOWER HostBoot Project */
/* */
/* Contributors Listed Below - COPYRIGHT 2016 */
/* Contributors Listed Below - COPYRIGHT 2016,2017 */
/* [+] International Business Machines Corp. */
/* */
/* */
Expand Down Expand Up @@ -57,58 +57,125 @@
* @param[in] i_grp Clock group
* @return Field Data
*/
fapi2::ReturnCode p9_io_xbus_shorten_timers( const XBUS_TGT i_tgt, const uint8_t i_grp )
fapi2::ReturnCode p9_io_xbus_shorten_timers(const XBUS_TGT& i_tgt, const uint8_t i_grp)
{
FAPI_IMP( "p9_io_xbus_shorten_timers: I/O EDI+ Xbus Entering" );
FAPI_IMP("p9_io_xbus_shorten_timers: I/O EDI+ Xbus Entering");
const uint8_t LN0 = 0;
uint64_t reg_data = 0;
uint8_t l_is_sim = 0;

FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_IS_SIMULATION, fapi2::Target<fapi2::TARGET_TYPE_SYSTEM>(), l_is_sim) );
FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_IS_SIMULATION, fapi2::Target<fapi2::TARGET_TYPE_SYSTEM>(), l_is_sim));

if( l_is_sim )
if(l_is_sim)
{
FAPI_TRY( io::read( EDIP_RX_CTL_MODE7_EO_PG, i_tgt, i_grp, LN0, reg_data ),
"read edip_rx_ctl_mode7_eo_pg failed" );
io::set( EDIP_RX_ABORT_CHECK_TIMEOUT_SEL, 0x0, reg_data );
io::set( EDIP_RX_POLLING_TIMEOUT_SEL, 0x0, reg_data );
FAPI_TRY( io::write( EDIP_RX_CTL_MODE7_EO_PG, i_tgt, i_grp, LN0, reg_data ),
"write edip_rx_ctl_mode7_eo_pg failed" );

FAPI_TRY( io::rmw( EDIP_RX_SERVO_CHG_CFG, i_tgt, i_grp, LN0, 0x0 ),
"rmw edip_rx_rx_servo_chg_cfg failed" );


FAPI_TRY( io::read( EDIP_RX_CTL_MODE14_EO_PG, i_tgt, i_grp, LN0, reg_data ),
"read edip_rx_ctl_mode14_eo_pg failed" );
io::set( EDIP_RX_AMP_INIT_TIMEOUT, 0x0, reg_data );
io::set( EDIP_RX_AMP_RECAL_TIMEOUT, 0x0, reg_data );
io::set( EDIP_RX_PEAK_INIT_TIMEOUT, 0x0, reg_data );
io::set( EDIP_RX_PEAK_RECAL_TIMEOUT, 0x0, reg_data );
FAPI_TRY( io::write( EDIP_RX_CTL_MODE14_EO_PG, i_tgt, i_grp, LN0, reg_data ),
"write edip_rx_ctl_mode14_eo_pg failed" );

FAPI_TRY( io::read( EDIP_RX_CTL_MODE15_EO_PG, i_tgt, i_grp, LN0, reg_data ),
"read edip_rx_ctl_mode15_eo_pg failed" );
io::set( EDIP_RX_AMIN_TIMEOUT, 0x0, reg_data );
io::set( EDIP_RX_CM_TIMEOUT, 0x0, reg_data );
io::set( EDIP_RX_OFF_INIT_TIMEOUT, 0x0, reg_data );
io::set( EDIP_RX_OFF_RECAL_TIMEOUT, 0x0, reg_data );
FAPI_TRY( io::write( EDIP_RX_CTL_MODE15_EO_PG, i_tgt, i_grp, LN0, reg_data ),
"write edip_rx_ctl_mode15_eo_pg failed" );

FAPI_TRY( io::read( EDIP_RX_CTL_MODE16_EO_PG, i_tgt, i_grp, LN0, reg_data ),
"read edip_rx_ctl_mode16_eo_pg failed" );
io::set( EDIP_RX_AMP_TIMEOUT, 0x0, reg_data );
io::set( EDIP_RX_BER_TIMEOUT, 0x0, reg_data );
io::set( EDIP_RX_USERDEF_TIMEOUT, 0x0, reg_data );
FAPI_TRY( io::write( EDIP_RX_CTL_MODE16_EO_PG, i_tgt, i_grp, LN0, reg_data ),
"write edip_rx_ctl_mode16_eo_pg failed" );
FAPI_TRY(io::read(EDIP_RX_CTL_MODE7_EO_PG, i_tgt, i_grp, LN0, reg_data));
io::set(EDIP_RX_ABORT_CHECK_TIMEOUT_SEL, 0x0, reg_data);
io::set(EDIP_RX_POLLING_TIMEOUT_SEL, 0x0, reg_data);
FAPI_TRY(io::write(EDIP_RX_CTL_MODE7_EO_PG, i_tgt, i_grp, LN0, reg_data));

FAPI_TRY(io::rmw(EDIP_RX_SERVO_CHG_CFG, i_tgt, i_grp, LN0, 0x0));


FAPI_TRY(io::read(EDIP_RX_CTL_MODE14_EO_PG, i_tgt, i_grp, LN0, reg_data));
io::set(EDIP_RX_AMP_INIT_TIMEOUT, 0x0, reg_data);
io::set(EDIP_RX_AMP_RECAL_TIMEOUT, 0x0, reg_data);
io::set(EDIP_RX_PEAK_INIT_TIMEOUT, 0x0, reg_data);
io::set(EDIP_RX_PEAK_RECAL_TIMEOUT, 0x0, reg_data);
FAPI_TRY(io::write(EDIP_RX_CTL_MODE14_EO_PG, i_tgt, i_grp, LN0, reg_data));

FAPI_TRY(io::read(EDIP_RX_CTL_MODE15_EO_PG, i_tgt, i_grp, LN0, reg_data));
io::set(EDIP_RX_AMIN_TIMEOUT, 0x0, reg_data);
io::set(EDIP_RX_CM_TIMEOUT, 0x0, reg_data);
io::set(EDIP_RX_OFF_INIT_TIMEOUT, 0x0, reg_data);
io::set(EDIP_RX_OFF_RECAL_TIMEOUT, 0x0, reg_data);
FAPI_TRY(io::write(EDIP_RX_CTL_MODE15_EO_PG, i_tgt, i_grp, LN0, reg_data));

FAPI_TRY(io::read(EDIP_RX_CTL_MODE16_EO_PG, i_tgt, i_grp, LN0, reg_data));
io::set(EDIP_RX_AMP_TIMEOUT, 0x0, reg_data);
io::set(EDIP_RX_BER_TIMEOUT, 0x0, reg_data);
io::set(EDIP_RX_USERDEF_TIMEOUT, 0x0, reg_data);
FAPI_TRY(io::write(EDIP_RX_CTL_MODE16_EO_PG, i_tgt, i_grp, LN0, reg_data));
}

fapi_try_exit:
FAPI_IMP( "p9_io_xbus_shorten_timers: I/O EDI+ Xbus Exiting" );
FAPI_IMP("p9_io_xbus_shorten_timers: I/O EDI+ Xbus Exiting");
return fapi2::current_err;
}

/**
* @brief Shorten timers if we are running in simulation
* a right aligned value.
* @param[in] i_tgt FAPI2 Target
* @return Field Data
*/
fapi2::ReturnCode p9_io_dmi_proc_shorten_timers(const DMI_PROC_TGT& i_tgt)
{
FAPI_IMP("p9_io_dmi_proc_shorten_timers: I/O EDI+ DMI Proc Entering");
const uint8_t GRP3 = 3;
const uint8_t LN0 = 0;
uint64_t reg_data = 0;
uint8_t l_is_sim = 0;

FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_IS_SIMULATION, fapi2::Target<fapi2::TARGET_TYPE_SYSTEM>(), l_is_sim));

if(l_is_sim)
{
FAPI_TRY(io::read(EDIP_RX_CTL_MODE7_EO_PG, i_tgt, GRP3, LN0, reg_data));
io::set(EDIP_RX_ABORT_CHECK_TIMEOUT_SEL, 0x0, reg_data);
io::set(EDIP_RX_POLLING_TIMEOUT_SEL, 0x0, reg_data);
FAPI_TRY(io::write(EDIP_RX_CTL_MODE7_EO_PG, i_tgt, GRP3, LN0, reg_data));

FAPI_TRY(io::rmw(EDIP_RX_SERVO_CHG_CFG, i_tgt, GRP3, LN0, 0x0));


FAPI_TRY(io::read(EDIP_RX_CTL_MODE14_EO_PG, i_tgt, GRP3, LN0, reg_data));
io::set(EDIP_RX_AMP_INIT_TIMEOUT, 0x0, reg_data);
io::set(EDIP_RX_AMP_RECAL_TIMEOUT, 0x0, reg_data);
io::set(EDIP_RX_PEAK_INIT_TIMEOUT, 0x0, reg_data);
io::set(EDIP_RX_PEAK_RECAL_TIMEOUT, 0x0, reg_data);
FAPI_TRY(io::write(EDIP_RX_CTL_MODE14_EO_PG, i_tgt, GRP3, LN0, reg_data));

FAPI_TRY(io::read(EDIP_RX_CTL_MODE15_EO_PG, i_tgt, GRP3, LN0, reg_data));
io::set(EDIP_RX_AMIN_TIMEOUT, 0x0, reg_data);
io::set(EDIP_RX_CM_TIMEOUT, 0x0, reg_data);
io::set(EDIP_RX_OFF_INIT_TIMEOUT, 0x0, reg_data);
io::set(EDIP_RX_OFF_RECAL_TIMEOUT, 0x0, reg_data);
FAPI_TRY(io::write(EDIP_RX_CTL_MODE15_EO_PG, i_tgt, GRP3, LN0, reg_data));

FAPI_TRY(io::read(EDIP_RX_CTL_MODE16_EO_PG, i_tgt, GRP3, LN0, reg_data));
io::set(EDIP_RX_AMP_TIMEOUT, 0x0, reg_data);
io::set(EDIP_RX_BER_TIMEOUT, 0x0, reg_data);
io::set(EDIP_RX_USERDEF_TIMEOUT, 0x0, reg_data);
FAPI_TRY(io::write(EDIP_RX_CTL_MODE16_EO_PG, i_tgt, GRP3, LN0, reg_data));
}

fapi_try_exit:
FAPI_IMP("p9_io_dmi_proc_shorten_timers: I/O EDI+ DMI Proc Exiting");
return fapi2::current_err;
}

/**
* @brief Shorten timers if we are running in simulation
* a right aligned value.
* @param[in] i_tgt FAPI2 Target
* @return Field Data
*/
fapi2::ReturnCode p9_io_dmi_cn_shorten_timers(const DMI_CN_TGT& i_tgt)
{
FAPI_IMP("p9_io_dmi_cn_shorten_timers: I/O EDI DMI Centaur Entering");
//const uint8_t GRP0 = 0;
//const uint8_t LN0 = 0;
//uint64_t reg_data = 0;
uint8_t l_is_sim = 0;

FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_IS_SIMULATION, fapi2::Target<fapi2::TARGET_TYPE_SYSTEM>(), l_is_sim));

if(l_is_sim)
{
}

fapi_try_exit:
FAPI_IMP("p9_io_dmi_cn_shorten_timers: I/O EDI DMI Centaur Exiting");
return fapi2::current_err;
}

23 changes: 20 additions & 3 deletions src/import/chips/p9/procedures/hwp/io/p9_io_common.H
View file
Expand Up @@ -5,7 +5,7 @@
/* */
/* OpenPOWER HostBoot Project */
/* */
/* Contributors Listed Below - COPYRIGHT 2016 */
/* Contributors Listed Below - COPYRIGHT 2016,2017 */
/* [+] International Business Machines Corp. */
/* */
/* */
Expand Down Expand Up @@ -52,6 +52,8 @@
#include <fapi2.H>

typedef fapi2::Target<fapi2::TARGET_TYPE_XBUS> XBUS_TGT;
typedef fapi2::Target<fapi2::TARGET_TYPE_DMI> DMI_PROC_TGT;
typedef fapi2::Target<fapi2::TARGET_TYPE_MEMBUF_CHIP> DMI_CN_TGT;

extern "C"
{
Expand All @@ -64,9 +66,24 @@ extern "C"
* @return Field Data
*/
fapi2::ReturnCode p9_io_xbus_shorten_timers(
const XBUS_TGT i_tgt,
const XBUS_TGT& i_tgt,
const uint8_t i_grp );

}
/**
* @brief Shorten timers if we are running in simulation
* a right aligned value.
* @param[in] i_tgt FAPI2 Target
* @return Field Data
*/
fapi2::ReturnCode p9_io_dmi_proc_shorten_timers(const DMI_PROC_TGT& i_tgt);

} /**
* @brief Shorten timers if we are running in simulation
* a right aligned value.
* @param[in] i_tgt FAPI2 Target
* @return Field Data
*/
fapi2::ReturnCode p9_io_dmi_cn_shorten_timers(const DMI_CN_TGT& i_tgt);


#endif /* P9_IO_COMMON_H_ */

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