Fifo mode inits now dictated by attribute

Change-Id: I203b4b1ff42e08a0aec71955e2a8fa51f9a463c9 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/36330 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: JACOB L. HARVEY <jlharvey@us.ibm.com> Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com> Dev-Ready: SHELTON LEUNG <sleung@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/36331 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
open-power · Feb 14, 2017 · 441fb19 · 441fb19
1 parent c758868
commit 441fb19
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diff --git a/src/import/chips/p9/initfiles/p9.mca.scom.initfile b/src/import/chips/p9/initfiles/p9.mca.scom.initfile
@@ -657,6 +657,16 @@ ispy MCP.PORT0.SRQ.PC.MBAREF0Q_CFG_REFR_CHECK_INTERVAL [when=S] {
   ( def_REFRESH_INTERVAL * def_NUM_RANKS * 6 ) / 5;
 }
 
+ispy MCP.PORT0.SRQ.MBA_WRQ0Q_CFG_WRQ_FIFO_MODE [when=S] {
+  spyv;
+  MCBIST.ATTR_MSS_REORDER_QUEUE_SETTING;
+}
+
+ispy MCP.PORT0.SRQ.MBA_RRQ0Q_CFG_RRQ_FIFO_MODE [when=S] {
+  spyv;
+  MCBIST.ATTR_MSS_REORDER_QUEUE_SETTING;
+}
+
 
 
 ####################################################

diff --git a/src/import/chips/p9/procedures/hwp/initfiles/p9_mca_scom.C b/src/import/chips/p9/procedures/hwp/initfiles/p9_mca_scom.C
@@ -142,6 +142,8 @@ fapi2::ReturnCode p9_mca_scom(const fapi2::Target<fapi2::TARGET_TYPE_MCA>& TGT0,
         FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_TRRD_S, TGT2, l_TGT2_ATTR_EFF_DRAM_TRRD_S));
         fapi2::ATTR_EFF_DRAM_TRRD_L_Type l_TGT2_ATTR_EFF_DRAM_TRRD_L;
         FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_EFF_DRAM_TRRD_L, TGT2, l_TGT2_ATTR_EFF_DRAM_TRRD_L));
+        fapi2::ATTR_MSS_REORDER_QUEUE_SETTING_Type l_TGT1_ATTR_MSS_REORDER_QUEUE_SETTING;
+        FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_MSS_REORDER_QUEUE_SETTING, TGT1, l_TGT1_ATTR_MSS_REORDER_QUEUE_SETTING));
         fapi2::ATTR_EFF_NUM_MASTER_RANKS_PER_DIMM_Type l_TGT2_ATTR_EFF_NUM_MASTER_RANKS_PER_DIMM;
         FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_EFF_NUM_MASTER_RANKS_PER_DIMM, TGT2, l_TGT2_ATTR_EFF_NUM_MASTER_RANKS_PER_DIMM));
         uint64_t l_def_SLOT0_DENOMINATOR = ((l_TGT2_ATTR_EFF_NUM_MASTER_RANKS_PER_DIMM[l_def_PORT_INDEX][literal_0] ==
@@ -400,9 +402,16 @@ fapi2::ReturnCode p9_mca_scom(const fapi2::Target<fapi2::TARGET_TYPE_MCA>& TGT0,
 
             FAPI_TRY(fapi2::putScom(TGT0, 0x701090cull, l_scom_buffer));
         }
+        {
+            FAPI_TRY(fapi2::getScom( TGT0, 0x701090dull, l_scom_buffer ));
+
+            l_scom_buffer.insert<5, 1, 63, uint64_t>(l_TGT1_ATTR_MSS_REORDER_QUEUE_SETTING );
+            FAPI_TRY(fapi2::putScom(TGT0, 0x701090dull, l_scom_buffer));
+        }
         {
             FAPI_TRY(fapi2::getScom( TGT0, 0x701090eull, l_scom_buffer ));
 
+            l_scom_buffer.insert<6, 1, 63, uint64_t>(l_TGT1_ATTR_MSS_REORDER_QUEUE_SETTING );
             l_scom_buffer.insert<24, 6, 58, uint64_t>(literal_0b011000 );
             FAPI_TRY(fapi2::putScom(TGT0, 0x701090eull, l_scom_buffer));
         }