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p9_setup_evid: add system parm (loadline, etc) support
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Change-Id: Ia8ac6ae59d1fabcead3a1beed14c71a21d59b2dd
RTC: 166812
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/36320
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Dean Sanner <dsanner@us.ibm.com>
Reviewed-by: Brian T. Vanderpool <vanderp@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/36323
Reviewed-by: Hostboot Team <hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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@stillgs @dcrowell77
stillgs authored and dcrowell77 committed Feb 13, 2017
1 parent 34d58de commit 6553e4a
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Showing 3 changed files with 104 additions and 78 deletions.
14 changes: 12 additions & 2 deletions src/import/chips/p9/procedures/hwp/lib/p9_pstates_common.h
View file
Expand Up @@ -5,7 +5,7 @@
/* */
/* OpenPOWER HostBoot Project */
/* */
/* Contributors Listed Below - COPYRIGHT 2015,2016 */
/* Contributors Listed Below - COPYRIGHT 2015,2017 */
/* [+] International Business Machines Corp. */
/* */
/* */
Expand Down Expand Up @@ -91,13 +91,23 @@

/// VPD #V Operating Points
#define VPD_PV_POINTS 4
#define VPD_PV_ORDER_STR {"PowerSave ", "Nominal ", "Turbo ", "UltraTurbo"}
#define VPD_PV_ORDER_STR {"Nominal ","PowerSave ", "Turbo ", "UltraTurbo"}
#define POWERSAVE 1
#define NOMINAL 0
#define TURBO 2
#define ULTRA 3
#define POWERBUS 4
#define VPD_PV_ORDER {POWERSAVE, NOMINAL, TURBO, ULTRA}

#define VPD_PV_CORE_FREQ_MHZ 0
#define VPD_PV_VDD_MV 1
#define VPD_PV_IDD_100MA 2
#define VPD_PV_VCS_MV 3
#define VPD_PV_ICS_100MA 4
#define VPD_PV_PB_FREQ_MHZ 0
#define VPD_PV_VDN_MV 1
#define VPD_PV_IDN_100MA 2

#define VPD_NUM_SLOPES_SET 2
#define VPD_SLOPES_RAW 0
#define VPD_SLOPES_BIASED 1
Expand Down
141 changes: 88 additions & 53 deletions src/import/chips/p9/procedures/hwp/pm/p9_setup_evid.C
View file
Expand Up @@ -5,7 +5,7 @@
/* */
/* OpenPOWER HostBoot Project */
/* */
/* Contributors Listed Below - COPYRIGHT 2016 */
/* Contributors Listed Below - COPYRIGHT 2016,2017 */
/* [+] International Business Machines Corp. */
/* */
/* */
Expand Down Expand Up @@ -55,21 +55,12 @@ enum P9_SETUP_EVID_CONSTANTS
// will use bridge 1
BRIDGE_NUMBER = 1,

// Default configuration settings
DEFAULT_VDD_BUS_NUMBER = 0,
DEFAULT_VDD_RAILSELECT = 0,
DEFAULT_VDN_BUS_NUMBER = 1,
DEFAULT_VDN_RAILSELECT = 0,
DEFAULT_VCS_BUS_NUMBER = 0,
DEFAULT_VCS_RAILSELECT = 1,

// Default voltages if mailbox -> attributes are not setup
DEFAULT_BOOT_VDD_VOLTAGE_MV = 1000,
DEFAULT_BOOT_VCS_VOLTAGE_MV = 1050,
DEFAULT_BOOT_VDN_VOLTAGE_MV = 900,
AVSBUS_VOLTAGE_WRITE_RETRY_COUNT = 5

};


//##############################################################################
// Function to initiate an eVRM voltage change.
//##############################################################################
Expand Down Expand Up @@ -169,9 +160,17 @@ struct avsbus_attrs_t
uint32_t vcs_voltage_mv;
uint32_t vdd_voltage_mv;
uint32_t vdn_voltage_mv;
uint32_t r_loadline_vdd_uohm;
uint32_t r_distloss_vdd_uohm;
uint32_t vrm_voffset_vdd_uv;
uint32_t r_loadline_vdn_uohm;
uint32_t r_distloss_vdn_uohm;
uint32_t vrm_voffset_vdn_uv;
uint32_t r_loadline_vcs_uohm;
uint32_t r_distloss_vcs_uohm;
uint32_t vrm_voffset_vcs_uv;
};


//@brief Initialize VDD/VCS/VDN bus num, rail select and voltage values
//@param[i] i_target Chip target
//@param[i] attrs VDD/VCS/VDN attributes
Expand All @@ -185,35 +184,29 @@ avsInitAttributes(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target,
uint32_t valid_pdv_points;
uint8_t present_chiplets;

attrs->vdd_bus_num = DEFAULT_VDD_BUS_NUMBER;
attrs->vdd_rail_select = DEFAULT_VDD_RAILSELECT;
attrs->vdd_voltage_mv = DEFAULT_BOOT_VDD_VOLTAGE_MV;
attrs->vdn_bus_num = DEFAULT_VDN_BUS_NUMBER;
attrs->vdn_rail_select = DEFAULT_VDN_RAILSELECT;
attrs->vdn_voltage_mv = DEFAULT_BOOT_VDN_VOLTAGE_MV;
attrs->vcs_bus_num = DEFAULT_VCS_BUS_NUMBER;
attrs->vcs_rail_select = DEFAULT_VCS_RAILSELECT;
attrs->vcs_voltage_mv = DEFAULT_BOOT_VCS_VOLTAGE_MV;

FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_VDD_AVSBUS_BUSNUM, i_target,
attrs->vdd_bus_num));
FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_VDD_AVSBUS_RAIL, i_target,
attrs->vdd_rail_select));
FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_VDN_AVSBUS_BUSNUM, i_target,
attrs->vdn_bus_num));
FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_VDN_AVSBUS_RAIL, i_target,
attrs->vdn_rail_select));
FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_VCS_AVSBUS_BUSNUM, i_target,
attrs->vcs_bus_num));
FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_VCS_AVSBUS_RAIL, i_target,
attrs->vcs_rail_select));
FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_VCS_BOOT_VOLTAGE, i_target,
attrs->vcs_voltage_mv));
FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_VDD_BOOT_VOLTAGE, i_target,
attrs->vdd_voltage_mv));
FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_VDN_BOOT_VOLTAGE, i_target,
attrs->vdn_voltage_mv));

#define DATABLOCK_GET_ATTR(_attr_name, _target, _attr_assign) \
FAPI_TRY(FAPI_ATTR_GET(fapi2::_attr_name, _target, _attr_assign),"Attribute read failed"); \
FAPI_INF("%-30s = 0x%08x %u", #_attr_name, _attr_assign, _attr_assign);

DATABLOCK_GET_ATTR(ATTR_VDD_AVSBUS_BUSNUM, i_target, attrs->vdd_bus_num);
DATABLOCK_GET_ATTR(ATTR_VDD_AVSBUS_RAIL, i_target, attrs->vdd_rail_select);
DATABLOCK_GET_ATTR(ATTR_VDN_AVSBUS_BUSNUM, i_target, attrs->vdn_bus_num);
DATABLOCK_GET_ATTR(ATTR_VDN_AVSBUS_RAIL, i_target, attrs->vdn_rail_select);
DATABLOCK_GET_ATTR(ATTR_VCS_AVSBUS_BUSNUM, i_target, attrs->vcs_bus_num);
DATABLOCK_GET_ATTR(ATTR_VCS_AVSBUS_RAIL, i_target, attrs->vcs_rail_select);
DATABLOCK_GET_ATTR(ATTR_VCS_BOOT_VOLTAGE, i_target, attrs->vcs_voltage_mv);
DATABLOCK_GET_ATTR(ATTR_VDD_BOOT_VOLTAGE, i_target, attrs->vdd_voltage_mv);
DATABLOCK_GET_ATTR(ATTR_VDN_BOOT_VOLTAGE, i_target, attrs->vdn_voltage_mv);

DATABLOCK_GET_ATTR(ATTR_PROC_R_LOADLINE_VDD_UOHM, i_target, attrs->r_loadline_vdd_uohm);
DATABLOCK_GET_ATTR(ATTR_PROC_R_DISTLOSS_VDD_UOHM, i_target, attrs->r_distloss_vdd_uohm);
DATABLOCK_GET_ATTR(ATTR_PROC_VRM_VOFFSET_VDD_UV, i_target, attrs->vrm_voffset_vdd_uv );
DATABLOCK_GET_ATTR(ATTR_PROC_R_LOADLINE_VDN_UOHM, i_target, attrs->r_loadline_vdn_uohm);
DATABLOCK_GET_ATTR(ATTR_PROC_R_DISTLOSS_VDN_UOHM, i_target, attrs->r_distloss_vdn_uohm);
DATABLOCK_GET_ATTR(ATTR_PROC_VRM_VOFFSET_VDN_UV, i_target, attrs->vrm_voffset_vdn_uv );
DATABLOCK_GET_ATTR(ATTR_PROC_R_LOADLINE_VCS_UOHM, i_target, attrs->r_loadline_vcs_uohm);
DATABLOCK_GET_ATTR(ATTR_PROC_R_DISTLOSS_VCS_UOHM, i_target, attrs->r_distloss_vcs_uohm);
DATABLOCK_GET_ATTR(ATTR_PROC_VRM_VOFFSET_VCS_UV, i_target, attrs->vrm_voffset_vcs_uv);

//We only wish to compute voltage setting defaults if the action
//inputed to the HWP tells us to
Expand All @@ -230,25 +223,53 @@ avsInitAttributes(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target,
// set VDD voltage to PowerSave Voltage from MVPD data (if no override)
if (attrs->vdd_voltage_mv)
{
FAPI_INF("VDD boot voltage override set");
FAPI_INF("VDD boot voltage override set.");
}
else
{
FAPI_INF("VDD boot voltage override not set, using VPD value");
attrs->vdd_voltage_mv = attr_mvpd_data[POWERSAVE][1];
FAPI_INF("VDD boot voltage override not set, using VPD value and correcting for applicable load line setting");
uint32_t vpd_vdd_voltage_mv = attr_mvpd_data[POWERSAVE][VPD_PV_VDD_MV];
attrs->vdd_voltage_mv =
( (vpd_vdd_voltage_mv * 1000) + // uV
( ( (attr_mvpd_data[POWERSAVE][VPD_PV_IDD_100MA] / 10) * // A
(attrs->r_loadline_vdd_uohm + attrs->r_distloss_vdd_uohm)) + // uohm -> A*uohm = uV
attrs->vrm_voffset_vdd_uv )) / 1000; // mV

FAPI_INF("VDD VPD voltage %d mV; Corrected voltage: %d mV; IDD: %d mA; LoadLine: %d uOhm; DistLoss: %d uOhm; Offst: %d uOhm",
vpd_vdd_voltage_mv,
attrs->vdd_voltage_mv,
attr_mvpd_data[POWERSAVE][VPD_PV_IDD_100MA] * 100,
attrs->r_loadline_vdd_uohm,
attrs->r_distloss_vdd_uohm,
attrs->vrm_voffset_vdd_uv);

FAPI_TRY(FAPI_ATTR_SET(fapi2::ATTR_VDD_BOOT_VOLTAGE, i_target, attrs->vdd_voltage_mv),
"Error from FAPI_ATTR_SET (ATTR_VDD_BOOT_VOLTAGE)");
}

// set VCS voltage to UltraTurbo Voltage from MVPD data (if no override)
if (attrs->vcs_voltage_mv)
{
FAPI_INF("VCS boot voltage override set");
FAPI_INF("VCS boot voltage override set.");
}
else
{
FAPI_INF("VCS boot voltage override not set, using VPD value");
attrs->vcs_voltage_mv = attr_mvpd_data[ULTRA][1];
FAPI_INF("VCS boot voltage override not set, using VPD value and correcting for applicable load line setting");
uint32_t vpd_vcs_voltage_mv = attr_mvpd_data[POWERSAVE][VPD_PV_VCS_MV];
attrs->vcs_voltage_mv =
( (vpd_vcs_voltage_mv * 1000) + // uV
( ( (attr_mvpd_data[POWERSAVE][VPD_PV_ICS_100MA] / 10) * // A
(attrs->r_loadline_vcs_uohm + attrs->r_distloss_vcs_uohm)) + // uohm -> A*uohm = uV
attrs->vrm_voffset_vcs_uv )) / 1000; // mV

FAPI_INF("VCS VPD voltage %d mV; Corrected voltage: %d mV; IDD: %d mA; LoadLine: %d uOhm; DistLoss: %d uOhm; Offst: %d uOhm",
vpd_vcs_voltage_mv,
attrs->vcs_voltage_mv,
attr_mvpd_data[POWERSAVE][VPD_PV_ICS_100MA] * 100,
attrs->r_loadline_vcs_uohm,
attrs->r_distloss_vcs_uohm,
attrs->vrm_voffset_vcs_uv);

FAPI_TRY(FAPI_ATTR_SET(fapi2::ATTR_VCS_BOOT_VOLTAGE, i_target, attrs->vcs_voltage_mv),
"Error from FAPI_ATTR_SET (ATTR_VCS_BOOT_VOLTAGE)");
}
Expand All @@ -260,8 +281,22 @@ avsInitAttributes(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target,
}
else
{
FAPI_INF("VDN boot voltage override not set, using VPD value");
attrs->vdn_voltage_mv = attr_mvpd_data[POWERBUS][1];
FAPI_INF("VDN boot voltage override not set, using VPD value and correcting for applicable load line setting");
uint32_t vpd_vdn_voltage_mv = attr_mvpd_data[POWERBUS][VPD_PV_VDN_MV];
attrs->vdn_voltage_mv =
( (vpd_vdn_voltage_mv * 1000) + // uV
( ( (attr_mvpd_data[POWERBUS][VPD_PV_IDN_100MA] / 10) * // A
(attrs->r_loadline_vdn_uohm + attrs->r_distloss_vdn_uohm)) + // uohm -> A*uohm = uV
attrs->vrm_voffset_vdn_uv )) / 1000; // mV

FAPI_INF("VDN VPD voltage %d mV; Corrected voltage: %d mV; IDN: %d mA; LoadLine: %d uOhm; DistLoss: %d uOhm; Offst: %d uOhm",
vpd_vdn_voltage_mv,
attrs->vdn_voltage_mv,
attr_mvpd_data[POWERBUS][VPD_PV_IDN_100MA] * 100,
attrs->r_loadline_vdn_uohm,
attrs->r_distloss_vdn_uohm,
attrs->vrm_voffset_vdn_uv);

FAPI_TRY(FAPI_ATTR_SET(fapi2::ATTR_VDN_BOOT_VOLTAGE, i_target, attrs->vdn_voltage_mv),
"Error from FAPI_ATTR_SET (ATTR_VDN_BOOT_VOLTAGE)");
}
Expand All @@ -273,11 +308,11 @@ avsInitAttributes(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target,
}

// trace values to be used
FAPI_INF("VDD boot voltage = %d mV (%x)",
FAPI_INF("VDD boot voltage = %d mV (0x%x)",
attrs->vdd_voltage_mv, attrs->vdd_voltage_mv);
FAPI_INF("VCS boot voltage = %d mV (%x)",
FAPI_INF("VCS boot voltage = %d mV (0x%x)",
attrs->vcs_voltage_mv, attrs->vcs_voltage_mv);
FAPI_INF("VDN boot voltage = %d mV (%x)",
FAPI_INF("VDN boot voltage = %d mV (0x%x)",
attrs->vdn_voltage_mv, attrs->vdn_voltage_mv);

fapi_try_exit:
Expand Down
27 changes: 4 additions & 23 deletions src/usr/isteps/istep06/call_host_voltage_config.C
View file
Expand Up @@ -116,9 +116,6 @@ void* call_host_voltage_config( void *io_pArgs )
uint32_t l_ceilingFreq = 0; //ATTR_FREQ_CORE_CEILING_MHZ
uint32_t l_ultraTurboFreq = 0; //ATTR_ULTRA_TURBO_FREQ_MHZ
uint32_t l_turboFreq = 0; //ATTR_FREQ_CORE_MAX
uint32_t l_vddBootVoltage = 0; //ATTR_VDD_BOOT_VOLTAGE
uint32_t l_vdnBootVoltage = 0; //ATTR_VDN_BOOT_VOLTAGE
uint32_t l_vcsBootVoltage = 0; //ATTR_VCS_BOOT_VOLTAGE
uint32_t l_nestFreq = 0; //ATTR_FREQ_PB_MHZ

bool l_firstPass = true;
Expand Down Expand Up @@ -234,17 +231,14 @@ void* call_host_voltage_config( void *io_pArgs )
continue;
}

// Save the voltage data for future comparison
// Save the freq data for future comparison
if( l_firstPass )
{
l_nominalFreq = l_voltageData.nomFreq;
l_floorFreq = l_voltageData.PSFreq;
l_ceilingFreq = l_voltageData.turboFreq;
l_ultraTurboFreq = l_voltageData.uTurboFreq;
l_turboFreq = l_voltageData.turboFreq;
l_vddBootVoltage = l_voltageData.VddPSVltg;
l_vdnBootVoltage = l_voltageData.VdnPbVltg;
l_vcsBootVoltage = l_voltageData.VcsPSVltg;
l_firstPass = false;
}
else
Expand Down Expand Up @@ -297,22 +291,9 @@ void* call_host_voltage_config( void *io_pArgs )

} // EQ for-loop


// set the approprate attributes on the processor
l_proc->setAttr<ATTR_VDD_BOOT_VOLTAGE>( l_vddBootVoltage );

l_proc->setAttr<ATTR_VDN_BOOT_VOLTAGE>( l_vdnBootVoltage );

l_proc->setAttr<ATTR_VCS_BOOT_VOLTAGE>( l_vcsBootVoltage );

TRACDCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
"Setting VDD/VDN/VCS boot voltage for proc huid = 0x%x"
" VDD = %d, VDN = %d, VCS = %d",
get_huid(l_proc),
l_vddBootVoltage,
l_vdnBootVoltage,
l_vcsBootVoltage );

// Don't set the boot voltage ATTR -- instead the
// setup_evid will calculate from each chips #V and factor
// in loadline/distloss/etc

// call p9_setup_evid for each processor
fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>l_fapiProc(l_proc);
Expand Down

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