Fix for HW397129-set bit 52 in the ALTD_OPTION reg to keep MC fastpat…

…h enabled Change-Id: Ifd5be240823ea2ba4fdb6950404b429e33363bd8 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/36466 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/36469 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
open-power · Apr 7, 2017 · a0db58f · a0db58f
1 parent 3cb22e6
commit a0db58f
Show file tree

Hide file tree

Showing 3 changed files with 28 additions and 2 deletions.
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_adu_coherent_utils.C b/src/import/chips/p9/procedures/hwp/nest/p9_adu_coherent_utils.C
@@ -58,6 +58,7 @@ extern "C"
     const uint32_t FBC_ALTD_PRE_QUIESCE_COUNT_NUM_OF_BITS = 20;
 
     const uint32_t FBC_ALTD_WITH_POST_INIT = 51;
+    const uint32_t FBC_ALTD_HW397129 = 52;
     const uint32_t FBC_ALTD_POST_INIT_COUNT_START_BIT = 54;    // Bits 54:63
     const uint32_t FBC_ALTD_POST_INIT_COUNT_NUM_OF_BITS = 10;
 
@@ -293,6 +294,9 @@ extern "C"
                                              FBC_ALTD_POST_INIT_COUNT_NUM_OF_BITS>
                                              (INIT_SWITCH_WAIT_COUNT);
 
+        //If DD2 setup workaround for HW397129 to re-enable fastpath for DD2
+        altd_option_reg_data.setBit<FBC_ALTD_HW397129>();
+
         // Write to ADU option reg
         FAPI_DBG("OPTION reg value 0x%016llX", altd_option_reg_data);
         FAPI_TRY(fapi2::putScom(i_target, PU_ALTD_OPTION_REG, altd_option_reg_data),

diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_build_smp_adu.C b/src/import/chips/p9/procedures/hwp/nest/p9_build_smp_adu.C
@@ -437,8 +437,12 @@ fapi2::ReturnCode p9_build_smp_sequence_adu(p9_build_smp_system& i_smp,
                     goto adu_reset_unlock;
                 }
 
-                // workaround for HW397129
-                if (i_action == SWITCH_AB)
+                // workaround for HW397129 to re-enable fastpath for DD1
+                uint8_t l_hw397129_workaround;
+                FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_EC_FEATURE_HW397129, *(p_iter->second.target), l_hw397129_workaround),
+                         "Error getting the ATTR_CHIP_EC_FEATURE_HW397129");
+
+                if ((i_action == SWITCH_AB) && l_hw397129_workaround)
                 {
                     p9_ADU_oper_flag l_adu_oper_flag_reinit;
                     l_adu_oper_flag_reinit.setOperationType(p9_ADU_oper_flag::PB_INIT_OPER);

diff --git a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml
@@ -2375,6 +2375,24 @@
     </chipEcFeature>
   </attribute>
 
+  <attribute>
+    <id>ATTR_CHIP_EC_FEATURE_HW397129</id>>
+    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+    <description>
+      Attribute for if we need a workaround for re-enabling the MC fastpath since on
+      Nimbus DD1 is gets disabled.
+    </description>
+    <chipEcFeature>
+      <chip>
+        <name>ENUM_ATTR_NAME_NIMBUS</name>
+        <ec>
+          <value>0x20</value>
+          <test>LESS_THAN</test>
+        </ec>
+      </chip>
+    </chipEcFeature>
+  </attribute>
+
   <!-- ******************************************************************** -->
   <!-- Memory Section                                                       -->
   <!-- ******************************************************************** -->