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CORE/CACHE: core/cache/l2_stopclocks Level 2
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Change-Id: I004fc2c9fee7201487f6ae53c9abf976c1c47d1b
Original-Change-Id: Ie4bce2bcaf0ffb2d1e57370312c4536356b62efc
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/27338
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Reviewed-by: SRINIVAS V. POLISETTY <srinivan@in.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/36115
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
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davidduyue authored and crgeddes committed Feb 10, 2017
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<!-- IBM_PROLOG_BEGIN_TAG -->
<!-- This is an automatically generated prolog. -->
<!-- -->
<!-- $Source: src/import/chips/p9/procedures/xml/error_info/p9_hcd_cache_stopclocks_errors.xml $ -->
<!-- -->
<!-- OpenPOWER HostBoot Project -->
<!-- -->
<!-- Contributors Listed Below - COPYRIGHT 2015,2017 -->
<!-- [+] International Business Machines Corp. -->
<!-- -->
<!-- -->
<!-- Licensed under the Apache License, Version 2.0 (the "License"); -->
<!-- you may not use this file except in compliance with the License. -->
<!-- You may obtain a copy of the License at -->
<!-- -->
<!-- http://www.apache.org/licenses/LICENSE-2.0 -->
<!-- -->
<!-- Unless required by applicable law or agreed to in writing, software -->
<!-- distributed under the License is distributed on an "AS IS" BASIS, -->
<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or -->
<!-- implied. See the License for the specific language governing -->
<!-- permissions and limitations under the License. -->
<!-- -->
<!-- IBM_PROLOG_END_TAG -->
<!-- Error definitions for p9_hcd_cache_startclocks procedures -->
<hwpErrors>
<!-- ********************************************************************* -->
<hwpError>
<rc>RC_PMPROC_CACHECLKSYNCDROP_TIMEOUT</rc>
<description>
L2 EXs clock sync done drop timed out.
</description>
<ffdc>EQPPMQACSR</ffdc>
</hwpError>
<!-- ********************************************************************* -->
<hwpError>
<rc>RC_PMPROC_CACHECLKSTOP_FAILED</rc>
<description>
cache clock stop failed.
</description>
<ffdc>EQ_TARGET</ffdc>
<ffdc>EQCLKSTAT</ffdc>
<callout>
<childTargets>
<parent>PROC_CHIP_IN_ERROR</parent>
<childType>TARGET_TYPE_EQ</childType>
<childNumber>EQ_NUMBER_IN_ERROR</childNumber>
</childTargets>
<priority>HIGH</priority>
</callout>
<deconfigure>
<childTargets>
<parent>PROC_CHIP_IN_ERROR</parent>
<childType>TARGET_TYPE_EQ</childType>
<childNumber>EQ_NUMBER_IN_ERROR</childNumber>
</childTargets>
</deconfigure>
<gard>
<childTargets>
<parent>PROC_CHIP_IN_ERROR</parent>
<childType>TARGET_TYPE_EQ</childType>
<childNumber>EQ_NUMBER_IN_ERROR</childNumber>
</childTargets>
</gard>
</hwpError>
<!-- ********************************************************************* -->
<hwpError>
<rc>RC_PMPROC_CACHECLKSTOP_TIMEOUT</rc>
<description>
cache clock stop timed out.
</description>
<ffdc>EQ_TARGET</ffdc>
<ffdc>EQCPLTSTAT</ffdc>
<callout>
<childTargets>
<parent>PROC_CHIP_IN_ERROR</parent>
<childType>TARGET_TYPE_EQ</childType>
<childNumber>EQ_NUMBER_IN_ERROR</childNumber>
</childTargets>
<priority>HIGH</priority>
</callout>
<deconfigure>
<childTargets>
<parent>PROC_CHIP_IN_ERROR</parent>
<childType>TARGET_TYPE_EQ</childType>
<childNumber>EQ_NUMBER_IN_ERROR</childNumber>
</childTargets>
</deconfigure>
<gard>
<childTargets>
<parent>PROC_CHIP_IN_ERROR</parent>
<childType>TARGET_TYPE_EQ</childType>
<childNumber>EQ_NUMBER_IN_ERROR</childNumber>
</childTargets>
</gard>
</hwpError>
<!-- ********************************************************************* -->
</hwpErrors>

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