Disabling temp_refresh_mode

Change-Id: I159152a545947116232b627054fc522bbedc588f
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/35266
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Brian R. Silver <bsilver@us.ibm.com>
Reviewed-by: Louis Stermole <stermole@us.ibm.com>
Reviewed-by: Matt K. Light <mklight@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/35275
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>

src/import/chips/p9/procedures/hwp/memory/lib/dimm/ddr4/mrs04.C

@@ -57,7 +57,7 @@ namespace ddr4
 mrs04_data::mrs04_data( const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target, fapi2::ReturnCode& o_rc ):
     iv_max_pd_mode(fapi2::ENUM_ATTR_EFF_MAX_POWERDOWN_MODE_DISABLE),
     iv_temp_refresh_range(fapi2::ENUM_ATTR_MSS_MRW_TEMP_REFRESH_RANGE_NORMAL),
-    iv_temp_ref_mode(fapi2::ENUM_ATTR_EFF_TEMP_REFRESH_MODE_DISABLE),
+    iv_temp_ref_mode(fapi2::ENUM_ATTR_MSS_MRW_TEMP_REFRESH_MODE_DISABLE),
     iv_vref_mon(fapi2::ENUM_ATTR_EFF_INTERNAL_VREF_MONITOR_DISABLE),
     iv_cs_cmd_latency(fapi2::ENUM_ATTR_EFF_CS_CMD_LATENCY_DISABLE),
     iv_ref_abort(fapi2::ENUM_ATTR_EFF_SELF_REF_ABORT_DISABLE),
@@ -68,7 +68,7 @@ mrs04_data::mrs04_data( const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target,
 {
     FAPI_TRY( mss::eff_max_powerdown_mode(i_target, iv_max_pd_mode) );
     FAPI_TRY( mss::mrw_temp_refresh_range(iv_temp_refresh_range) );
-    FAPI_TRY( mss::eff_temp_refresh_mode(i_target, iv_temp_ref_mode) );
+    FAPI_TRY( mss::mrw_temp_refresh_mode(iv_temp_ref_mode) );
     FAPI_TRY( mss::eff_internal_vref_monitor(i_target, iv_vref_mon) );
     FAPI_TRY( mss::eff_cs_cmd_latency(i_target, iv_cs_cmd_latency) );
     FAPI_TRY( mss::eff_self_ref_abort(i_target, iv_ref_abort) );
@@ -84,6 +84,7 @@ mrs04_data::mrs04_data( const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target,
              iv_cs_cmd_latency, iv_ref_abort,
              iv_rd_pre_train_mode, iv_rd_preamble, iv_wr_preamble, iv_ppr);
 
+    //Let's make sure the temp_refresh_mode attribute is valid, even though it's mrw, gotta double check spec
     o_rc = fapi2::FAPI2_RC_SUCCESS;
     return;
 

src/import/chips/p9/procedures/hwp/memory/lib/dimm/eff_dimm.C

@@ -457,31 +457,6 @@ fapi_try_exit:
     return fapi2::current_err;
 }
 
-///
-/// @brief Determines & sets effective config for temperature controlled refresh mode
-/// @return fapi2::FAPI2_RC_SUCCESS if okay
-/// @note from DDR4 Spec (79-4B) 4.9.4 page 48
-///
-fapi2::ReturnCode eff_dimm::temp_refresh_mode()
-{
-    uint8_t l_mcs_attrs [mss::PORTS_PER_MCS] = {};
-
-    FAPI_TRY(mss::eff_temp_refresh_mode (iv_mcs, &l_mcs_attrs[0]));
-
-    // If fine refresh mode is normal, enable temperature control refresh mode
-    // Otherwise disable the temperature control refresh
-    l_mcs_attrs[iv_port_index] = (iv_refresh_mode == fapi2::ENUM_ATTR_MSS_MRW_FINE_REFRESH_MODE_NORMAL) ?
-                                 fapi2::ENUM_ATTR_EFF_TEMP_REFRESH_MODE_ENABLE :
-                                 fapi2::ENUM_ATTR_EFF_TEMP_REFRESH_MODE_DISABLE;
-    FAPI_INF("%s: temperature control refresh mode is %d", mss::c_str(iv_dimm), l_mcs_attrs[iv_port_index]);
-    FAPI_TRY( FAPI_ATTR_SET( fapi2::ATTR_EFF_TEMP_REFRESH_MODE, iv_mcs, l_mcs_attrs ) );
-
-fapi_try_exit:
-    return fapi2::current_err;
-};
-
-
-
 ///
 /// @brief Determines & sets effective config for refresh interval time (tREFI)
 /// @return fapi2::FAPI2_RC_SUCCESS if okay

src/import/chips/p9/procedures/hwp/memory/lib/dimm/eff_dimm.H

@@ -151,12 +151,6 @@ class eff_dimm
         ///
         fapi2::ReturnCode hybrid_memory_type();
 
-        ///
-        /// @brief Determines & sets effective config for temperature controlled refresh mode
-        /// @return fapi2::FAPI2_RC_SUCCESS if okay
-        ///
-        fapi2::ReturnCode temp_refresh_mode();
-
         ///
         /// @brief Determines & sets effective config for refresh interval time (tREFI)
         /// @return fapi2::FAPI2_RC_SUCCESS if okay

src/import/chips/p9/procedures/hwp/memory/lib/mss_attribute_accessors.H

@@ -7740,88 +7740,6 @@ fapi_try_exit:
     return fapi2::current_err;
 }
 
-///
-/// @brief ATTR_EFF_TEMP_REFRESH_MODE getter
-/// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_MCA>
-/// @param[out] ref to the value uint8_t
-/// @note Generated by gen_accessors.pl generateParameters (D)
-/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK
-/// @note  Temp controlled ref mode. This is for DDR4 MRS4. Computed in mss_eff_cnfg. Each
-/// memory channel will have a value. creator: mss_eff_cnfg consumer: various
-/// firmware notes:
-/// none
-///
-inline fapi2::ReturnCode eff_temp_refresh_mode(const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target, uint8_t& o_value)
-{
-    uint8_t l_value[2];
-
-    FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_TEMP_REFRESH_MODE, i_target.getParent<fapi2::TARGET_TYPE_MCS>(), l_value) );
-    o_value = l_value[mss::index(i_target)];
-    return fapi2::current_err;
-
-fapi_try_exit:
-    FAPI_ERR("failed accessing ATTR_EFF_TEMP_REFRESH_MODE: 0x%lx (target: %s)",
-             uint64_t(fapi2::current_err), mss::c_str(i_target));
-    return fapi2::current_err;
-}
-
-///
-/// @brief ATTR_EFF_TEMP_REFRESH_MODE getter
-/// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_DIMM>
-/// @param[out] ref to the value uint8_t
-/// @note Generated by gen_accessors.pl generateParameters (D.1)
-/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK
-/// @note  Temp controlled ref mode. This is for DDR4 MRS4. Computed in mss_eff_cnfg. Each
-/// memory channel will have a value. creator: mss_eff_cnfg consumer: various
-/// firmware notes:
-/// none
-///
-inline fapi2::ReturnCode eff_temp_refresh_mode(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target, uint8_t& o_value)
-{
-    uint8_t l_value[2];
-    auto l_mca = i_target.getParent<fapi2::TARGET_TYPE_MCA>();
-
-    FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_TEMP_REFRESH_MODE, l_mca.getParent<fapi2::TARGET_TYPE_MCS>(), l_value) );
-    o_value = l_value[mss::index(l_mca)];
-    return fapi2::current_err;
-
-fapi_try_exit:
-    FAPI_ERR("failed accessing ATTR_EFF_TEMP_REFRESH_MODE: 0x%lx (target: %s)",
-             uint64_t(fapi2::current_err), mss::c_str(i_target));
-    return fapi2::current_err;
-}
-
-///
-/// @brief ATTR_EFF_TEMP_REFRESH_MODE getter
-/// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_MCS>
-/// @param[out] uint8_t* memory to store the value
-/// @note Generated by gen_accessors.pl generateParameters (E)
-/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK
-/// @note  Temp controlled ref mode. This is for DDR4 MRS4. Computed in mss_eff_cnfg. Each
-/// memory channel will have a value. creator: mss_eff_cnfg consumer: various
-/// firmware notes:
-/// none
-///
-inline fapi2::ReturnCode eff_temp_refresh_mode(const fapi2::Target<fapi2::TARGET_TYPE_MCS>& i_target, uint8_t* o_array)
-{
-    if (o_array == nullptr)
-    {
-        FAPI_ERR("nullptr passed to attribute accessor %s", __func__);
-        return fapi2::FAPI2_RC_INVALID_PARAMETER;
-    }
-
-    uint8_t l_value[2];
-
-    FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_TEMP_REFRESH_MODE, i_target, l_value) );
-    memcpy(o_array, &l_value, 2);
-    return fapi2::current_err;
-
-fapi_try_exit:
-    FAPI_ERR("failed accessing ATTR_EFF_TEMP_REFRESH_MODE: 0x%lx (target: %s)",
-             uint64_t(fapi2::current_err), mss::c_str(i_target));
-    return fapi2::current_err;
-}
-
 ///
 /// @brief ATTR_EFF_INTERNAL_VREF_MONITOR getter
 /// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_MCA>
@@ -20286,6 +20204,26 @@ fapi_try_exit:
     return fapi2::current_err;
 }
 
+///
+/// @brief ATTR_MSS_MRW_TEMP_REFRESH_MODE getter
+/// @param[out] uint8_t& reference to store the value
+/// @note Generated by gen_accessors.pl generateParameters (SYSTEM)
+/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK
+/// @note  Used in MR4 A3 Temperature refresh mode Should be defaulted to
+/// disable
+///
+inline fapi2::ReturnCode mrw_temp_refresh_mode(uint8_t& o_value)
+{
+
+    FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_MRW_TEMP_REFRESH_MODE, fapi2::Target<fapi2::TARGET_TYPE_SYSTEM>(), o_value) );
+    return fapi2::current_err;
+
+fapi_try_exit:
+    FAPI_ERR("failed accessing ATTR_MSS_MRW_TEMP_REFRESH_MODE: 0x%lx (system target)",
+             uint64_t(fapi2::current_err));
+    return fapi2::current_err;
+}
+
 
 ///
 /// @brief ATTR_MSS_VPD_MR_0_VERSION_LAYOUT getter

src/import/chips/p9/procedures/hwp/memory/lib/utils/checker.C

@@ -0,0 +1,76 @@
+/* IBM_PROLOG_BEGIN_TAG                                                   */
+/* This is an automatically generated prolog.                             */
+/*                                                                        */
+/* $Source: src/import/chips/p9/procedures/hwp/memory/lib/utils/checker.C $ */
+/*                                                                        */
+/* OpenPOWER HostBoot Project                                             */
+/*                                                                        */
+/* Contributors Listed Below - COPYRIGHT 2017                             */
+/* [+] International Business Machines Corp.                              */
+/*                                                                        */
+/*                                                                        */
+/* Licensed under the Apache License, Version 2.0 (the "License");        */
+/* you may not use this file except in compliance with the License.       */
+/* You may obtain a copy of the License at                                */
+/*                                                                        */
+/*     http://www.apache.org/licenses/LICENSE-2.0                         */
+/*                                                                        */
+/* Unless required by applicable law or agreed to in writing, software    */
+/* distributed under the License is distributed on an "AS IS" BASIS,      */
+/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
+/* implied. See the License for the specific language governing           */
+/* permissions and limitations under the License.                         */
+/*                                                                        */
+/* IBM_PROLOG_END_TAG                                                     */
+
+///
+/// @file checker.C
+/// @brief Contains common functions that perform checks
+///
+// *HWP HWP Owner: Andre Marin <aamarin@us.ibm.com>
+// *HWP FW Owner: Brian Silver <bsilver@us.ibm.com>
+// *HWP Team: Memory
+// *HWP Level: 2
+// *HWP Consumed by: FSP:HB
+
+#include <fapi2.H>
+#include <lib/mss_attribute_accessors.H>
+
+namespace mss
+{
+namespace check
+{
+
+///
+/// @brief Checks to make sure ATTR_MSS_MRW_TEMP_REFRESH_MODE and ATTR_MSS_MRW_FINE_REFRESH_MODE are set correctly
+/// @return fapi2::FAPI2_RC_SUCCESS if okay
+/// @note from DDR4 DRAM Spec (79-4B) 4.9.4 page 48
+///
+fapi2::ReturnCode temp_refresh_mode()
+{
+    uint8_t l_temp_refresh = 0;
+    uint8_t l_refresh_mode = 0;
+
+    FAPI_TRY( mrw_fine_refresh_mode (l_refresh_mode));
+    FAPI_TRY( mrw_temp_refresh_mode (l_temp_refresh));
+
+    // If the temperature refresh mode is enabled, only the normal mode (Fixed 1x mode; MRS4 A8:A7:A6= 000) is allowed for the fine refresh mode
+    // Per JEDEC DDR4 DRAM spec from 07-2016 page 48 section 4.9.4
+    if ( l_temp_refresh == fapi2::ENUM_ATTR_MSS_MRW_TEMP_REFRESH_MODE_ENABLE)
+    {
+        FAPI_ASSERT( (l_refresh_mode == fapi2::ENUM_ATTR_MSS_MRW_FINE_REFRESH_MODE_NORMAL),
+                     fapi2::MSS_INVALID_FINE_REFRESH_MODE_WITH_TEMP_REFRESH_MODE_ENABLED()
+                     .set_FINE_REF_MODE(l_refresh_mode)
+                     .set_TEMP_REF_MODE(l_temp_refresh),
+                     "Incorrect setting for ATTR_MSS_MRW_FINE_REFRESH_MODE (%d) if ATTR_MSS_MRW_TEMP_REFRESH_MODE is enabled",
+                     l_refresh_mode);
+    }
+
+    return fapi2::FAPI2_RC_SUCCESS;
+
+fapi_try_exit:
+    return fapi2::current_err;
+};
+
+}
+}

src/import/chips/p9/procedures/hwp/memory/lib/utils/checker.H

@@ -164,6 +164,13 @@ fapi_try_exit:
     return fapi2::current_err;
 }
 
+///
+/// @brief Checks to make sure ATTR_MSS_MRW_TEMP_REFRESH_MODE and ATTR_MSS_MRW_FINE_REFRESH_MODE are set correctly
+/// @return fapi2::FAPI2_RC_SUCCESS if okay
+/// @note from DDR4 DRAM Spec (79-4B) 4.9.4 page 48
+///
+fapi2::ReturnCode temp_refresh_mode();
+
 namespace spd
 {
 

src/import/chips/p9/procedures/hwp/memory/p9_mss_eff_config.C

@@ -101,7 +101,6 @@ fapi2::ReturnCode p9_mss_eff_config( const fapi2::Target<fapi2::TARGET_TYPE_MCS>
         FAPI_TRY( l_eff_dimm->primary_stack_type() );
         FAPI_TRY( l_eff_dimm->dimm_size() );
         FAPI_TRY( l_eff_dimm->hybrid_memory_type() );
-        FAPI_TRY( l_eff_dimm->temp_refresh_mode() );
         FAPI_TRY( l_eff_dimm->dram_trefi() );
         FAPI_TRY( l_eff_dimm->dram_trfc() );
         FAPI_TRY( l_eff_dimm->dram_trfc_dlr() );
@@ -205,6 +204,9 @@ fapi2::ReturnCode p9_mss_eff_config( const fapi2::Target<fapi2::TARGET_TYPE_MCS>
         FAPI_TRY( l_eff_dimm->dram_rtt_nom () );
         FAPI_TRY( l_eff_dimm->dram_rtt_wr  () );
         FAPI_TRY( l_eff_dimm->dram_rtt_park() );
+
+        //Let's do some checking
+        FAPI_TRY( mss::check::temp_refresh_mode());
     }// dimm
 
     // TODO RTC:160060 Clean up hard coded values at bottom of eff_config

src/import/chips/p9/procedures/xml/attribute_info/memory_mcs_attributes.xml

@@ -1596,25 +1596,6 @@
         <mssAccessorName>eff_max_powerdown_mode</mssAccessorName>
     </attribute>
 
-    <attribute>
-        <id>ATTR_EFF_TEMP_REFRESH_MODE</id>
-        <targetType>TARGET_TYPE_MCS</targetType>
-        <description>
-            Temp controlled ref mode. This is for DDR4 MRS4.
-            Computed in mss_eff_cnfg.
-            Each memory channel will have a value.
-            creator: mss_eff_cnfg
-            consumer: various
-            firmware notes: none
-        </description>
-        <initToZero></initToZero>
-        <valueType>uint8</valueType>
-        <enum>DISABLE = 0, ENABLE = 1</enum>
-        <writeable/>
-        <array>2</array>
-        <mssAccessorName>eff_temp_refresh_mode</mssAccessorName>
-    </attribute>
-
     <attribute>
         <id>ATTR_EFF_INTERNAL_VREF_MONITOR</id>
         <targetType>TARGET_TYPE_MCS</targetType>

src/import/chips/p9/procedures/xml/attribute_info/memory_mrw_attributes.xml

@@ -609,4 +609,18 @@
     <mssAccessorName>mrw_dram_write_crc</mssAccessorName>
   </attribute>
 
+  <attribute>
+    <id>ATTR_MSS_MRW_TEMP_REFRESH_MODE</id>
+    <targetType>TARGET_TYPE_SYSTEM</targetType>
+    <description>
+        Used in MR4 A3
+        Temperature refresh mode
+        Should be defaulted to disable
+    </description>
+    <valueType>uint8</valueType>
+    <platInit/>
+    <enum> DISABLE = 0, ENABLE = 1 </enum>
+    <default> 0  </default>
+    <mssAccessorName>mrw_temp_refresh_mode</mssAccessorName>
+  </attribute>
 </attributes>

src/import/chips/p9/procedures/xml/error_info/p9_memory_mss_eff_config.xml

@@ -59,13 +59,16 @@
       from platform.
     </description>
     <ffdc>FINE_REF_MODE</ffdc>
-    <callout>
-      <target>DIMM_TARGET</target>
-      <priority>HIGH</priority>
-    </callout>
-    <deconfigure>
-      <target>DIMM_TARGET</target>
-    </deconfigure>
+  </hwpError>
+
+  <hwpError>
+    <rc>RC_MSS_INVALID_FINE_REFRESH_MODE_WITH_TEMP_REFRESH_MODE_ENABLED</rc>
+    <description>
+        Invalid fine refresh mode recieved due to temperature fresh mode being enabled
+        If ATTR_MSS_MRW_TEMP_REFRESH_MODE is enabled, only NORMAL mode is allowed for FINE_REFRESH_MODE
+    </description>
+    <ffdc>FINE_REF_MODE</ffdc>
+    <ffdc>TEMP_REF_MODE</ffdc>
   </hwpError>
 
   <hwpError>

src/import/hwpf/fapi2/xml/attribute_info/hb_temp_defaults.xml

@@ -251,6 +251,10 @@
           <id>ATTR_MSS_MRW_DRAM_WRITE_CRC</id>
           <default>0x0</default>
       </attribute>
+       <attribute>
+          <id>ATTR_MSS_MRW_TEMP_REFRESH_MODE</id>
+          <default>0x0</default>
+      </attribute>
 <!-- =====================================================================
      End of temporary definitions
      ================================================================= -->