p9_scominfo update cannot do a mask check with a mask value of 0's.

Change-Id: I1fa87291b00ff5f2e912ddafe8e1bb8559d70233
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/36559
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Dev-Ready: Brent Wieman <bwieman@us.ibm.com>
Reviewed-by: CHRISTINA L. GRAVES <clgraves@us.ibm.com>
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Tested-by: Thi N. Tran <thi@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/36599
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>

src/import/chips/p9/common/scominfo/p9_scominfo.C

@@ -149,7 +149,7 @@ extern "C"
                     break;
 
                 case PU_NV_CHIPUNIT:
-                    if ((i_mode & P9N_DD1_SI_MODE) == P9N_DD1_SI_MODE)
+                    if (i_mode == P9N_DD1_SI_MODE)
                     {
                         l_scom.set_sat_id((l_scom.get_sat_id() % 4) + ((i_chipUnitNum / 2) * 4));
                         l_scom.set_sat_offset( (l_scom.get_sat_offset() % 32) +
@@ -562,7 +562,7 @@ extern "C"
             }
 
             // PU_NV_CHIPUNIT
-            if ((i_mode & P9N_DD1_SI_MODE)  == P9N_DD1_SI_MODE)
+            if (i_mode == P9N_DD1_SI_MODE)
             {
                 // See npu_misc_regs.vhdl, line 2710,
                 // sc_addr(0 to 6) represents sat_id(0..3) and sat_offset(0..2)