Power Management Platform and Frequency Attributes

- Focus on AVSBus and I2C VRM location attributes
- Reference clock attributes
- Initial frequency and voltage biasing attributes that will be used
  by the Pstate Parameter Block code in time.
- Consolodate voltage attributes in on place
- Added PBAX topology attributes per OCC interlock
- Rebase

Change-Id: Iaa8c6ee37982a562babe3e76f7d106a3d95254e0
Original-Change-Id: I3c6817b5240587aaa84d57a78443453ff140aaf7
RTC: 141323
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/21953
Tested-by: Jenkins Server
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42144
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>

src/import/chips/p9/procedures/xml/attribute_info/freq_attributes.xml

@@ -0,0 +1,53 @@
+<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
+<!-- This is an automatically generated prolog.                             -->
+<!--                                                                        -->
+<!-- $Source: src/import/chips/p9/procedures/xml/attribute_info/freq_attributes.xml $ -->
+<!--                                                                        -->
+<!-- OpenPOWER HostBoot Project                                             -->
+<!--                                                                        -->
+<!-- Contributors Listed Below - COPYRIGHT 2015,2017                        -->
+<!-- [+] International Business Machines Corp.                              -->
+<!--                                                                        -->
+<!--                                                                        -->
+<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
+<!-- you may not use this file except in compliance with the License.       -->
+<!-- You may obtain a copy of the License at                                -->
+<!--                                                                        -->
+<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
+<!--                                                                        -->
+<!-- Unless required by applicable law or agreed to in writing, software    -->
+<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
+<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
+<!-- implied. See the License for the specific language governing           -->
+<!-- permissions and limitations under the License.                         -->
+<!--                                                                        -->
+<!-- IBM_PROLOG_END_TAG                                                     -->
+<!-- freq_attributes.xml -->
+<attributes>
+  <!-- ********************************************************************* -->
+  <attribute>
+    <id>ATTR_FREQ_PROC_REFCLOCK_KHZ</id>
+    <targetType>TARGET_TYPE_SYSTEM</targetType>
+    <description>
+      The frequency of the processor refclock in kHz.
+      Provided by the Machine Readable Workbook.
+      This can be overridden to adjust the refclock frequency.
+    </description>
+    <valueType>uint32</valueType>
+    <platInit/>
+  </attribute>
+  <!-- ********************************************************************* -->
+  <attribute>
+    <id>ATTR_FREQ_MEM_REFCLOCK</id>
+    <targetType>TARGET_TYPE_SYSTEM</targetType>
+    <description>
+      The frequency of the memory refclock in MHz.
+      Provided by the Machine Readable Workbook.
+      This is read by the set_ref_clock HWP to find out the desired frequency.
+      This can be overridden to adjust the refclock frequency.
+    </description>
+    <valueType>uint32</valueType>
+    <platInit/>
+  </attribute>
+  <!-- ********************************************************************* -->
+</attributes>