Increase UART delay based on some lab issues

Merging in a patch that we've been carrying for a couple years
now.

Change-Id: Ia9b2ccbcdf63b8d52423e6ddcb250a033c7efaeb
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/38117
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Matthew A. Ploetz <maploetz@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>

src/usr/console/uart.C

@@ -5,7 +5,7 @@
 /*                                                                        */
 /* OpenPOWER HostBoot Project                                             */
 /*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2014,2016                        */
+/* Contributors Listed Below - COPYRIGHT 2014,2017                        */
 /* [+] Google Inc.                                                        */
 /* [+] International Business Machines Corp.                              */
 /*                                                                        */
@@ -118,7 +118,7 @@ namespace CONSOLE
             // Wait for transmit FIFO to have space.
             {
                 const uint64_t DELAY_NS = 100;
-                const uint64_t DELAY_LOOPS = 10000;
+                const uint64_t DELAY_LOOPS = 100000000;
 
                 uint8_t data = 0;
                 uint64_t loops = 0;