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FIRDATA: updates to FIRDATA constants
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Change-Id: I4207cf6d9ac85ecbb16f04263ca57a8c61d6d1f5
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41279
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
Reviewed-by: Benjamin J. Weisenbeck <bweisenb@us.ibm.com>
Reviewed-by: Caleb N. Palmer <cnpalmer@us.ibm.com>
Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
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@zane131 @wilbryan
zane131 authored and wilbryan committed Jun 12, 2017
1 parent 64aa591 commit dadf272
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Showing 11 changed files with 186 additions and 115 deletions.
85 changes: 44 additions & 41 deletions src/occ_405/firdata/firData.c
View file
@@ -1,11 +1,11 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
/* $Source: src/occ/firdata/firData.C $ */
/* $Source: src/occ_405/firdata/firData.c $ */
/* */
/* OpenPOWER OnChipController Project */
/* */
/* Contributors Listed Below - COPYRIGHT 2015 */
/* Contributors Listed Below - COPYRIGHT 2015,2017 */
/* [+] International Business Machines Corp. */
/* */
/* */
Expand Down Expand Up @@ -55,7 +55,7 @@ typedef struct
PNOR_Data_t * pData; /*/< Pointer to the PNOR header data */
uint32_t pBufSize; /*/< Current size of the PNOR data buffer */

FirData_ListPointers_t hPtrs[MAX_TRGTS]; /*/< Pointers to the register lists */
FirData_ListPointers_t hPtrs[TRGT_MAX]; /*/< Pointers to the register lists */

} FirData_t;

Expand Down Expand Up @@ -204,7 +204,7 @@ bool FirData_addGlblsToPnor( FirData_t * io_fd, PNOR_Trgt_t * io_pTrgt,
bool full = false;

uint8_t t = i_sTrgt.type;
uint8_t cnt = io_fd->hData->counts[t][GLBL];
uint8_t cnt = io_fd->hData->counts[t][REG_GLBL];

uint32_t i = 0;

Expand Down Expand Up @@ -246,7 +246,7 @@ bool FirData_addFirsToPnor( FirData_t * io_fd, PNOR_Trgt_t * io_pTrgt,
bool full = false;

uint8_t t = i_sTrgt.type;
uint8_t cnt = io_fd->hData->counts[t][FIR];
uint8_t cnt = io_fd->hData->counts[t][REG_FIR];

uint32_t i = 0;

Expand Down Expand Up @@ -298,7 +298,7 @@ bool FirData_addRegsToPnor( FirData_t * io_fd, PNOR_Trgt_t * io_pTrgt,
bool full = false;

uint8_t t = i_sTrgt.type;
uint8_t cnt = io_fd->hData->counts[t][REG];
uint8_t cnt = io_fd->hData->counts[t][REG_REG];

uint32_t i = 0;

Expand Down Expand Up @@ -330,7 +330,7 @@ bool FirData_addIdFirsToPnor( FirData_t * io_fd, PNOR_Trgt_t * io_pTrgt,
bool full = false;

uint8_t t = i_sTrgt.type;
uint8_t cnt = io_fd->hData->counts[t][IDFIR];
uint8_t cnt = io_fd->hData->counts[t][REG_IDFIR];

uint32_t i = 0;

Expand Down Expand Up @@ -384,7 +384,7 @@ bool FirData_addIdRegsToPnor( FirData_t * io_fd, PNOR_Trgt_t * io_pTrgt,
bool full = false;

uint8_t t = i_sTrgt.type;
uint8_t cnt = io_fd->hData->counts[t][IDREG];
uint8_t cnt = io_fd->hData->counts[t][REG_IDREG];

uint32_t i = 0;

Expand Down Expand Up @@ -436,9 +436,10 @@ bool FirData_addTrgtToPnor( FirData_t * io_fd, SCOM_Trgt_t i_sTrgt,
/* Update the number of targets in the PNOR data. */
io_fd->pData->trgts++;

/* NOTE: Must add all regular registers (GLBL, FIR, REG) before all */
/* indirect-SCOM registers. Also, must check GLBL registers first */
/* to determine whether it is necessary to do the other registers. */
/* NOTE: Must add all regular registers (REG_GLBL, REG_FIR, REG_REG)
* before all indirect-SCOM registers. Also, must check REG_GLBL
* registers first to determine whether it is necessary to do the
* other registers. */

/* Add the GLBLs. */
full = FirData_addGlblsToPnor( io_fd, pTrgt, i_sTrgt, o_noAttn );
Expand Down Expand Up @@ -499,7 +500,7 @@ void FirData_addTrgtsToPnor( FirData_t * io_fd )
fsi = io_fd->hData->procFsiBaseAddr[p];

/* Add this PROC to the PNOR. */
sTrgt = SCOM_Trgt_getTrgt(PROC, p, 0, fsi, isM);
sTrgt = SCOM_Trgt_getTrgt(TRGT_PROC, p, 0, fsi, isM);
full = FirData_addTrgtToPnor( io_fd, sTrgt, &noAttn );
if ( full ) break;
if ( noAttn ) continue; /* Skip the PROC, EXs, and MCSs */
Expand All @@ -510,7 +511,7 @@ void FirData_addTrgtsToPnor( FirData_t * io_fd )
if ( 0 == (io_fd->hData->exMasks[p] & (0x8000 >> u)) ) continue;

/* Add this EX to the PNOR. */
sTrgt = SCOM_Trgt_getTrgt(EX, p, u, fsi, isM);
sTrgt = SCOM_Trgt_getTrgt(TRGT_EX, p, u, fsi, isM);
full = FirData_addTrgtToPnor( io_fd, sTrgt, &noAttn );
if ( full ) break;
if ( noAttn ) continue; /* Skip the EX */
Expand All @@ -523,7 +524,7 @@ void FirData_addTrgtsToPnor( FirData_t * io_fd )
if ( 0 == (io_fd->hData->mcsMasks[p] & (0x80 >> u)) ) continue;

/* Add this MCS to the PNOR. */
sTrgt = SCOM_Trgt_getTrgt(MCS, p, u, fsi, isM);
sTrgt = SCOM_Trgt_getTrgt(TRGT_MCS, p, u, fsi, isM);
full = FirData_addTrgtToPnor( io_fd, sTrgt, &noAttn );
if ( full ) break;
if ( noAttn ) continue; /* Skip the MCS */
Expand All @@ -533,38 +534,38 @@ void FirData_addTrgtsToPnor( FirData_t * io_fd )
if ( full ) break;

/* Iterate all MEMBs. Must do this separate of from the PROCs because */
/* it is possible a MEMB could be reporting an attention but the */
/* it is possible a MEMBUF could be reporting an attention but the */
/* connected PROC is not. */
for ( i = 0; i < MAX_MEMB_PER_NODE; i++ )
for ( i = 0; i < MAX_MEMBUF_PER_NODE; i++ )
{
p = i / MAX_MEMB_PER_PROC;
u = i % MAX_MEMB_PER_PROC;
p = i / MAX_MEMBUF_PER_PROC;
u = i % MAX_MEMBUF_PER_PROC;

/* Check if the MEMB is configured. */
/* Check if the MEMBUF is configured. */
if ( 0 == (io_fd->hData->membMasks[p] & (0x80 >> u)) ) continue;

/* Get the FSI base address. */
fsi = io_fd->hData->membFsiBaseAddr[p][u];

/* Add this MEMB to the PNOR. */
sTrgt = SCOM_Trgt_getTrgt(MEMB, p, u, fsi, false);
/* Add this MEMBUF to the PNOR. */
sTrgt = SCOM_Trgt_getTrgt(TRGT_MEMBUF, p, u, fsi, false);
full = FirData_addTrgtToPnor( io_fd, sTrgt, &noAttn );
if ( full ) break;
if ( noAttn ) continue; /* Skip the MEMB and MBAs */
if ( noAttn ) continue; /* Skip the MEMBUF and MBAs */

for ( j = 0; j < MAX_MBA_PER_MEMB; j++ )
for ( j = 0; j < MAX_MBA_PER_MEMBUF; j++ )
{
mu = u * MAX_MBA_PER_MEMB + j;
mu = u * MAX_MBA_PER_MEMBUF + j;

/* Check if the MBA is configured. */
if ( 0 == (io_fd->hData->mbaMasks[p] & (0x8000 >> mu)) )
continue;

/* Add this MBA to the PNOR. */
sTrgt = SCOM_Trgt_getTrgt(MBA, p, mu, fsi, false);
sTrgt = SCOM_Trgt_getTrgt(TRGT_MBA, p, mu, fsi, false);
full = FirData_addTrgtToPnor( io_fd, sTrgt, &noAttn );
if ( full ) break;
if ( noAttn ) continue; /* Skip the MEMB */
if ( noAttn ) continue; /* Skip the MEMBUF */
}
if ( full ) break;
}
Expand Down Expand Up @@ -607,10 +608,10 @@ int32_t FirData_init( FirData_t * io_fd,

bool full = false;

uint32_t x[MAX_TRGTS][MAX_REGS];
uint32_t x[TRGT_MAX][REG_MAX];
size_t curIdx = 0;

uint32_t t = FIRST_TRGT;
uint32_t t = TRGT_FIRST;

uint8_t * reglist = NULL;

Expand Down Expand Up @@ -665,14 +666,14 @@ int32_t FirData_init( FirData_t * io_fd,

/* Get the register list byte indexes in HOMER data buffer */
memset( x, 0x00, sizeof(x) );
for ( t = FIRST_TRGT; t < MAX_TRGTS; t++ )
for ( t = TRGT_FIRST; t < TRGT_MAX; t++ )
{
x[t][GLBL] = curIdx;
x[t][FIR] = x[t][GLBL] + sz_u32 * io_fd->hData->counts[t][GLBL];
x[t][REG] = x[t][FIR] + sz_u32 * io_fd->hData->counts[t][FIR];
x[t][IDFIR] = x[t][REG] + sz_u32 * io_fd->hData->counts[t][REG];
x[t][IDREG] = x[t][IDFIR] + sz_u64 * io_fd->hData->counts[t][IDFIR];
curIdx = x[t][IDREG] + sz_u64 * io_fd->hData->counts[t][IDREG];
x[t][REG_GLBL] = curIdx;
x[t][REG_FIR] = x[t][REG_GLBL] + sz_u32 * io_fd->hData->counts[t][REG_GLBL];
x[t][REG_REG] = x[t][REG_FIR] + sz_u32 * io_fd->hData->counts[t][REG_FIR];
x[t][REG_IDFIR] = x[t][REG_REG] + sz_u32 * io_fd->hData->counts[t][REG_REG];
x[t][REG_IDREG] = x[t][REG_IDFIR] + sz_u64 * io_fd->hData->counts[t][REG_IDFIR];
curIdx = x[t][REG_IDREG] + sz_u64 * io_fd->hData->counts[t][REG_IDREG];
}

/* Check to make sure the list data is not larger than the available */
Expand All @@ -687,13 +688,13 @@ int32_t FirData_init( FirData_t * io_fd,

/* Now, get the pointers for each list. */
reglist = io_fd->hBuf + sz_hData;
for ( t = FIRST_TRGT; t < MAX_TRGTS; t++ )
for ( t = TRGT_FIRST; t < TRGT_MAX; t++ )
{
(io_fd->hPtrs[t]).glbl = (uint32_t *)(reglist + x[t][GLBL] );
(io_fd->hPtrs[t]).fir = (uint32_t *)(reglist + x[t][FIR] );
(io_fd->hPtrs[t]).reg = (uint32_t *)(reglist + x[t][REG] );
(io_fd->hPtrs[t]).idFir = (uint64_t *)(reglist + x[t][IDFIR]);
(io_fd->hPtrs[t]).idReg = (uint64_t *)(reglist + x[t][IDREG]);
(io_fd->hPtrs[t]).glbl = (uint32_t *)(reglist + x[t][REG_GLBL] );
(io_fd->hPtrs[t]).fir = (uint32_t *)(reglist + x[t][REG_FIR] );
(io_fd->hPtrs[t]).reg = (uint32_t *)(reglist + x[t][REG_REG] );
(io_fd->hPtrs[t]).idFir = (uint64_t *)(reglist + x[t][REG_IDFIR]);
(io_fd->hPtrs[t]).idReg = (uint64_t *)(reglist + x[t][REG_IDREG]);
}

} while (0);
Expand Down Expand Up @@ -737,12 +738,14 @@ int32_t FirData_captureCsFirData( uint8_t * i_hBuf, uint32_t i_hBufSize,
FirData_addTrgtsToPnor( &fd );

/* Write the buffer to PNOR. */
/* TODO: 175241
rc = PNOR_writeFirData( fd.hData->pnorInfo, fd.pBuf, fd.pBufSize );
if ( SUCCESS != rc )
{
TRAC_ERR( FUNC"Failed to process FIR data" );
break;
}
*/

} while (0);

Expand Down
92 changes: 69 additions & 23 deletions src/occ_405/firdata/firDataConst_common.h
View file
@@ -1,11 +1,11 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
/* $Source: src/occ/firdata/occ_const.H $ */
/* $Source: src/occ_405/firdata/firDataConst_common.h $ */
/* */
/* OpenPOWER OnChipController Project */
/* */
/* Contributors Listed Below - COPYRIGHT 2015 */
/* Contributors Listed Below - COPYRIGHT 2015,2017 */
/* [+] International Business Machines Corp. */
/* */
/* */
Expand Down Expand Up @@ -36,40 +36,85 @@
typedef enum
{
/* NOTE: These will be used as array indexes. */
FIRST_TRGT = 0,
PROC = FIRST_TRGT,
EX,
MCS,
MEMB,
MBA,
MAX_TRGTS,

TRGT_FIRST = 0,

/** Common Nimbus/Cumulus types */
TRGT_PROC = TRGT_FIRST,
TRGT_CAPP,
TRGT_XBUS,
TRGT_OBUS,
TRGT_PEC,
TRGT_PHB,
TRGT_EQ,
TRGT_EX,
TRGT_EC,

/* Nimbus only */
TRGT_MCBIST,
TRGT_MCS,
TRGT_MCA,

/* Cumulus only */
/* NOTE: Nimbus and Cumulus cannot be used at the same time. So we can have
* These array indexes overlap to save space. */
TRGT_MC = TRGT_MCBIST,
TRGT_MI,
TRGT_DMI,

/* Centaur only */
TRGT_MEMBUF,
TRGT_MBA,

TRGT_MAX,

} TrgtType_t;

/** Boundary/position ranges for each target type. */
typedef enum
{
MAX_PROC_PER_NODE = 8,
MAX_EX_PER_PROC = 16,
MAX_MCS_PER_PROC = 8,
MAX_MEMB_PER_PROC = MAX_MCS_PER_PROC,
MAX_MEMB_PER_NODE = MAX_MEMB_PER_PROC * MAX_PROC_PER_NODE,
MAX_MBA_PER_MEMB = 2,
MAX_MBA_PER_PROC = MAX_MEMB_PER_PROC * MAX_MBA_PER_MEMB,
/* Common Nimbus/Cumulus */
MAX_PROC_PER_NODE = 8,
MAX_CAPP_PER_PROC = 2,
MAX_XBUS_PER_PROC = 3, /* Nimbus 1 and 2, Cumulus 0, 1, and 2 */
MAX_OBUS_PER_PROC = 4, /* Nimbus 0 and 3, Cumulus 0, 1, 2, and 3 */
MAX_PEC_PER_PROC = 3,
MAX_PHB_PER_PROC = 6,
MAX_EQ_PER_PROC = 6,
MAX_EX_PER_PROC = 12,
MAX_EC_PER_PROC = 24,

/** Nimbus only */
MAX_MCBIST_PER_PROC = 2,
MAX_MCS_PER_PROC = 4,
MAX_MCA_PER_PROC = 8,

/** Cumulus only */
MAX_MC_PER_PROC = 2,
MAX_MI_PER_PROC = 4,
MAX_DMI_PER_PROC = 8,

/** Centaur only */
MAX_MEMBUF_PER_PROC = 8,
MAX_MEMBUF_PER_NODE = MAX_MEMBUF_PER_PROC * MAX_PROC_PER_NODE,
MAX_MBA_PER_MEMBUF = 2,
MAX_MBA_PER_PROC = MAX_MEMBUF_PER_PROC * MAX_MBA_PER_MEMBUF,

} TrgtPos_t;

/** All register types. */
typedef enum
{
/* NOTE: These will be used as array indexes. */
FIRST_REG = 0,
GLBL = FIRST_REG,
FIR,
REG,
IDFIR,
IDREG,
MAX_REGS,
REG_FIRST = 0,

REG_GLBL = REG_FIRST, /* 32-bit addresses, 64-bit value */
REG_FIR, /* 32-bit addresses, 64-bit value */
REG_REG, /* 32-bit addresses, 64-bit value */
REG_IDFIR, /* 64-bit addresses, 32-bit value */
REG_IDREG, /* 64-bit addresses, 32-bit value */

REG_MAX,

} RegType_t;

Expand All @@ -82,3 +127,4 @@ typedef enum
} IplState_t;

#endif /* __firDataConst_common_h */

8 changes: 4 additions & 4 deletions src/occ_405/firdata/homerData_common.h
View file
@@ -1,11 +1,11 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
/* $Source: src/occ/firdata/homerData.H $ */
/* $Source: src/occ_405/firdata/homerData_common.h $ */
/* */
/* OpenPOWER OnChipController Project */
/* */
/* Contributors Listed Below - COPYRIGHT 2015 */
/* Contributors Listed Below - COPYRIGHT 2015,2017 */
/* [+] International Business Machines Corp. */
/* */
/* */
Expand Down Expand Up @@ -129,13 +129,13 @@ typedef struct __attribute__((packed))
uint16_t mbaMasks[MAX_PROC_PER_NODE];

/** Contains number of registers per type for each target type. */
uint8_t counts[MAX_TRGTS][MAX_REGS];
uint8_t counts[TRGT_MAX][REG_MAX];

/** FSI base address for each PROC chip. */
uint32_t procFsiBaseAddr[MAX_PROC_PER_NODE];

/** FSI base address for each MEMB chip. */
uint32_t membFsiBaseAddr[MAX_PROC_PER_NODE][MAX_MEMB_PER_PROC];
uint32_t membFsiBaseAddr[MAX_PROC_PER_NODE][MAX_MEMBUF_PER_PROC];

/** Information regarding the PNOR location and size. */
HOMER_PnorInfo_t pnorInfo;
Expand Down

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