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slw: Fix parsing of supported STOP states
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Bits[0-15] are used to indicate the supported STOP states in
"ibm,enabled-stop-levels" DT property and STOP0 is starting from
Bit0. This patch fixes the parsing to read the appropriate bits.

Fixes: c3ea33f ("hw/slw: only enable supported STOP states")
Signed-off-by: Shilpasri G Bhat <shilpa.bhat@linux.vnet.ibm.com>
Reviewed-by: Oliver O'Halloran <oohall@gmail.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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shilpasri authored and stewartsmith committed Feb 7, 2017
1 parent 2bec353 commit 0500d50
Showing 1 changed file with 4 additions and 2 deletions.
6 changes: 4 additions & 2 deletions hw/slw.c
Expand Up @@ -763,8 +763,10 @@ void add_cpu_idle_state_properties(void)

/* We can only use the stop levels that HB has made available */
if (has_stop_inst) {
u32 level = 1ul << states[i].pm_ctrl_reg_val;
if (!(stop_levels & level))
u32 level = 31 - (states[i].pm_ctrl_reg_val &
OPAL_PM_PSSCR_RL_MASK);

if (!(stop_levels & (1ul << level)))
continue;
}

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