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The microstrip devices models #94 will be most likely implemented in form of Verilog-A modules. These modules should be compiled with OpenVAF and attached to Ngspice. It's need to provide a way to attach Verilog-A model to system devices. I propose the following approach:
Put a set of VA models in share/qucs-s/va_library directory in the installation root.
The two ways to integrate these models are possible:
Add a button named like Compile system libraries in the application setting dialog near the OpenVAF configuration input field. Compiled OSDI modules will be placed to the $HOME/.qucs/osdi_modules location and attached automatically while forming .spiceinit config. Modules should be build once.
Scan schematic recursively and compile OSDI modules automatically before the simulation if some device referencing Verilog-A model is found.
The combination of these two approaches is also possible. This feature should be added in order to implement #94 in the next release.
The text was updated successfully, but these errors were encountered:
The development of the OpenVAF compiler seems to be suspended. See pascalkuthe/OpenVAF#111 (comment) for more details. By this reason I am removing this issue from the development plan for the next release. Let's wait for more news about OpenVAF future, because the support of Verilog-A in Qucs-S+Ngspice is strongly depends on OpenVAF.
The microstrip devices models #94 will be most likely implemented in form of Verilog-A modules. These modules should be compiled with OpenVAF and attached to Ngspice. It's need to provide a way to attach Verilog-A model to system devices. I propose the following approach:
share/qucs-s/va_library
directory in the installation root.The two ways to integrate these models are possible:
Add a button named like Compile system libraries in the application setting dialog near the OpenVAF configuration input field. Compiled OSDI modules will be placed to the
$HOME/.qucs/osdi_modules
location and attached automatically while forming.spiceinit
config. Modules should be build once.Scan schematic recursively and compile OSDI modules automatically before the simulation if some device referencing Verilog-A model is found.
The combination of these two approaches is also possible. This feature should be added in order to implement #94 in the next release.
The text was updated successfully, but these errors were encountered: