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Constructing TIM DMA Peripherals #679

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@BryceBeagle

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@BryceBeagle

Hi I'm trying to implement a memory-to-peripheral DMA transfer, and I'm stuck instantiating the peripheral for the Transfer object

    let mut transfer = Transfer::init_memory_to_peripheral(
        StreamsTuple::new(dp.DMA2).6,
        CCR::<TIM1, 0>(dp.TIM1),
        buffer,
        None,
        DmaConfig::default()
            .memory_increment(true)
            .fifo_enable(true)
            .fifo_error_interrupt(true)
            .transfer_complete_interrupt(true),
    );

Unfortunately, the CCR tuple struct holds T as a private field:

stm32f4xx-hal/src/timer.rs

Lines 246 to 248 in 47404df

/// Wrapper type that indicates which register of the contained timer to use for DMA.
pub struct CCR<T, const C: u8>(T);
pub type CCR1<T> = CCR<T, 0>;

error[E0423]: cannot initialize a tuple struct which contains private fields
   --> src/main.rs:63:9
    |
63  |         CCR::<TIM1, 0>(dp.TIM1),
    |         ^^^^^^^^^^^^^^
    |

This looks like the same problem as #227, where the solution was to make T public, which was done in #237.
be04db0#diff-83bb17ad20b71ad74e5fa57169f61d11aa6d64a5a06cee94537a70a3afebbc4bR288

However, in #481, T was made private again when CCR was moved from dma/trait.rs (https://github.com/stm32-rs/stm32f4xx-hal/pull/481/files#diff-83bb17ad20b71ad74e5fa57169f61d11aa6d64a5a06cee94537a70a3afebbc4bL271-L272) to timer.rs (https://github.com/stm32-rs/stm32f4xx-hal/pull/481/files#diff-abbd7706dff206239bd03de70e864a2893146421b4877638f17149848491fcd0R218-R220).

Was this an intentional change? I'm not seeing any other way to create an instance of CCRX structs

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