Open
Description
CoreClocks
provides the resulting frequencies of the clocking configuration. But often that's not sufficient to understand or debug it.
Being able to see the actual divider and clock mux choices would help a lot when trying to match a desired clock configuration with the one the HAL chooses. That can e.g. be addressed with adding a bunch of debug!()
prints. Currently the PLL and RCC setup routines are silent and partially black boxes.
@SingularitySurfer