SyReC Synthesizer - A Tool for HDL-based Synthesis of Reversible Circuits
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Updated
May 3, 2024 - C++
SyReC Synthesizer - A Tool for HDL-based Synthesis of Reversible Circuits
theseus, functional programming language with fully reversible computation
A Causal-Consistent Reversible Debugger for Erlang
A Causal-Consistent Debugger for (Core) Erlang
Java implementation of distributed reversible computation verification
A tool for the transformation of an irreversible Term Rewriting System into a reversible one
Reversible programming language
Collaborative work on reversible computing
Develop here a programming language of reversible combinators
Virtual machine implementation of a low-level reversible stack machine optimised for performance.
Describe Grammars such that they can be round-tripped between Parsing and Printing
This study shows the design and construction of reversible full adder and reversible 3bit comparator
A 'lispy' grammar for a Programming Language
An implementation of the reversible semantics for Erlang.
A set of classes and libraries to Simulate Valleytronic Logic Gates and Computation
Fun but unusable perpetually-WIP reversible programming language written in Java.
An implementation of a reversible programming language
Reversible cellular automata
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