Create minitests for 7-series DSP

[mkurc-ant]

There are fuzzers 100-dsp-mskpat and 101-dsp-pips that target Xilinx 7-series DSP tiles. They should already provide solution for all routing and most of DSP configuration bits. There is an open question whether this is sufficient for adding support for DSPs in f4pga toolchain even in plain multiplication mode.

This issue is about creating a number of simple "minitests". A minitest is a simple design that focuses on using a particular primitive in a meaningful way. Its purpose is to obtain a valid binary bitstream from Vendor tools so that it can be disassembled using open source tools. The goal is to verify if all bits / features that are enabled in the bitstream are properly documented by project X-ray. In another words: "are there any unknown bits".

Initially minitests for DSP should use it as pure multiplier. Once they are complete, subsequent ones may eg. use DSP input / output internal registers. All of them should allow to answer the question: "do we know enough bits to support DSP in F4PGA".

There are existing minitests for other FPGA resources already present under the minitest folder. Those can be used as a reference.

[KKtiandao]

I wanna add minitests about dsp. Is there any suggestions or branches ?