AltairZ80: Question about setting the Switch Register (SR)

[Ster0pes]

This is not a normal issue, it's only a questions I've been wanting to ask for quite some time now, and I'm not sure where to do that.

In the AltairZ80 documentation I see the recommendation to set the SR register to 8 when loading, for example, 4k BASIC.
However, in the original BASIC documentation, in the section that explains how to load and initialize BASIC, they're talking about setting switches A8 through A15.
Setting the SR register to 8 would be like setting front panel switch A3 to 1, wouldn't it?
If that's true, how can 8 be a suitable value for SR when loading BASIC?

[deltecent]

The Altair data bus is 8 bits. Switches A8 through A15 are used as the sense switches and are placed on the data bus as D0 through D7. The status of the A8 through A15 switches are read by performing an IN 0FFH instruction. A0 through A7 are ignored. Setting the SR register to 8 simulates setting switch A11 on and all the other sense switches off which causes 08H to appear on the data bus during an IN 0FFH instruction.

The Altair does not have Programmed Output LEDs like the IMSAI but is simulated by a "SET CPU PO". With PO enabled, an OUT 0FFH instruction will display the contents of the A register on the console.

[Ster0pes]

Thanks for your reply. There are still 2 things I don't understand however:

• If the SR is used to set switches A8-A15, then why is it a 16 bit register?
• Looking in the BASIC '77 manual, the section explaining which switches to set for which configuration only mentions switches A8-A10 and A12-A14. Isn't that strange?

[deltecent]

SR is an 8-bit register. If you run "HELP CPU", you will see that it is an 8-bit register:

SR 8 Front panel switches pseudo register

The Intel 8080 has a 16-bit address bus and an 8-bit data bus. Switches A0-A15 are tied to the address bus. Switches A0-A7 are also tied to the data bus for memory deposits. A8-A15 are also tied to the data bus during an IN 0FFH instruction.

[Ster0pes]

Hello deltecent,
On AltairZ80 version 3.9.0 the command 'HELP CPU' is not recognized. I'm more than willing to take your word for it that SR is an 8 bit register. Would certainly make sense.
However, confusingly enough, the AltairZ80 documentation I found on the SIMH Github page claims it is a 16 bit register.

[deltecent]

I will check with @psco on the register value. It may be 16 bits for other CPUs supported by the simulator. For the Altair 8800 with an 8080 or Z80 CPU, it is definitely 8 bits and is set with switches A8-A15.

[deltecent]

The documentation has been corrected for Open SIMH. It now shows SR as being an 8-bit value.