Synthesis of Digital Systems course at IIT Delhi | Assignments | Project
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Updated
May 11, 2024 - Python
Synthesis of Digital Systems course at IIT Delhi | Assignments | Project
Just a Simple simulation of some of the circuits in Digital Systems 2 The current version [v.3.0] is the latest version i have developed.
Uma reprodução simplificada do jogo clássico de arcade asteroids, para sintetização em placa FPGA.
CSC302: Digital Logic Design and Analysis [DLDA] & CSL301: Digital System Lab [DS Lab] <Semester III>
Proyectos de Sistemas Digitales y Microprocesadores.
IoT based pigeon detector and repellent build with ESP32 and for Digital Systems' final project, at UNMSM, Lima, Perú.
A collection of useful material and personal projects from the Computer and Informatics Engineering Bachelor's degree program at the University of Aveiro.
Repositório com os projetos elaborados durante a disciplina de Sistemas Digitais I (PCS3115)
Image Processing Toolbox in Verilog using Basys3 FPGA
Lab dan TM Pengantar Sistem Digital (PSD) 2022/2023 Gasal
Digital Systems 2 Course [ECE 778] - CA4 - Spring 2023 - University of Tehran - Dr. Safari
Digital Systems 2 Course [ECE 778] - CA2 - Spring 2023 - University of Tehran - Dr. Safari
Coffee vending machine implementation designed for FPGAs (DE2-115 kit)
My activity in digital systems
This repository contains my assignments and projects for the Digital Systems course. The course covers the fundamental concepts of digital systems, including Boolean algebra, logic gates, combinational and sequential circuits, memory, and programmable logic devices. I have included VHDL code and simulation results for some of the projects.
VHDL Design for seven segment Displays number from 1-100
Low-cost industrial fruit classifier. uses state-of-the-art artificial vision technology to accurately and efficiently sort and grade fruits. The system is capable of identifying and distinguishing between different types and sizes of fruits
👾 My studies with Verilog and notions of digital systems.
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