An OpenCL-based FPGA Accelerator for Convolutional Neural Networks
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Updated
Feb 14, 2022 - C
An OpenCL-based FPGA Accelerator for Convolutional Neural Networks
QKeras: a quantization deep learning library for Tensorflow Keras
Open Source Specialized Computing Stack for Accelerating Deep Neural Networks.
Implementation of a Tensor Processing Unit for embedded systems and the IoT.
Squeezenet V1.1 on Cyclone V SoC-FPGA at 450ms/image, 20x faster than ARM A9 processor alone. A project for 2017 Innovate FPGA design contest.
Research and Materials on Hardware implementation of Transformer Model
Convolutional accelerator kernel, target ASIC & FPGA
Small-scale Tensor Processing Unit built on an FPGA
The codes and artifacts associated with our MICRO'22 paper titled: "Adaptable Butterfly Accelerator for Attention-based NNs via Hardware and Algorithm Co-design"
OPAE porting to Xilinx FPGA devices.
This project implements a convolution kernel based on vivado HLS on zcu104
OpenCL HLS based CNN Accelerator on Intel DE10 Nano FPGA.
BARVINN: A Barrel RISC-V Neural Network Accelerator: https://barvinn.readthedocs.io/en/latest/
Lenet for MNIST handwritten digit recognition using Vivado hls tool
Synthesizeable VHDL and Verilog implementation of 64-point FFT/IFFT Processor with Q4.12 Fixed Point Data Format.
Co-processor for whole genome alignment
OpenGL 1.x implementation for FPGAs
Network Packet classification on FPGA
Basic OpenGL 1.x implementation for small FPGAs (like iCE40UP5K)
Visual System Integrator - Accelerate your embedded development
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