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[clang][llc][AArch64] Instruction selection failure when targeting aarch64 architecture with 16bit vector types #135776
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@llvm/issue-subscribers-backend-aarch64 Author: Justin Kim (JustinKim98)
While I was trying to cross-compile following llvm IR bit cast using llc with following command in debug mode towards aarch64 architecture.
llc example.ll --mtriple=aarch64-linux-gnu -o example.s (LLVM IR I'm trying to compile) ; example.ll
target triple = "aarch64-unknown-linux-gnu"
define i32 @<!-- -->bitcast_failure(ptr %0, <1 x i16> %1) {
%3 = bitcast <1 x i16> %1 to <1 x half>
%4 = extractelement <1 x half> %3, i64 0
store half %4, ptr %0, align 2
ret i32 0
} I'm encountering some kind of weird error. Is this a bug in LLVM? It seems like there's a problem when trying to scalarize 16 bit data types.
Is this a bug in LLVM? or am I doing something wrong? Here's the error log
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I see the problem and I'm working on a fix. |
This should fix it
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Use getTypeAction instead of trying to guess how a type will be legalized. On AArch64, v1f16 is scalarized but v1f16 is widened. Fixes llvm#135776
…r. (llvm#135838) Use getTypeAction instead of trying to guess how a type will be legalized. On AArch64, v1f16 is scalarized but v1f16 is widened. Fixes llvm#135776
While I was trying to cross-compile following llvm IR bit cast using llc with following command in debug mode towards aarch64 architecture.
(LLVM IR I'm trying to compile)
https://godbolt.org/z/Ejzcj6GY9
I'm encountering some kind of weird error. Is this a bug in LLVM? It seems like there's a problem when trying to scalarize 16 bit data types.
I'm using the newest llvm version that I just cloned from main branch.
Is this a bug in LLVM? or am I doing something wrong?
Here's the error log
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