forked from torvalds/linux
/
phylink.c
3027 lines (2601 loc) · 84.8 KB
/
phylink.c
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775
776
777
778
779
780
781
782
783
784
785
786
787
788
789
790
791
792
793
794
795
796
797
798
799
800
801
802
803
804
805
806
807
808
809
810
811
812
813
814
815
816
817
818
819
820
821
822
823
824
825
826
827
828
829
830
831
832
833
834
835
836
837
838
839
840
841
842
843
844
845
846
847
848
849
850
851
852
853
854
855
856
857
858
859
860
861
862
863
864
865
866
867
868
869
870
871
872
873
874
875
876
877
878
879
880
881
882
883
884
885
886
887
888
889
890
891
892
893
894
895
896
897
898
899
900
901
902
903
904
905
906
907
908
909
910
911
912
913
914
915
916
917
918
919
920
921
922
923
924
925
926
927
928
929
930
931
932
933
934
935
936
937
938
939
940
941
942
943
944
945
946
947
948
949
950
951
952
953
954
955
956
957
958
959
960
961
962
963
964
965
966
967
968
969
970
971
972
973
974
975
976
977
978
979
980
981
982
983
984
985
986
987
988
989
990
991
992
993
994
995
996
997
998
999
1000
// SPDX-License-Identifier: GPL-2.0
/*
* phylink models the MAC to optional PHY connection, supporting
* technologies such as SFP cages where the PHY is hot-pluggable.
*
* Copyright (C) 2015 Russell King
*/
#include <linux/acpi.h>
#include <linux/ethtool.h>
#include <linux/export.h>
#include <linux/gpio/consumer.h>
#include <linux/netdevice.h>
#include <linux/of.h>
#include <linux/of_mdio.h>
#include <linux/phy.h>
#include <linux/phy_fixed.h>
#include <linux/phylink.h>
#include <linux/rtnetlink.h>
#include <linux/spinlock.h>
#include <linux/timer.h>
#include <linux/workqueue.h>
#include "sfp.h"
#include "swphy.h"
#define SUPPORTED_INTERFACES \
(SUPPORTED_TP | SUPPORTED_MII | SUPPORTED_FIBRE | \
SUPPORTED_BNC | SUPPORTED_AUI | SUPPORTED_Backplane)
#define ADVERTISED_INTERFACES \
(ADVERTISED_TP | ADVERTISED_MII | ADVERTISED_FIBRE | \
ADVERTISED_BNC | ADVERTISED_AUI | ADVERTISED_Backplane)
enum {
PHYLINK_DISABLE_STOPPED,
PHYLINK_DISABLE_LINK,
PHYLINK_DISABLE_MAC_WOL,
};
/**
* struct phylink - internal data type for phylink
*/
struct phylink {
/* private: */
struct net_device *netdev;
const struct phylink_mac_ops *mac_ops;
const struct phylink_pcs_ops *pcs_ops;
struct phylink_config *config;
struct phylink_pcs *pcs;
struct device *dev;
unsigned int old_link_state:1;
unsigned long phylink_disable_state; /* bitmask of disables */
struct phy_device *phydev;
phy_interface_t link_interface; /* PHY_INTERFACE_xxx */
u8 cfg_link_an_mode; /* MLO_AN_xxx */
u8 cur_link_an_mode;
u8 link_port; /* The current non-phy ethtool port */
__ETHTOOL_DECLARE_LINK_MODE_MASK(supported);
/* The link configuration settings */
struct phylink_link_state link_config;
/* The current settings */
phy_interface_t cur_interface;
struct gpio_desc *link_gpio;
unsigned int link_irq;
struct timer_list link_poll;
void (*get_fixed_state)(struct net_device *dev,
struct phylink_link_state *s);
struct mutex state_mutex;
struct phylink_link_state phy_state;
struct work_struct resolve;
bool mac_link_dropped;
struct sfp_bus *sfp_bus;
bool sfp_may_have_phy;
__ETHTOOL_DECLARE_LINK_MODE_MASK(sfp_support);
u8 sfp_port;
};
#define phylink_printk(level, pl, fmt, ...) \
do { \
if ((pl)->config->type == PHYLINK_NETDEV) \
netdev_printk(level, (pl)->netdev, fmt, ##__VA_ARGS__); \
else if ((pl)->config->type == PHYLINK_DEV) \
dev_printk(level, (pl)->dev, fmt, ##__VA_ARGS__); \
} while (0)
#define phylink_err(pl, fmt, ...) \
phylink_printk(KERN_ERR, pl, fmt, ##__VA_ARGS__)
#define phylink_warn(pl, fmt, ...) \
phylink_printk(KERN_WARNING, pl, fmt, ##__VA_ARGS__)
#define phylink_info(pl, fmt, ...) \
phylink_printk(KERN_INFO, pl, fmt, ##__VA_ARGS__)
#if defined(CONFIG_DYNAMIC_DEBUG)
#define phylink_dbg(pl, fmt, ...) \
do { \
if ((pl)->config->type == PHYLINK_NETDEV) \
netdev_dbg((pl)->netdev, fmt, ##__VA_ARGS__); \
else if ((pl)->config->type == PHYLINK_DEV) \
dev_dbg((pl)->dev, fmt, ##__VA_ARGS__); \
} while (0)
#elif defined(DEBUG)
#define phylink_dbg(pl, fmt, ...) \
phylink_printk(KERN_DEBUG, pl, fmt, ##__VA_ARGS__)
#else
#define phylink_dbg(pl, fmt, ...) \
({ \
if (0) \
phylink_printk(KERN_DEBUG, pl, fmt, ##__VA_ARGS__); \
})
#endif
/**
* phylink_set_port_modes() - set the port type modes in the ethtool mask
* @mask: ethtool link mode mask
*
* Sets all the port type modes in the ethtool mask. MAC drivers should
* use this in their 'validate' callback.
*/
void phylink_set_port_modes(unsigned long *mask)
{
phylink_set(mask, TP);
phylink_set(mask, AUI);
phylink_set(mask, MII);
phylink_set(mask, FIBRE);
phylink_set(mask, BNC);
phylink_set(mask, Backplane);
}
EXPORT_SYMBOL_GPL(phylink_set_port_modes);
void phylink_set_10g_modes(unsigned long *mask)
{
phylink_set(mask, 10000baseT_Full);
phylink_set(mask, 10000baseCR_Full);
phylink_set(mask, 10000baseSR_Full);
phylink_set(mask, 10000baseLR_Full);
phylink_set(mask, 10000baseLRM_Full);
phylink_set(mask, 10000baseER_Full);
}
EXPORT_SYMBOL_GPL(phylink_set_10g_modes);
static int phylink_is_empty_linkmode(const unsigned long *linkmode)
{
__ETHTOOL_DECLARE_LINK_MODE_MASK(tmp) = { 0, };
phylink_set_port_modes(tmp);
phylink_set(tmp, Autoneg);
phylink_set(tmp, Pause);
phylink_set(tmp, Asym_Pause);
return linkmode_subset(linkmode, tmp);
}
static const char *phylink_an_mode_str(unsigned int mode)
{
static const char *modestr[] = {
[MLO_AN_PHY] = "phy",
[MLO_AN_FIXED] = "fixed",
[MLO_AN_INBAND] = "inband",
};
return mode < ARRAY_SIZE(modestr) ? modestr[mode] : "unknown";
}
static void phylink_caps_to_linkmodes(unsigned long *linkmodes,
unsigned long caps)
{
if (caps & MAC_SYM_PAUSE)
__set_bit(ETHTOOL_LINK_MODE_Pause_BIT, linkmodes);
if (caps & MAC_ASYM_PAUSE)
__set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, linkmodes);
if (caps & MAC_10HD)
__set_bit(ETHTOOL_LINK_MODE_10baseT_Half_BIT, linkmodes);
if (caps & MAC_10FD)
__set_bit(ETHTOOL_LINK_MODE_10baseT_Full_BIT, linkmodes);
if (caps & MAC_100HD) {
__set_bit(ETHTOOL_LINK_MODE_100baseT_Half_BIT, linkmodes);
__set_bit(ETHTOOL_LINK_MODE_100baseFX_Half_BIT, linkmodes);
}
if (caps & MAC_100FD) {
__set_bit(ETHTOOL_LINK_MODE_100baseT_Full_BIT, linkmodes);
__set_bit(ETHTOOL_LINK_MODE_100baseT1_Full_BIT, linkmodes);
__set_bit(ETHTOOL_LINK_MODE_100baseFX_Full_BIT, linkmodes);
}
if (caps & MAC_1000HD)
__set_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, linkmodes);
if (caps & MAC_1000FD) {
__set_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, linkmodes);
__set_bit(ETHTOOL_LINK_MODE_1000baseX_Full_BIT, linkmodes);
__set_bit(ETHTOOL_LINK_MODE_1000baseT1_Full_BIT, linkmodes);
}
if (caps & MAC_2500FD) {
__set_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, linkmodes);
__set_bit(ETHTOOL_LINK_MODE_2500baseX_Full_BIT, linkmodes);
}
if (caps & MAC_5000FD)
__set_bit(ETHTOOL_LINK_MODE_5000baseT_Full_BIT, linkmodes);
if (caps & MAC_10000FD) {
__set_bit(ETHTOOL_LINK_MODE_10000baseT_Full_BIT, linkmodes);
__set_bit(ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT, linkmodes);
__set_bit(ETHTOOL_LINK_MODE_10000baseKR_Full_BIT, linkmodes);
__set_bit(ETHTOOL_LINK_MODE_10000baseR_FEC_BIT, linkmodes);
__set_bit(ETHTOOL_LINK_MODE_10000baseCR_Full_BIT, linkmodes);
__set_bit(ETHTOOL_LINK_MODE_10000baseSR_Full_BIT, linkmodes);
__set_bit(ETHTOOL_LINK_MODE_10000baseLR_Full_BIT, linkmodes);
__set_bit(ETHTOOL_LINK_MODE_10000baseLRM_Full_BIT, linkmodes);
__set_bit(ETHTOOL_LINK_MODE_10000baseER_Full_BIT, linkmodes);
}
if (caps & MAC_25000FD) {
__set_bit(ETHTOOL_LINK_MODE_25000baseCR_Full_BIT, linkmodes);
__set_bit(ETHTOOL_LINK_MODE_25000baseKR_Full_BIT, linkmodes);
__set_bit(ETHTOOL_LINK_MODE_25000baseSR_Full_BIT, linkmodes);
}
if (caps & MAC_40000FD) {
__set_bit(ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT, linkmodes);
__set_bit(ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT, linkmodes);
__set_bit(ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT, linkmodes);
__set_bit(ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT, linkmodes);
}
if (caps & MAC_50000FD) {
__set_bit(ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT, linkmodes);
__set_bit(ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT, linkmodes);
__set_bit(ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT, linkmodes);
__set_bit(ETHTOOL_LINK_MODE_50000baseKR_Full_BIT, linkmodes);
__set_bit(ETHTOOL_LINK_MODE_50000baseSR_Full_BIT, linkmodes);
__set_bit(ETHTOOL_LINK_MODE_50000baseCR_Full_BIT, linkmodes);
__set_bit(ETHTOOL_LINK_MODE_50000baseLR_ER_FR_Full_BIT,
linkmodes);
__set_bit(ETHTOOL_LINK_MODE_50000baseDR_Full_BIT, linkmodes);
}
if (caps & MAC_56000FD) {
__set_bit(ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT, linkmodes);
__set_bit(ETHTOOL_LINK_MODE_56000baseCR4_Full_BIT, linkmodes);
__set_bit(ETHTOOL_LINK_MODE_56000baseSR4_Full_BIT, linkmodes);
__set_bit(ETHTOOL_LINK_MODE_56000baseLR4_Full_BIT, linkmodes);
}
if (caps & MAC_100000FD) {
__set_bit(ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT, linkmodes);
__set_bit(ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT, linkmodes);
__set_bit(ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT, linkmodes);
__set_bit(ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT,
linkmodes);
__set_bit(ETHTOOL_LINK_MODE_100000baseKR2_Full_BIT, linkmodes);
__set_bit(ETHTOOL_LINK_MODE_100000baseSR2_Full_BIT, linkmodes);
__set_bit(ETHTOOL_LINK_MODE_100000baseCR2_Full_BIT, linkmodes);
__set_bit(ETHTOOL_LINK_MODE_100000baseLR2_ER2_FR2_Full_BIT,
linkmodes);
__set_bit(ETHTOOL_LINK_MODE_100000baseDR2_Full_BIT, linkmodes);
__set_bit(ETHTOOL_LINK_MODE_100000baseKR_Full_BIT, linkmodes);
__set_bit(ETHTOOL_LINK_MODE_100000baseSR_Full_BIT, linkmodes);
__set_bit(ETHTOOL_LINK_MODE_100000baseLR_ER_FR_Full_BIT,
linkmodes);
__set_bit(ETHTOOL_LINK_MODE_100000baseCR_Full_BIT, linkmodes);
__set_bit(ETHTOOL_LINK_MODE_100000baseDR_Full_BIT, linkmodes);
}
if (caps & MAC_200000FD) {
__set_bit(ETHTOOL_LINK_MODE_200000baseKR4_Full_BIT, linkmodes);
__set_bit(ETHTOOL_LINK_MODE_200000baseSR4_Full_BIT, linkmodes);
__set_bit(ETHTOOL_LINK_MODE_200000baseLR4_ER4_FR4_Full_BIT,
linkmodes);
__set_bit(ETHTOOL_LINK_MODE_200000baseDR4_Full_BIT, linkmodes);
__set_bit(ETHTOOL_LINK_MODE_200000baseCR4_Full_BIT, linkmodes);
__set_bit(ETHTOOL_LINK_MODE_200000baseKR2_Full_BIT, linkmodes);
__set_bit(ETHTOOL_LINK_MODE_200000baseSR2_Full_BIT, linkmodes);
__set_bit(ETHTOOL_LINK_MODE_200000baseLR2_ER2_FR2_Full_BIT,
linkmodes);
__set_bit(ETHTOOL_LINK_MODE_200000baseDR2_Full_BIT, linkmodes);
__set_bit(ETHTOOL_LINK_MODE_200000baseCR2_Full_BIT, linkmodes);
}
if (caps & MAC_400000FD) {
__set_bit(ETHTOOL_LINK_MODE_400000baseKR8_Full_BIT, linkmodes);
__set_bit(ETHTOOL_LINK_MODE_400000baseSR8_Full_BIT, linkmodes);
__set_bit(ETHTOOL_LINK_MODE_400000baseLR8_ER8_FR8_Full_BIT,
linkmodes);
__set_bit(ETHTOOL_LINK_MODE_400000baseDR8_Full_BIT, linkmodes);
__set_bit(ETHTOOL_LINK_MODE_400000baseCR8_Full_BIT, linkmodes);
__set_bit(ETHTOOL_LINK_MODE_400000baseKR4_Full_BIT, linkmodes);
__set_bit(ETHTOOL_LINK_MODE_400000baseSR4_Full_BIT, linkmodes);
__set_bit(ETHTOOL_LINK_MODE_400000baseLR4_ER4_FR4_Full_BIT,
linkmodes);
__set_bit(ETHTOOL_LINK_MODE_400000baseDR4_Full_BIT, linkmodes);
__set_bit(ETHTOOL_LINK_MODE_400000baseCR4_Full_BIT, linkmodes);
}
}
/**
* phylink_get_linkmodes() - get acceptable link modes
* @linkmodes: ethtool linkmode mask (must be already initialised)
* @interface: phy interface mode defined by &typedef phy_interface_t
* @mac_capabilities: bitmask of MAC capabilities
*
* Set all possible pause, speed and duplex linkmodes in @linkmodes that
* are supported by the @interface mode and @mac_capabilities. @linkmodes
* must have been initialised previously.
*/
void phylink_get_linkmodes(unsigned long *linkmodes, phy_interface_t interface,
unsigned long mac_capabilities)
{
unsigned long caps = MAC_SYM_PAUSE | MAC_ASYM_PAUSE;
switch (interface) {
case PHY_INTERFACE_MODE_USXGMII:
caps |= MAC_10000FD | MAC_5000FD | MAC_2500FD;
fallthrough;
case PHY_INTERFACE_MODE_RGMII_TXID:
case PHY_INTERFACE_MODE_RGMII_RXID:
case PHY_INTERFACE_MODE_RGMII_ID:
case PHY_INTERFACE_MODE_RGMII:
case PHY_INTERFACE_MODE_QSGMII:
case PHY_INTERFACE_MODE_SGMII:
case PHY_INTERFACE_MODE_GMII:
caps |= MAC_1000HD | MAC_1000FD;
fallthrough;
case PHY_INTERFACE_MODE_REVRMII:
case PHY_INTERFACE_MODE_RMII:
case PHY_INTERFACE_MODE_SMII:
case PHY_INTERFACE_MODE_REVMII:
case PHY_INTERFACE_MODE_MII:
caps |= MAC_10HD | MAC_10FD;
fallthrough;
case PHY_INTERFACE_MODE_100BASEX:
caps |= MAC_100HD | MAC_100FD;
break;
case PHY_INTERFACE_MODE_TBI:
case PHY_INTERFACE_MODE_MOCA:
case PHY_INTERFACE_MODE_RTBI:
case PHY_INTERFACE_MODE_1000BASEX:
caps |= MAC_1000HD;
fallthrough;
case PHY_INTERFACE_MODE_TRGMII:
caps |= MAC_1000FD;
break;
case PHY_INTERFACE_MODE_2500BASEX:
caps |= MAC_2500FD;
break;
case PHY_INTERFACE_MODE_5GBASER:
caps |= MAC_5000FD;
break;
case PHY_INTERFACE_MODE_XGMII:
case PHY_INTERFACE_MODE_RXAUI:
case PHY_INTERFACE_MODE_XAUI:
case PHY_INTERFACE_MODE_10GBASER:
case PHY_INTERFACE_MODE_10GKR:
caps |= MAC_10000FD;
break;
case PHY_INTERFACE_MODE_25GBASER:
caps |= MAC_25000FD;
break;
case PHY_INTERFACE_MODE_XLGMII:
caps |= MAC_40000FD;
break;
case PHY_INTERFACE_MODE_INTERNAL:
caps |= ~0;
break;
case PHY_INTERFACE_MODE_NA:
case PHY_INTERFACE_MODE_MAX:
break;
}
phylink_caps_to_linkmodes(linkmodes, caps & mac_capabilities);
}
EXPORT_SYMBOL_GPL(phylink_get_linkmodes);
/**
* phylink_generic_validate() - generic validate() callback implementation
* @config: a pointer to a &struct phylink_config.
* @supported: ethtool bitmask for supported link modes.
* @state: a pointer to a &struct phylink_link_state.
*
* Generic implementation of the validate() callback that MAC drivers can
* use when they pass the range of supported interfaces and MAC capabilities.
* This makes use of phylink_get_linkmodes().
*/
void phylink_generic_validate(struct phylink_config *config,
unsigned long *supported,
struct phylink_link_state *state)
{
__ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, };
phylink_set_port_modes(mask);
phylink_set(mask, Autoneg);
phylink_get_linkmodes(mask, state->interface, config->mac_capabilities);
linkmode_and(supported, supported, mask);
linkmode_and(state->advertising, state->advertising, mask);
}
EXPORT_SYMBOL_GPL(phylink_generic_validate);
static int phylink_validate_any(struct phylink *pl, unsigned long *supported,
struct phylink_link_state *state)
{
__ETHTOOL_DECLARE_LINK_MODE_MASK(all_adv) = { 0, };
__ETHTOOL_DECLARE_LINK_MODE_MASK(all_s) = { 0, };
__ETHTOOL_DECLARE_LINK_MODE_MASK(s);
struct phylink_link_state t;
int intf;
for (intf = 0; intf < PHY_INTERFACE_MODE_MAX; intf++) {
if (test_bit(intf, pl->config->supported_interfaces)) {
linkmode_copy(s, supported);
t = *state;
t.interface = intf;
pl->mac_ops->validate(pl->config, s, &t);
linkmode_or(all_s, all_s, s);
linkmode_or(all_adv, all_adv, t.advertising);
}
}
linkmode_copy(supported, all_s);
linkmode_copy(state->advertising, all_adv);
return phylink_is_empty_linkmode(supported) ? -EINVAL : 0;
}
static int phylink_validate(struct phylink *pl, unsigned long *supported,
struct phylink_link_state *state)
{
if (!phy_interface_empty(pl->config->supported_interfaces)) {
if (state->interface == PHY_INTERFACE_MODE_NA)
return phylink_validate_any(pl, supported, state);
if (!test_bit(state->interface,
pl->config->supported_interfaces))
return -EINVAL;
}
pl->mac_ops->validate(pl->config, supported, state);
return phylink_is_empty_linkmode(supported) ? -EINVAL : 0;
}
static int phylink_parse_fixedlink(struct phylink *pl,
struct fwnode_handle *fwnode)
{
struct fwnode_handle *fixed_node;
const struct phy_setting *s;
struct gpio_desc *desc;
u32 speed;
int ret;
fixed_node = fwnode_get_named_child_node(fwnode, "fixed-link");
if (fixed_node) {
ret = fwnode_property_read_u32(fixed_node, "speed", &speed);
pl->link_config.speed = speed;
pl->link_config.duplex = DUPLEX_HALF;
if (fwnode_property_read_bool(fixed_node, "full-duplex"))
pl->link_config.duplex = DUPLEX_FULL;
/* We treat the "pause" and "asym-pause" terminology as
* defining the link partner's ability.
*/
if (fwnode_property_read_bool(fixed_node, "pause"))
__set_bit(ETHTOOL_LINK_MODE_Pause_BIT,
pl->link_config.lp_advertising);
if (fwnode_property_read_bool(fixed_node, "asym-pause"))
__set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT,
pl->link_config.lp_advertising);
if (ret == 0) {
desc = fwnode_gpiod_get_index(fixed_node, "link", 0,
GPIOD_IN, "?");
if (!IS_ERR(desc))
pl->link_gpio = desc;
else if (desc == ERR_PTR(-EPROBE_DEFER))
ret = -EPROBE_DEFER;
}
fwnode_handle_put(fixed_node);
if (ret)
return ret;
} else {
u32 prop[5];
ret = fwnode_property_read_u32_array(fwnode, "fixed-link",
NULL, 0);
if (ret != ARRAY_SIZE(prop)) {
phylink_err(pl, "broken fixed-link?\n");
return -EINVAL;
}
ret = fwnode_property_read_u32_array(fwnode, "fixed-link",
prop, ARRAY_SIZE(prop));
if (!ret) {
pl->link_config.duplex = prop[1] ?
DUPLEX_FULL : DUPLEX_HALF;
pl->link_config.speed = prop[2];
if (prop[3])
__set_bit(ETHTOOL_LINK_MODE_Pause_BIT,
pl->link_config.lp_advertising);
if (prop[4])
__set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT,
pl->link_config.lp_advertising);
}
}
if (pl->link_config.speed > SPEED_1000 &&
pl->link_config.duplex != DUPLEX_FULL)
phylink_warn(pl, "fixed link specifies half duplex for %dMbps link?\n",
pl->link_config.speed);
bitmap_fill(pl->supported, __ETHTOOL_LINK_MODE_MASK_NBITS);
linkmode_copy(pl->link_config.advertising, pl->supported);
phylink_validate(pl, pl->supported, &pl->link_config);
s = phy_lookup_setting(pl->link_config.speed, pl->link_config.duplex,
pl->supported, true);
linkmode_zero(pl->supported);
phylink_set(pl->supported, MII);
phylink_set(pl->supported, Pause);
phylink_set(pl->supported, Asym_Pause);
phylink_set(pl->supported, Autoneg);
if (s) {
__set_bit(s->bit, pl->supported);
__set_bit(s->bit, pl->link_config.lp_advertising);
} else {
phylink_warn(pl, "fixed link %s duplex %dMbps not recognised\n",
pl->link_config.duplex == DUPLEX_FULL ? "full" : "half",
pl->link_config.speed);
}
linkmode_and(pl->link_config.advertising, pl->link_config.advertising,
pl->supported);
pl->link_config.link = 1;
pl->link_config.an_complete = 1;
return 0;
}
static int phylink_parse_mode(struct phylink *pl, struct fwnode_handle *fwnode)
{
struct fwnode_handle *dn;
const char *managed;
dn = fwnode_get_named_child_node(fwnode, "fixed-link");
if (dn || fwnode_property_present(fwnode, "fixed-link"))
pl->cfg_link_an_mode = MLO_AN_FIXED;
fwnode_handle_put(dn);
if ((fwnode_property_read_string(fwnode, "managed", &managed) == 0 &&
strcmp(managed, "in-band-status") == 0) ||
pl->config->ovr_an_inband) {
if (pl->cfg_link_an_mode == MLO_AN_FIXED) {
phylink_err(pl,
"can't use both fixed-link and in-band-status\n");
return -EINVAL;
}
linkmode_zero(pl->supported);
phylink_set(pl->supported, MII);
phylink_set(pl->supported, Autoneg);
phylink_set(pl->supported, Asym_Pause);
phylink_set(pl->supported, Pause);
pl->link_config.an_enabled = true;
pl->cfg_link_an_mode = MLO_AN_INBAND;
switch (pl->link_config.interface) {
case PHY_INTERFACE_MODE_SGMII:
case PHY_INTERFACE_MODE_QSGMII:
phylink_set(pl->supported, 10baseT_Half);
phylink_set(pl->supported, 10baseT_Full);
phylink_set(pl->supported, 100baseT_Half);
phylink_set(pl->supported, 100baseT_Full);
phylink_set(pl->supported, 1000baseT_Half);
phylink_set(pl->supported, 1000baseT_Full);
break;
case PHY_INTERFACE_MODE_1000BASEX:
phylink_set(pl->supported, 1000baseX_Full);
break;
case PHY_INTERFACE_MODE_2500BASEX:
phylink_set(pl->supported, 2500baseX_Full);
break;
case PHY_INTERFACE_MODE_5GBASER:
phylink_set(pl->supported, 5000baseT_Full);
break;
case PHY_INTERFACE_MODE_25GBASER:
phylink_set(pl->supported, 25000baseCR_Full);
phylink_set(pl->supported, 25000baseKR_Full);
phylink_set(pl->supported, 25000baseSR_Full);
fallthrough;
case PHY_INTERFACE_MODE_USXGMII:
case PHY_INTERFACE_MODE_10GKR:
case PHY_INTERFACE_MODE_10GBASER:
phylink_set(pl->supported, 10baseT_Half);
phylink_set(pl->supported, 10baseT_Full);
phylink_set(pl->supported, 100baseT_Half);
phylink_set(pl->supported, 100baseT_Full);
phylink_set(pl->supported, 1000baseT_Half);
phylink_set(pl->supported, 1000baseT_Full);
phylink_set(pl->supported, 1000baseX_Full);
phylink_set(pl->supported, 1000baseKX_Full);
phylink_set(pl->supported, 2500baseT_Full);
phylink_set(pl->supported, 2500baseX_Full);
phylink_set(pl->supported, 5000baseT_Full);
phylink_set(pl->supported, 10000baseT_Full);
phylink_set(pl->supported, 10000baseKR_Full);
phylink_set(pl->supported, 10000baseKX4_Full);
phylink_set(pl->supported, 10000baseCR_Full);
phylink_set(pl->supported, 10000baseSR_Full);
phylink_set(pl->supported, 10000baseLR_Full);
phylink_set(pl->supported, 10000baseLRM_Full);
phylink_set(pl->supported, 10000baseER_Full);
break;
case PHY_INTERFACE_MODE_XLGMII:
phylink_set(pl->supported, 25000baseCR_Full);
phylink_set(pl->supported, 25000baseKR_Full);
phylink_set(pl->supported, 25000baseSR_Full);
phylink_set(pl->supported, 40000baseKR4_Full);
phylink_set(pl->supported, 40000baseCR4_Full);
phylink_set(pl->supported, 40000baseSR4_Full);
phylink_set(pl->supported, 40000baseLR4_Full);
phylink_set(pl->supported, 50000baseCR2_Full);
phylink_set(pl->supported, 50000baseKR2_Full);
phylink_set(pl->supported, 50000baseSR2_Full);
phylink_set(pl->supported, 50000baseKR_Full);
phylink_set(pl->supported, 50000baseSR_Full);
phylink_set(pl->supported, 50000baseCR_Full);
phylink_set(pl->supported, 50000baseLR_ER_FR_Full);
phylink_set(pl->supported, 50000baseDR_Full);
phylink_set(pl->supported, 100000baseKR4_Full);
phylink_set(pl->supported, 100000baseSR4_Full);
phylink_set(pl->supported, 100000baseCR4_Full);
phylink_set(pl->supported, 100000baseLR4_ER4_Full);
phylink_set(pl->supported, 100000baseKR2_Full);
phylink_set(pl->supported, 100000baseSR2_Full);
phylink_set(pl->supported, 100000baseCR2_Full);
phylink_set(pl->supported, 100000baseLR2_ER2_FR2_Full);
phylink_set(pl->supported, 100000baseDR2_Full);
break;
default:
phylink_err(pl,
"incorrect link mode %s for in-band status\n",
phy_modes(pl->link_config.interface));
return -EINVAL;
}
linkmode_copy(pl->link_config.advertising, pl->supported);
if (phylink_validate(pl, pl->supported, &pl->link_config)) {
phylink_err(pl,
"failed to validate link configuration for in-band status\n");
return -EINVAL;
}
/* Check if MAC/PCS also supports Autoneg. */
pl->link_config.an_enabled = phylink_test(pl->supported, Autoneg);
}
return 0;
}
static void phylink_apply_manual_flow(struct phylink *pl,
struct phylink_link_state *state)
{
/* If autoneg is disabled, pause AN is also disabled */
if (!state->an_enabled)
state->pause &= ~MLO_PAUSE_AN;
/* Manual configuration of pause modes */
if (!(pl->link_config.pause & MLO_PAUSE_AN))
state->pause = pl->link_config.pause;
}
static void phylink_resolve_flow(struct phylink_link_state *state)
{
bool tx_pause, rx_pause;
state->pause = MLO_PAUSE_NONE;
if (state->duplex == DUPLEX_FULL) {
linkmode_resolve_pause(state->advertising,
state->lp_advertising,
&tx_pause, &rx_pause);
if (tx_pause)
state->pause |= MLO_PAUSE_TX;
if (rx_pause)
state->pause |= MLO_PAUSE_RX;
}
}
static void phylink_mac_config(struct phylink *pl,
const struct phylink_link_state *state)
{
phylink_dbg(pl,
"%s: mode=%s/%s/%s/%s adv=%*pb pause=%02x link=%u an=%u\n",
__func__, phylink_an_mode_str(pl->cur_link_an_mode),
phy_modes(state->interface),
phy_speed_to_str(state->speed),
phy_duplex_to_str(state->duplex),
__ETHTOOL_LINK_MODE_MASK_NBITS, state->advertising,
state->pause, state->link, state->an_enabled);
pl->mac_ops->mac_config(pl->config, pl->cur_link_an_mode, state);
}
static void phylink_mac_pcs_an_restart(struct phylink *pl)
{
if (pl->link_config.an_enabled &&
phy_interface_mode_is_8023z(pl->link_config.interface) &&
phylink_autoneg_inband(pl->cur_link_an_mode)) {
if (pl->pcs_ops)
pl->pcs_ops->pcs_an_restart(pl->pcs);
else
pl->mac_ops->mac_an_restart(pl->config);
}
}
static void phylink_major_config(struct phylink *pl, bool restart,
const struct phylink_link_state *state)
{
int err;
phylink_dbg(pl, "major config %s\n", phy_modes(state->interface));
if (pl->mac_ops->mac_prepare) {
err = pl->mac_ops->mac_prepare(pl->config, pl->cur_link_an_mode,
state->interface);
if (err < 0) {
phylink_err(pl, "mac_prepare failed: %pe\n",
ERR_PTR(err));
return;
}
}
phylink_mac_config(pl, state);
if (pl->pcs_ops) {
err = pl->pcs_ops->pcs_config(pl->pcs, pl->cur_link_an_mode,
state->interface,
state->advertising,
!!(pl->link_config.pause &
MLO_PAUSE_AN));
if (err < 0)
phylink_err(pl, "pcs_config failed: %pe\n",
ERR_PTR(err));
if (err > 0)
restart = true;
}
if (restart)
phylink_mac_pcs_an_restart(pl);
if (pl->mac_ops->mac_finish) {
err = pl->mac_ops->mac_finish(pl->config, pl->cur_link_an_mode,
state->interface);
if (err < 0)
phylink_err(pl, "mac_finish failed: %pe\n",
ERR_PTR(err));
}
}
/*
* Reconfigure for a change of inband advertisement.
* If we have a separate PCS, we only need to call its pcs_config() method,
* and then restart AN if it indicates something changed. Otherwise, we do
* the full MAC reconfiguration.
*/
static int phylink_change_inband_advert(struct phylink *pl)
{
int ret;
if (test_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state))
return 0;
if (!pl->pcs_ops) {
/* Legacy method */
phylink_mac_config(pl, &pl->link_config);
phylink_mac_pcs_an_restart(pl);
return 0;
}
phylink_dbg(pl, "%s: mode=%s/%s adv=%*pb pause=%02x\n", __func__,
phylink_an_mode_str(pl->cur_link_an_mode),
phy_modes(pl->link_config.interface),
__ETHTOOL_LINK_MODE_MASK_NBITS, pl->link_config.advertising,
pl->link_config.pause);
/* Modern PCS-based method; update the advert at the PCS, and
* restart negotiation if the pcs_config() helper indicates that
* the programmed advertisement has changed.
*/
ret = pl->pcs_ops->pcs_config(pl->pcs, pl->cur_link_an_mode,
pl->link_config.interface,
pl->link_config.advertising,
!!(pl->link_config.pause & MLO_PAUSE_AN));
if (ret < 0)
return ret;
if (ret > 0)
phylink_mac_pcs_an_restart(pl);
return 0;
}
static void phylink_mac_pcs_get_state(struct phylink *pl,
struct phylink_link_state *state)
{
linkmode_copy(state->advertising, pl->link_config.advertising);
linkmode_zero(state->lp_advertising);
state->interface = pl->link_config.interface;
state->an_enabled = pl->link_config.an_enabled;
if (state->an_enabled) {
state->speed = SPEED_UNKNOWN;
state->duplex = DUPLEX_UNKNOWN;
state->pause = MLO_PAUSE_NONE;
} else {
state->speed = pl->link_config.speed;
state->duplex = pl->link_config.duplex;
state->pause = pl->link_config.pause;
}
state->an_complete = 0;
state->link = 1;
if (pl->pcs_ops)
pl->pcs_ops->pcs_get_state(pl->pcs, state);
else if (pl->mac_ops->mac_pcs_get_state)
pl->mac_ops->mac_pcs_get_state(pl->config, state);
else
state->link = 0;
}
/* The fixed state is... fixed except for the link state,
* which may be determined by a GPIO or a callback.
*/
static void phylink_get_fixed_state(struct phylink *pl,
struct phylink_link_state *state)
{
*state = pl->link_config;
if (pl->config->get_fixed_state)
pl->config->get_fixed_state(pl->config, state);
else if (pl->link_gpio)
state->link = !!gpiod_get_value_cansleep(pl->link_gpio);
phylink_resolve_flow(state);
}
static void phylink_mac_initial_config(struct phylink *pl, bool force_restart)
{
struct phylink_link_state link_state;
switch (pl->cur_link_an_mode) {
case MLO_AN_PHY:
link_state = pl->phy_state;
break;
case MLO_AN_FIXED:
phylink_get_fixed_state(pl, &link_state);
break;
case MLO_AN_INBAND:
link_state = pl->link_config;
if (link_state.interface == PHY_INTERFACE_MODE_SGMII)
link_state.pause = MLO_PAUSE_NONE;
break;
default: /* can't happen */
return;
}
link_state.link = false;
phylink_apply_manual_flow(pl, &link_state);
phylink_major_config(pl, force_restart, &link_state);
}
static const char *phylink_pause_to_str(int pause)
{
switch (pause & MLO_PAUSE_TXRX_MASK) {
case MLO_PAUSE_TX | MLO_PAUSE_RX:
return "rx/tx";
case MLO_PAUSE_TX:
return "tx";
case MLO_PAUSE_RX:
return "rx";
default:
return "off";
}
}
static void phylink_link_up(struct phylink *pl,
struct phylink_link_state link_state)
{
struct net_device *ndev = pl->netdev;
pl->cur_interface = link_state.interface;
if (pl->pcs_ops && pl->pcs_ops->pcs_link_up)
pl->pcs_ops->pcs_link_up(pl->pcs, pl->cur_link_an_mode,
pl->cur_interface,
link_state.speed, link_state.duplex);
pl->mac_ops->mac_link_up(pl->config, pl->phydev,
pl->cur_link_an_mode, pl->cur_interface,
link_state.speed, link_state.duplex,
!!(link_state.pause & MLO_PAUSE_TX),
!!(link_state.pause & MLO_PAUSE_RX));
if (ndev)
netif_carrier_on(ndev);
phylink_info(pl,
"Link is Up - %s/%s - flow control %s\n",
phy_speed_to_str(link_state.speed),
phy_duplex_to_str(link_state.duplex),
phylink_pause_to_str(link_state.pause));
}
static void phylink_link_down(struct phylink *pl)
{
struct net_device *ndev = pl->netdev;
if (ndev)
netif_carrier_off(ndev);
pl->mac_ops->mac_link_down(pl->config, pl->cur_link_an_mode,
pl->cur_interface);
phylink_info(pl, "Link is Down\n");
}
static void phylink_resolve(struct work_struct *w)
{
struct phylink *pl = container_of(w, struct phylink, resolve);
struct phylink_link_state link_state;
struct net_device *ndev = pl->netdev;
bool mac_config = false;
bool cur_link_state;
mutex_lock(&pl->state_mutex);
if (pl->netdev)
cur_link_state = netif_carrier_ok(ndev);
else
cur_link_state = pl->old_link_state;
if (pl->phylink_disable_state) {
pl->mac_link_dropped = false;
link_state.link = false;
} else if (pl->mac_link_dropped) {
link_state.link = false;
} else {
switch (pl->cur_link_an_mode) {
case MLO_AN_PHY:
link_state = pl->phy_state;
phylink_apply_manual_flow(pl, &link_state);
mac_config = link_state.link;
break;
case MLO_AN_FIXED:
phylink_get_fixed_state(pl, &link_state);
mac_config = link_state.link;
break;
case MLO_AN_INBAND:
phylink_mac_pcs_get_state(pl, &link_state);
/* If we have a phy, the "up" state is the union of
* both the PHY and the MAC
*/
if (pl->phydev)
link_state.link &= pl->phy_state.link;
/* Only update if the PHY link is up */