/
asm_mcvm.olv
2865 lines (2785 loc) · 51.9 KB
/
asm_mcvm.olv
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model "Moscovium series macro assembler"
{
macro prog_name="Moscovium series macro assembler";
macro prog_vers="1.42";
// ================================
// Moscovium series macro assembler
// (c) 2021 1YEN Toru
//
//
// 2023/12/16 ver.1.42
// pseudo: equ; tolower label name
//
// 2023/11/18 ver.1.40
// target cpu: warning once
//
// 2023/11/04 ver.1.38
// suppress user macro replacement by placing "\".
// pseudo: block, brkb, cntb, elsb, endb
// pseudo: ifexp, elsi, endi
//
// 2023/10/21 ver.1.36
// change: pseud: asm
// valid output file extention: mem/mif/v/dat2
// add option: bit16, bit32 (default)
// output file:
// <output_file>.{mem/mif/v/dat2} as 16/32 bit data
//
// 2023/09/23 ver.1.34
// bug fixed: "[lac]s[lr]i", 2nd operand
// change: equ evaluation order
//
// 2023/08/04 ver.1.32
// string macro: target_mc, target_nh, target_ts
// string macro: target_mn=target_mc | target_nh
//
// 2023/07/08 ver.1.30
// corresponding to Tennessine core
// instruction: adcz, sbbz, cmbz
// integrated macro: lsli, lsri, asli, asri, csli, csri
// {Logical/Arithmetical/rotate with C} Shift
// {Left/Right} Immediate; Rd,imm8; imm8>=0
// <output_file>.mem: same as <output_file>.datw
//
// 2023/05/20 ver.1.28
// instruction: divlqr, divlrr, mulsr, mulur, divsr, divur
//
// 2023/03/18 ver.1.26
// instruction: jall, rtnl, pushcl, popcl
// instruction: jalw, rtnw, pushcw, popcw
// alias: jal, rtn, pushc, popc
// integrated macro: pushlm, poplm, jalwrX, jallrX
//
// 2023/02/11 ver.1.24
// instruction:
// fadd, fsub, fmul, fdiv, fneg, fsngl, fuint, ffrac,
// fmvsg, fsat, fcmp, fdown,
// pseudo: equf, datf, fldi
//
// 2022/10/22 ver.1.22
// pseudo: srbk, srie
//
// 2022/06/04 ver.1.20
// instruction: csft, csfti
//
// 2022/04/09 ver.1.18
// corresponding to Nihonium core
// instruction:
// link, unlk, brn, ldli, cendl, pushl, popl,
// exsgl, exzrl, ldl, stl, ldlsp, stlsp
// instruction:
// cendw, exsgw, pushw, popw, ldwsp, stwsp, ldbiu, ldbil, ldbih
// alias:
// cend, exsg, push, pop, ldsp, stsp, ldiu, ldil, ldih
// pseudo: datl, ldwi, pushwm, popwm, pushlm, poplm
// pseudo: align; address alignment for program area
// pseudo: asm; "moscovium" and "nihonium" option
//
// 2022/02/19 ver.1.16
// instruction: ldbx, stbx, ldwx, stwx
//
// 2021/10/16 ver.1.14
// do_preproc: not output "#" comment line
// pseudo: org; "align" option
// pseudo: dats: executed at the end of preprocess
//
// 2021/08/21 ver.1.12
// improved tolerance for uppercase source code
// however, lowercase source code is recommended
//
// 2021/08/14 ver.1.10
// corresponding to user macro
// corresponding to string macro
// corresponding to repeat expansion
// corresponding to S-JIS code in dats pseudo instruction
// pseudo: incl; add search directory "INCL/"
// pseudo: macro~endm, def, rept~endr
//
// 2021/07/10 ver.1.08
// instruction: hcmp, cmb
// dats: new escape sequence "\xhh"
//
// 2021/06/12 ver.1.06
// corresponding to half precision fpu
// instruction: hadd, hsub, hmul, hdiv, hneg,
// hhalf, huint, hfrac, hmvsg, hsat
// pseudo: equh, dath
// integrated macro: hldi
//
// 2021/05/15 ver.1.04
// corresponding to multiply and divide co-processor
// instruction: muls, mulu, divs, divu, divls, divlu, divlq, divlr
//
// 2021/04/24 ver.1.02
// corresponding to interrupts
// instruction: pause, rti, sesrh, sesrl, clsrh, clsrl, ldsp, stsp
// pseudo instruction: sesr, clsr, seie, clie
//
// 2021/03/20 ver.1.00
//
// ================================
// constants
var HEX=true; // true=hexadecimal / false=binary
var DFMIF=0; // output data format: MIF
var DFVLOG=1; // output data format: Verilog RTL
var DFMEM=2; // output data format: $readmemh()
var DFDAT2=3; // output data format: boot mode DAT
var TGTANY=0; // target core: any
var TGTMCVM=1; // target core: Moscovium
var TGTNIHO=2; // target core: Nihonium
var TGTTNSN=3; // target core: Tennessine
var MAX_NO=14; // maximum index of NO instructions
var MAX_BR=27; // maximum index of BR instructions
var MAX_RR=87; // maximum index of RR instructions
var MAX_R=113; // maximum index of R instructions
var MAX_RI=127; // maximum index of RI instructions
var MSIZ=6; // maximum mnemonic size
macro mnem=
"nop "
"pause "
"rtnw "
"rti "
"divlu "
"divls "
"divlq "
"divlr "
"link "
"unlk "
"brn "
"rtnl "
"divlqr"
"divlrr"
"bra "
"bne "
"beq "
"bcc "
"bhs "
"bcs "
"blo "
"bpl "
"bmi "
"bvc "
"bvs "
"bge "
"blt "
"fadd "
"fsub "
"fmul "
"fdiv "
"fneg "
"fsngl "
"fuint "
"ffrac "
"fmvsg "
"fsat "
"fcmp "
"fdown "
"hadd "
"hsub "
"hmul "
"hdiv "
"hneg "
"hhalf "
"huint "
"hfrac "
"hmvsg "
"hsat "
"hcmp "
"mulur "
"mulsr "
"divur "
"divsr "
"csft "
"ldl "
"stl "
"ldlsp "
"stlsp "
"ldbx "
"stbx "
"ldwx "
"stwx "
"or "
"and "
"eor "
"mov "
"movtc "
"movfc "
"add "
"adc "
"sub "
"sbb "
"cmp "
"cmb "
"ldb "
"stb "
"ldw "
"stw "
"lsft "
"asft "
"ldwsp "
"stwsp "
"mulu "
"muls "
"divu "
"divs "
"sbbz "
"cmbz "
"ldli "
"cendl "
"pushl "
"popl "
"pushcl"
"popcl "
"adcz "
"jall "
"jmp "
"jalw "
"sesrl "
"sesrh "
"clsrl "
"clsrh "
"exsgl "
"exzrl "
"neg "
"not "
"cendw "
"exsgw "
"pushw "
"popw "
"pushcw"
"popcw "
"ori "
"andi "
"eori "
"addi "
"subi "
"cmpi "
"ldbiu "
"ldbil "
"ldbih "
"ldcl "
"ldch "
"lsfti "
"asfti "
"csfti "
"org "
"datw "
"align "
"srbk0 "
"srbk1 "
"srie0 "
"srie1 ";
macro opcd=
"0000 "
"0001 "
"0002 "
"0003 "
"0004m"
"0005m"
"0006m"
"0007m"
"0008n"
"0009n"
"000A "
"000Bn"
"000Cm"
"000Dm"
"0800 "
"1000 "
"1800 "
"2000 "
"2000 "
"2800 "
"2800 "
"3000 "
"3800 "
"4000 "
"4800 "
"5000 "
"5800 "
"7000n"
"7040n"
"7080n"
"70C0n"
"7100n"
"7140n"
"7180n"
"71C0n"
"7200n"
"7240n"
"7280n"
"72C0n"
"7000t"
"7040t"
"7080t"
"70C0t"
"7100t"
"7140t"
"7180t"
"71C0t"
"7200t"
"7240t"
"7280t"
"7400 "
"7440 "
"7480t"
"74C0t"
"75C0 "
"7600n"
"7640n"
"7680n"
"76C0n"
"7700t"
"7740t"
"7780t"
"77C0t"
"7800 "
"7840 "
"7880 "
"78C0 "
"7900 "
"7940 "
"7980 "
"79C0 "
"7A00 "
"7A40 "
"7A80 "
"7AC0 "
"7B00 "
"7B40 "
"7B80 "
"7BC0 "
"7C00 "
"7C40 "
"7C80t"
"7CC0t"
"7D00 "
"7D40 "
"7D80t"
"7DC0t"
"7F00 "
"7F08 "
"7F40n"
"7F48n"
"7F50n"
"7F58n"
"7F60n"
"7F68n"
"7F70 "
"7F78n"
"7F80 "
"7F88 "
"7F90 "
"7F98 "
"7FA0 "
"7FA8 "
"7FB0 "
"7FB8 "
"7FC0 "
"7FC8 "
"7FD0 "
"7FD8 "
"7FE0 "
"7FE8 "
"7FF0 "
"7FF8 "
"8000 "
"8800 "
"9000 "
"9800 "
"A000 "
"A800 "
"B000 "
"B800 "
"C000 "
"C800 "
"D000 "
"D800 "
"E000 "
"E800 ";
// variables
var DATFMT=DFMEM; // output data file format
var ROMSIZ=4096; // DFDAT: ROM size [byte]
var LISOUT=false; // true=output .lis file
var TGTCORE=TGTANY; // TGTANY=all
var ASMBIT=32; // output data width [bit]
var ROMBIT=int (ceil (ln (ROMSIZ)/ln (2))); // CL-ROM addr. bits
var asm.core.mc=TGTMCVM;
var asm.core.nh=TGTNIHO;
var asm.core.ts=TGTTNSN;
var asm.target=asm.core.mc;
macro incl_dir="INCL";
macro dir,file,ext;
pathsplit $(pathname), dir,file,ext;
zero 1e-40; // strengthen zero threshold
// procedures
procedure dbl2half dbl
{
// 浮動小数点数値dblをhalf型のバイナリデータに変換する
var sx,ex,fx;
// sign
sx=0;
if (dbl<0)
{
sx=1;
}
elif (dbl=0)
{
dbl2half=0;
mlet dbl2half="0x0000";
return;
}
// exponent and fraction
ex=0;
fx=abs (dbl);
while (fx<1)
{
fx=fx*2;
ex=ex - 1;
}
while (fx>=2)
{
fx=fx/2;
ex=ex + 1;
}
if (ex<-14)
{
// zero
ex=-15;
fx=0;
}
elif (ex>15)
{
// INF
ex=16;
fx=0;
}
// convert fx to 11 bits binary
fx=floor (fx*0x0400);
fx=@(fx&0x03ff);
// half type
dbl2half=sx*0x8000 + (ex + 15)*0x0400 + fx;
num2str dbl2half=dbl2half,"%04x";
psub "^","0x",dbl2half;
}
procedure dbl2sngl dbl
{
// 浮動小数点数値dblをfloat型のバイナリデータに変換する
var sx,ex,fx;
// sign
sx=0;
if (dbl<0)
{
sx=1;
}
elif (dbl=0)
{
dbl2sngl=0;
mlet dbl2sngl="0x00000000";
return;
}
// exponent and fraction
ex=0;
fx=abs (dbl);
while (fx<1)
{
fx=fx*2;
ex=ex - 1;
}
while (fx>=2)
{
fx=fx/2;
ex=ex + 1;
}
if (ex<-126)
{
// zero
ex=-127;
fx=0;
}
elif (ex>127)
{
// INF
ex=128;
fx=0;
}
// convert fx to 24 bits binary
fx=floor (fx*0x0080_0000);
fx=@(fx&0x007f_ffff);
// float type
dbl2sngl=sx*0x8000_0000 + (ex + 127)*0x0080_0000 + fx;
num2str dbl2sngl=dbl2sngl,"%08x";
psub "^","0x",dbl2sngl;
}
procedure def_strmcr $$opr1,$$opr2
{
// define string macro $(opr1) as $(opr2)
// If string macro $(opr1) is already defined,
// $(opr1) will be overwritten by string $(opr2).
var idx2;
// search for the string macro $(opr1) in the list
while (idx2<n_def)
{
strcmp cmp=$(def_lst#(idx2)),$(opr1);
if (cmp=0)
{
break;
}
// continue
idx2=idx2 + 1;
}
// define or overwrite
static : nmacro def_lst#(idx2);
static : nmacro def_str#(idx2);
mlet def_lst#(idx2)=$(opr1);
mlet def_str#(idx2)=$(opr2);
if (idx2>=n_def)
{
n_def=n_def + 1;
}
}
procedure do_preproc
{
// preprocess
procedure skip_space
{
var ptr;
macro chr;
nmacro delm=" , ";
while (true)
{
substr chr=$(lbuf),idx,1;
strcmp ptr=$(chr),"";
if (ptr=0)
{
break;
}
index ptr=$(delm),$(chr);
if (ptr<=0)
{
break;
}
// continue;
idx=idx + 1;
}
}
procedure get_word
{
var ptr;
var cod;
var quo;
macro chr;
nmacro delm=" , ";
quo=false;
while (true)
{
substr chr=$(lbuf),idx,1;
strcmp ptr=$(chr),"";
if (ptr=0)
{
break;
}
index ptr=$(delm),$(chr);
if (ptr>0)
{
break;
}
strcmp ptr=$(chr),$";
if (ptr=0)
{
quo=true;
idx=idx + 1;
while (true)
{
substr chr=$(lbuf),idx,1;
strcmp ptr=$(chr),"";
if (ptr=0)
{
break;
}
strcmp ptr=$(chr),$";
if (ptr=0)
{
idx=idx + 1;
break;
}
strcmp ptr=$(chr),"\";
if (ptr=0)
{
strcat get_word,$(chr);
idx=idx + 1;
substr chr=$(lbuf),idx,1;
}
chr2num cod=$(chr);
if (cod>255)
{
idx=idx + 1;
}
strcat get_word,$(chr);
// continue
idx=idx + 1;
}
break;
}
strcat get_word,$(chr);
// continue;
idx=idx + 1;
}
if (!quo)
{
psub "#.*","",get_word;
psub "//.*","",get_word;
}
}
procedure get_chr_cod
{
var cmp;
macro chr;
substr chr=$(get_word),idx,1;
idx=idx + 1;
chr2num get_chr_cod=$(chr);
strcmp cmp=$(chr),"\";
if (cmp=0)
{
substr chr=$(get_word),idx,1;
chr2num get_chr_cod=$(chr);
idx=idx + 1;
strcmp cmp=$(chr),"0";
if (cmp=0)
{
get_chr_cod=0;
}
strcmp cmp=$(chr),"t";
if (cmp=0)
{
get_chr_cod=9;
}
strcmp cmp=$(chr),"n";
if (cmp=0)
{
get_chr_cod=10;
}
strcmp cmp=$(chr),"r";
if (cmp=0)
{
get_chr_cod=13;
}
strcmp cmp=$(chr),"x";
if (cmp=0)
{
macro chr2;
substr chr=$(get_word),idx,1;
idx=idx + 1;
substr chr2=$(get_word),idx,1;
idx=idx + 1;
get_chr_cod="0x"$(chr)$(chr2);
}
}
}
procedure get_newline
{
// get line
static : fgetl fin,lbuf;
do_preproc=status;
if (do_preproc)
{
return;
}
// string macro replacement
index idx=$(lbuf),"$(";
if (idx>0)
{
var idx2;
while (idx2<n_def)
{
gsub "$("$(def_lst#(idx2))")",$(def_str#(idx2)),lbuf;
if (status>0)
{
redo_pp=true;
}
// continue
idx2=idx2 + 1;
}
}
// ignore "#" comment line
pindex idx=$(lbuf),"^[ \t]*#";
if (idx>0)
{
get_newline;
}
// initialize
idx=1;
skip_space;
}
var idx;
var ptr;
var cmp;
macro chr;
macro scod;
macro mnem;
macro opr1;
macro opr2;
get_newline;
if (do_preproc)
{
return;
}
get_word;
tolower get_word;
mlet mnem=$(get_word);
// pseudo instructions
strcmp ptr=$(mnem),"asm";
if (ptr=0)
{
skip_space;
get_word;
mlet fnam_out=$(dir)$/$(get_word);
pindex ptr=$(fnam_out),"\.[Mm][Ii][Ff]$";
if (ptr>0)
{
DATFMT=DFMIF;
}
pindex ptr=$(fnam_out),"\.[Vv]$";
if (ptr>0)
{
DATFMT=DFVLOG;
}
pindex ptr=$(fnam_out),"\.[Mm][Ee][Mm]$";
if (ptr>0)
{
DATFMT=DFMEM;
}
pindex ptr=$(fnam_out),"\.[Dd][Aa][Tt]2$";
if (ptr>0)
{
DATFMT=DFDAT2;
}
// option
LISOUT=false;
while (true)
{
idx=idx + 1;
skip_space;
get_word;
strcmp cmp=$(get_word),"";
if (cmp=0)
{
break;
}
strcmp cmp=$(get_word),"list";
if (cmp=0)
{
LISOUT=true;
}
strcmp cmp=$(get_word),"bit16";
if (cmp=0)
{
ASMBIT=16;
}
strcmp cmp=$(get_word),"bit32";
if (cmp=0)
{
ASMBIT=32;
}
strcmp cmp=$(get_word),"moscovium", ics_match;
if (cmp=0)
{
TGTCORE=TGTMCVM;
def_strmcr "target_mc","";
def_strmcr "target_nh","#";
def_strmcr "target_ts","#";
def_strmcr "target_mn","";
asm.target=asm.core.mc;
}
strcmp cmp=$(get_word),"nihonium", ics_match;
if (cmp=0)
{
TGTCORE=TGTNIHO;
def_strmcr "target_mc","#";
def_strmcr "target_nh","";
def_strmcr "target_ts","#";
def_strmcr "target_mn","";
asm.target=asm.core.nh;
}
strcmp cmp=$(get_word),"tennessine", ics_match;
if (cmp=0)
{
TGTCORE=TGTTNSN;
def_strmcr "target_mc","#";
def_strmcr "target_nh","#";
def_strmcr "target_ts","";
def_strmcr "target_mn","#";
asm.target=asm.core.ts;
}
}
return;
}
strcmp ptr=$(mnem),"romsiz";
if (ptr=0)
{
// ROMSIZ
skip_space;
get_word;
ROMSIZ=$(get_word);
ROMBIT=int (ceil (ln (ROMSIZ)/ln (2)));
return;
}
strcmp ptr=$(mnem),"incl";
if (ptr=0)
{
skip_space;
get_word;
ifnacc $(dir)$/$(get_word)
{
ifacc $(dir)$/$(incl_dir)$/$(get_word)
{
mlet get_word=$(incl_dir)$/$(get_word);
}
else
{
// ERROR:
errmsg "incl: open file:"$,$(dir)$/$(get_word);
leave stop_error;
}
}
var fin2;
fopen fin2,$(dir)$/$(get_word),"r";
fgets fin2,tbuf;
while (status=0)
{
fputl fout,$(tbuf);
// continue
fgets fin2,tbuf;
}
fclose fin2;
redo_pp=true;
return;
}
strcmp ptr=$(mnem),"equ";
if (ptr=0)
{
skip_space;
get_word;
mlet opr1=$(get_word);
idx=idx + 1;
skip_space;
get_word;
mlet opr2=$(get_word);
tolower opr1;
pindex cmp=$(opr2),"^[0-9_]+$";
if (cmp=0)
{
pindex cmp=$(opr2),"^0[xX][0-9a-fA-F_]+$";
}
if (cmp=0)
{
pindex cmp=$(opr2),"^0[bB][01_]+$";
}
if (cmp>0)
{
fprint fout,"## const (#)"$(opr1)"="$(opr2)$,,cmp;
static : nvar $(opr1)=@($(opr2));
}
else
{
fprint fout,"@static : nvar "$(opr1)"; "
$(opr1)"=@("$(opr2)");"$,;
}
fprint flab,$(opr1)$,;
return;
}
strcmp ptr=$(mnem),"equh";
if (ptr=0)
{
skip_space;
get_word;
mlet opr1=$(get_word);
idx=idx + 1;
skip_space;
get_word;
mlet opr2=$(get_word);
dbl2half $(opr2);
tolower opr1;
fprint fout,"@static : nvar "$(opr1)"; "
$(opr1)"="$(dbl2half)";"$,;
fprint flab,$(opr1)$,;
return;
}
strcmp ptr=$(mnem),"equf";
if (ptr=0)
{
skip_space;
get_word;
mlet opr1=$(get_word);
idx=idx + 1;
skip_space;
get_word;
mlet opr2=$(get_word);
dbl2sngl $(opr2);
tolower opr1;
fprint fout,"@static : nvar "$(opr1)"; "
$(opr1)"="$(dbl2sngl)";"$,;
fprint flab,$(opr1)$,;
return;
}
strcmp ptr=$(mnem),"def";
if (ptr=0)
{
skip_space;
get_word;
mlet opr1=$(get_word);
idx=idx + 1;
skip_space;
get_word;
mlet opr2=$(get_word);
tolower opr1;
strcmp cmp=$(opr1),"";
if (cmp=0)
{
// ERROR: empty string macro name
errmsg "def: empty string macro name";
leave stop_error;
}
def_strmcr $(opr1),$(opr2);
return;
}
strcmp ptr=$(mnem),"dats";
if (ptr=0)
{
var len;
var cod;
macro cmnt;
if (redo_pp)
{
pgsub "#","##",lbuf;
fprint fout,$(lbuf)$,;
return;
}
skip_space;
get_word;
// convert dats to datw
strlen len=$(get_word);
var cod_nx;
idx=1;
while (idx<=len)
{
mlet cmnt="";
// even
if (!cod_nx)
{
get_chr_cod;
cod_nx=get_chr_cod;
}
if (cod_nx>255)
{
// multi-byte character
num2chr chr=cod_nx;
num2str scod=cod_nx,"%04x";
fprint fout,"datw 0x"$(scod)" // "$(chr)$,;
// continue
idx=idx + 1;
cod_nx=0;
continue;