RISC Processor

About

This project is an implementation of a risc-based processor with pipeline developed in C++ by means of systemc C++library.

Open up the command line and execute the following instructions:

export SYSTEMC_HOME=/usr/local/systemc-2.3.1/
g++ -I. -I$SYSTEMC_HOME/include -L. -L$SYSTEMC_HOME/lib-linux64 -Wl -rpath=$SYSTEMC_HOME/lib-linux64 -o main main.cpp -lsystemc -lm
./main < file.txt

Ps.: The file.txt is the file which has the algorithm to be executed.

For creating your own algorithm and making the processor run it, you must create a .txt file with the following instructions:

Loading values into the data memory (RAM):

Followed by instructions supported by this processor:

OPCODE OP1 OP2 OP3

OPCODEs available: ADD, SUB, AND, OR, NOT, XOR, LD, ST, LI, J, JZ, JN

Name		Name	Last commit message	Last commit date
Latest commit History 31 Commits
diagramas		diagramas
relatorio		relatorio
README.md		README.md
algo1.txt		algo1.txt
algo2.txt		algo2.txt
algo3.txt		algo3.txt
algo4.txt		algo4.txt
algo6.txt		algo6.txt
banco_registradores.h		banco_registradores.h
controle.h		controle.h
decodificador.h		decodificador.h
gerador.cpp		gerador.cpp
main.cpp		main.cpp
mem_instrucoes.h		mem_instrucoes.h
memoria_dados.h		memoria_dados.h
mux_banco_registradores.h		mux_banco_registradores.h
mux_memoria_dados.h		mux_memoria_dados.h
pc.h		pc.h
pipeline_reg.h		pipeline_reg.h
processador.cpp		processador.cpp
processador.h		processador.h
ula.h		ula.h