/
dmi_wrapper.go
8022 lines (7163 loc) · 203 KB
/
dmi_wrapper.go
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package cuda
/*
THIS FILE IS AUTO-GENERATED BY CUDA2GO.
EDITING IS FUTILE.
*/
import (
"github.com/mumax/3/cuda/cu"
"github.com/mumax/3/timer"
"sync"
"unsafe"
)
// CUDA handle for adddmi kernel
var adddmi_code cu.Function
// Stores the arguments for adddmi kernel invocation
type adddmi_args_t struct {
arg_Hx unsafe.Pointer
arg_Hy unsafe.Pointer
arg_Hz unsafe.Pointer
arg_mx unsafe.Pointer
arg_my unsafe.Pointer
arg_mz unsafe.Pointer
arg_Ms_ unsafe.Pointer
arg_Ms_mul float32
arg_aLUT2d unsafe.Pointer
arg_dLUT2d unsafe.Pointer
arg_regions unsafe.Pointer
arg_cx float32
arg_cy float32
arg_cz float32
arg_Nx int
arg_Ny int
arg_Nz int
arg_PBC byte
arg_OpenBC byte
argptr [19]unsafe.Pointer
sync.Mutex
}
// Stores the arguments for adddmi kernel invocation
var adddmi_args adddmi_args_t
func init() {
// CUDA driver kernel call wants pointers to arguments, set them up once.
adddmi_args.argptr[0] = unsafe.Pointer(&adddmi_args.arg_Hx)
adddmi_args.argptr[1] = unsafe.Pointer(&adddmi_args.arg_Hy)
adddmi_args.argptr[2] = unsafe.Pointer(&adddmi_args.arg_Hz)
adddmi_args.argptr[3] = unsafe.Pointer(&adddmi_args.arg_mx)
adddmi_args.argptr[4] = unsafe.Pointer(&adddmi_args.arg_my)
adddmi_args.argptr[5] = unsafe.Pointer(&adddmi_args.arg_mz)
adddmi_args.argptr[6] = unsafe.Pointer(&adddmi_args.arg_Ms_)
adddmi_args.argptr[7] = unsafe.Pointer(&adddmi_args.arg_Ms_mul)
adddmi_args.argptr[8] = unsafe.Pointer(&adddmi_args.arg_aLUT2d)
adddmi_args.argptr[9] = unsafe.Pointer(&adddmi_args.arg_dLUT2d)
adddmi_args.argptr[10] = unsafe.Pointer(&adddmi_args.arg_regions)
adddmi_args.argptr[11] = unsafe.Pointer(&adddmi_args.arg_cx)
adddmi_args.argptr[12] = unsafe.Pointer(&adddmi_args.arg_cy)
adddmi_args.argptr[13] = unsafe.Pointer(&adddmi_args.arg_cz)
adddmi_args.argptr[14] = unsafe.Pointer(&adddmi_args.arg_Nx)
adddmi_args.argptr[15] = unsafe.Pointer(&adddmi_args.arg_Ny)
adddmi_args.argptr[16] = unsafe.Pointer(&adddmi_args.arg_Nz)
adddmi_args.argptr[17] = unsafe.Pointer(&adddmi_args.arg_PBC)
adddmi_args.argptr[18] = unsafe.Pointer(&adddmi_args.arg_OpenBC)
}
// Wrapper for adddmi CUDA kernel, asynchronous.
func k_adddmi_async(Hx unsafe.Pointer, Hy unsafe.Pointer, Hz unsafe.Pointer, mx unsafe.Pointer, my unsafe.Pointer, mz unsafe.Pointer, Ms_ unsafe.Pointer, Ms_mul float32, aLUT2d unsafe.Pointer, dLUT2d unsafe.Pointer, regions unsafe.Pointer, cx float32, cy float32, cz float32, Nx int, Ny int, Nz int, PBC byte, OpenBC byte, cfg *config) {
if Synchronous { // debug
Sync()
timer.Start("adddmi")
}
adddmi_args.Lock()
defer adddmi_args.Unlock()
if adddmi_code == 0 {
adddmi_code = fatbinLoad(adddmi_map, "adddmi")
}
adddmi_args.arg_Hx = Hx
adddmi_args.arg_Hy = Hy
adddmi_args.arg_Hz = Hz
adddmi_args.arg_mx = mx
adddmi_args.arg_my = my
adddmi_args.arg_mz = mz
adddmi_args.arg_Ms_ = Ms_
adddmi_args.arg_Ms_mul = Ms_mul
adddmi_args.arg_aLUT2d = aLUT2d
adddmi_args.arg_dLUT2d = dLUT2d
adddmi_args.arg_regions = regions
adddmi_args.arg_cx = cx
adddmi_args.arg_cy = cy
adddmi_args.arg_cz = cz
adddmi_args.arg_Nx = Nx
adddmi_args.arg_Ny = Ny
adddmi_args.arg_Nz = Nz
adddmi_args.arg_PBC = PBC
adddmi_args.arg_OpenBC = OpenBC
args := adddmi_args.argptr[:]
cu.LaunchKernel(adddmi_code, cfg.Grid.X, cfg.Grid.Y, cfg.Grid.Z, cfg.Block.X, cfg.Block.Y, cfg.Block.Z, 0, stream0, args)
if Synchronous { // debug
Sync()
timer.Stop("adddmi")
}
}
// maps compute capability on PTX code for adddmi kernel.
var adddmi_map = map[int]string{0: "",
30: adddmi_ptx_30,
32: adddmi_ptx_32,
35: adddmi_ptx_35,
37: adddmi_ptx_37,
50: adddmi_ptx_50,
52: adddmi_ptx_52,
53: adddmi_ptx_53,
60: adddmi_ptx_60,
61: adddmi_ptx_61,
62: adddmi_ptx_62,
70: adddmi_ptx_70,
72: adddmi_ptx_72,
75: adddmi_ptx_75}
// adddmi PTX code for various compute capabilities.
const (
adddmi_ptx_30 = `
.version 6.5
.target sm_30
.address_size 64
// .globl adddmi
.visible .entry adddmi(
.param .u64 adddmi_param_0,
.param .u64 adddmi_param_1,
.param .u64 adddmi_param_2,
.param .u64 adddmi_param_3,
.param .u64 adddmi_param_4,
.param .u64 adddmi_param_5,
.param .u64 adddmi_param_6,
.param .f32 adddmi_param_7,
.param .u64 adddmi_param_8,
.param .u64 adddmi_param_9,
.param .u64 adddmi_param_10,
.param .f32 adddmi_param_11,
.param .f32 adddmi_param_12,
.param .f32 adddmi_param_13,
.param .u32 adddmi_param_14,
.param .u32 adddmi_param_15,
.param .u32 adddmi_param_16,
.param .u8 adddmi_param_17,
.param .u8 adddmi_param_18
)
{
.reg .pred %p<59>;
.reg .b16 %rs<39>;
.reg .f32 %f<263>;
.reg .b32 %r<219>;
.reg .b64 %rd<117>;
ld.param.u64 %rd1, [adddmi_param_0];
ld.param.u64 %rd2, [adddmi_param_1];
ld.param.u64 %rd3, [adddmi_param_2];
ld.param.u64 %rd4, [adddmi_param_3];
ld.param.u64 %rd5, [adddmi_param_4];
ld.param.u64 %rd6, [adddmi_param_5];
ld.param.u64 %rd7, [adddmi_param_6];
ld.param.f32 %f261, [adddmi_param_7];
ld.param.u64 %rd8, [adddmi_param_8];
ld.param.u64 %rd9, [adddmi_param_9];
ld.param.u64 %rd10, [adddmi_param_10];
ld.param.f32 %f99, [adddmi_param_11];
ld.param.f32 %f100, [adddmi_param_12];
ld.param.f32 %f101, [adddmi_param_13];
ld.param.u32 %r33, [adddmi_param_14];
ld.param.u32 %r34, [adddmi_param_15];
ld.param.u32 %r35, [adddmi_param_16];
ld.param.u8 %rs13, [adddmi_param_18];
ld.param.u8 %rs12, [adddmi_param_17];
mov.u32 %r36, %ntid.x;
mov.u32 %r37, %ctaid.x;
mov.u32 %r38, %tid.x;
mad.lo.s32 %r1, %r36, %r37, %r38;
mov.u32 %r39, %ntid.y;
mov.u32 %r40, %ctaid.y;
mov.u32 %r41, %tid.y;
mad.lo.s32 %r2, %r39, %r40, %r41;
mov.u32 %r42, %ntid.z;
mov.u32 %r43, %ctaid.z;
mov.u32 %r44, %tid.z;
mad.lo.s32 %r3, %r42, %r43, %r44;
setp.ge.s32 %p1, %r2, %r34;
setp.ge.s32 %p2, %r1, %r33;
or.pred %p3, %p1, %p2;
setp.ge.s32 %p4, %r3, %r35;
or.pred %p5, %p3, %p4;
@%p5 bra BB0_59;
cvta.to.global.u64 %rd11, %rd10;
cvta.to.global.u64 %rd12, %rd6;
cvta.to.global.u64 %rd13, %rd5;
cvta.to.global.u64 %rd14, %rd4;
mad.lo.s32 %r45, %r3, %r34, %r2;
mul.lo.s32 %r4, %r45, %r33;
add.s32 %r46, %r4, %r1;
mul.wide.s32 %rd15, %r46, 4;
add.s64 %rd16, %rd14, %rd15;
cvt.s64.s32 %rd17, %r46;
add.s64 %rd18, %rd13, %rd15;
add.s64 %rd19, %rd12, %rd15;
add.s64 %rd20, %rd11, %rd17;
ld.global.u8 %rs1, [%rd20];
ld.global.f32 %f1, [%rd16];
ld.global.f32 %f2, [%rd18];
mul.f32 %f102, %f2, %f2;
fma.rn.f32 %f103, %f1, %f1, %f102;
ld.global.f32 %f3, [%rd19];
fma.rn.f32 %f104, %f3, %f3, %f103;
setp.eq.f32 %p6, %f104, 0f00000000;
@%p6 bra BB0_59;
and.b16 %rs14, %rs12, 1;
setp.eq.b16 %p7, %rs14, 1;
add.s32 %r5, %r1, -1;
@!%p7 bra BB0_4;
bra.uni BB0_3;
BB0_3:
rem.s32 %r51, %r5, %r33;
add.s32 %r52, %r51, %r33;
rem.s32 %r213, %r52, %r33;
bra.uni BB0_5;
BB0_4:
mov.u32 %r53, 0;
max.s32 %r213, %r5, %r53;
BB0_5:
add.s32 %r9, %r213, %r4;
setp.eq.b16 %p8, %rs14, 1;
not.pred %p9, %p8;
setp.lt.s32 %p10, %r5, 0;
mov.f32 %f225, 0f00000000;
and.pred %p11, %p10, %p9;
mov.f32 %f226, %f225;
mov.f32 %f227, %f225;
@%p11 bra BB0_7;
mul.wide.s32 %rd22, %r9, 4;
add.s64 %rd23, %rd14, %rd22;
ld.global.f32 %f225, [%rd23];
add.s64 %rd25, %rd13, %rd22;
ld.global.f32 %f226, [%rd25];
add.s64 %rd27, %rd12, %rd22;
ld.global.f32 %f227, [%rd27];
BB0_7:
mul.f32 %f108, %f226, %f226;
fma.rn.f32 %f109, %f225, %f225, %f108;
fma.rn.f32 %f10, %f227, %f227, %f109;
setp.eq.f32 %p12, %f10, 0f00000000;
mov.u16 %rs35, %rs1;
@%p12 bra BB0_9;
cvt.s64.s32 %rd29, %r9;
add.s64 %rd30, %rd11, %rd29;
ld.global.u8 %rs35, [%rd30];
BB0_9:
cvt.u32.u16 %r54, %rs1;
and.b32 %r55, %r54, 255;
setp.gt.u16 %p13, %rs35, %rs1;
cvt.u32.u16 %r56, %rs35;
and.b32 %r57, %r56, 255;
selp.b32 %r58, %r55, %r57, %p13;
selp.b32 %r59, %r57, %r55, %p13;
add.s32 %r60, %r59, 1;
mul.lo.s32 %r61, %r60, %r59;
shr.u32 %r62, %r61, 1;
add.s32 %r63, %r62, %r58;
cvta.to.global.u64 %rd31, %rd8;
mul.wide.s32 %rd32, %r63, 4;
add.s64 %rd33, %rd31, %rd32;
ld.global.f32 %f11, [%rd33];
cvta.to.global.u64 %rd34, %rd9;
add.s64 %rd35, %rd34, %rd32;
ld.global.f32 %f12, [%rd35];
setp.ne.s16 %p14, %rs13, 0;
mov.f32 %f237, 0f00000000;
and.pred %p16, %p12, %p14;
mov.f32 %f238, %f237;
mov.f32 %f239, %f237;
@%p16 bra BB0_13;
setp.neu.f32 %p17, %f10, 0f00000000;
@%p17 bra BB0_12;
mul.f32 %f113, %f12, 0f3F000000;
div.rn.f32 %f114, %f113, %f11;
mul.f32 %f115, %f114, %f99;
fma.rn.f32 %f225, %f3, %f115, %f1;
mul.f32 %f116, %f1, %f115;
sub.f32 %f227, %f3, %f116;
mov.f32 %f226, %f2;
BB0_12:
mul.f32 %f117, %f99, %f99;
add.f32 %f118, %f11, %f11;
div.rn.f32 %f119, %f118, %f117;
sub.f32 %f120, %f225, %f1;
sub.f32 %f121, %f226, %f2;
sub.f32 %f122, %f227, %f3;
fma.rn.f32 %f123, %f120, %f119, 0f00000000;
fma.rn.f32 %f238, %f121, %f119, 0f00000000;
fma.rn.f32 %f124, %f119, %f122, 0f00000000;
div.rn.f32 %f125, %f12, %f99;
mul.f32 %f126, %f227, %f125;
sub.f32 %f237, %f123, %f126;
fma.rn.f32 %f239, %f225, %f125, %f124;
BB0_13:
setp.eq.b16 %p18, %rs14, 1;
add.s32 %r10, %r1, 1;
@!%p18 bra BB0_15;
bra.uni BB0_14;
BB0_14:
rem.s32 %r68, %r10, %r33;
add.s32 %r69, %r68, %r33;
rem.s32 %r214, %r69, %r33;
bra.uni BB0_16;
BB0_15:
add.s32 %r70, %r33, -1;
min.s32 %r214, %r10, %r70;
BB0_16:
setp.eq.b16 %p19, %rs14, 1;
not.pred %p20, %p19;
add.s32 %r14, %r214, %r4;
setp.ge.s32 %p21, %r10, %r33;
mov.f32 %f231, 0f00000000;
and.pred %p22, %p21, %p20;
mov.f32 %f232, %f231;
mov.f32 %f233, %f231;
@%p22 bra BB0_18;
mul.wide.s32 %rd37, %r14, 4;
add.s64 %rd38, %rd14, %rd37;
ld.global.f32 %f231, [%rd38];
add.s64 %rd40, %rd13, %rd37;
ld.global.f32 %f232, [%rd40];
add.s64 %rd42, %rd12, %rd37;
ld.global.f32 %f233, [%rd42];
BB0_18:
mul.f32 %f130, %f232, %f232;
fma.rn.f32 %f131, %f231, %f231, %f130;
fma.rn.f32 %f30, %f233, %f233, %f131;
setp.eq.f32 %p23, %f30, 0f00000000;
mov.u16 %rs36, %rs1;
@%p23 bra BB0_20;
cvt.s64.s32 %rd44, %r14;
add.s64 %rd45, %rd11, %rd44;
ld.global.u8 %rs36, [%rd45];
BB0_20:
setp.gt.u16 %p24, %rs36, %rs1;
cvt.u32.u16 %r73, %rs36;
and.b32 %r74, %r73, 255;
selp.b32 %r75, %r55, %r74, %p24;
selp.b32 %r76, %r74, %r55, %p24;
add.s32 %r77, %r76, 1;
mul.lo.s32 %r78, %r77, %r76;
shr.u32 %r79, %r78, 1;
add.s32 %r80, %r79, %r75;
mul.wide.s32 %rd47, %r80, 4;
add.s64 %rd48, %rd31, %rd47;
ld.global.f32 %f31, [%rd48];
add.s64 %rd50, %rd34, %rd47;
ld.global.f32 %f32, [%rd50];
and.pred %p27, %p23, %p14;
@%p27 bra BB0_24;
setp.neu.f32 %p28, %f30, 0f00000000;
@%p28 bra BB0_23;
mul.f32 %f132, %f32, 0f3F000000;
div.rn.f32 %f133, %f132, %f31;
mul.f32 %f134, %f133, %f99;
mul.f32 %f135, %f3, %f134;
sub.f32 %f231, %f1, %f135;
fma.rn.f32 %f233, %f1, %f134, %f3;
mov.f32 %f232, %f2;
BB0_23:
mul.f32 %f136, %f99, %f99;
add.f32 %f137, %f31, %f31;
div.rn.f32 %f138, %f137, %f136;
sub.f32 %f139, %f231, %f1;
sub.f32 %f140, %f232, %f2;
sub.f32 %f141, %f233, %f3;
fma.rn.f32 %f142, %f139, %f138, %f237;
fma.rn.f32 %f238, %f140, %f138, %f238;
fma.rn.f32 %f143, %f138, %f141, %f239;
div.rn.f32 %f144, %f32, %f99;
fma.rn.f32 %f237, %f233, %f144, %f142;
mul.f32 %f145, %f231, %f144;
sub.f32 %f239, %f143, %f145;
BB0_24:
and.b16 %rs6, %rs12, 2;
setp.eq.s16 %p29, %rs6, 0;
add.s32 %r15, %r2, -1;
@%p29 bra BB0_26;
rem.s32 %r85, %r15, %r34;
add.s32 %r86, %r85, %r34;
rem.s32 %r215, %r86, %r34;
bra.uni BB0_27;
BB0_26:
mov.u32 %r87, 0;
max.s32 %r215, %r15, %r87;
BB0_27:
mad.lo.s32 %r92, %r3, %r34, %r215;
mad.lo.s32 %r19, %r92, %r33, %r1;
setp.lt.s32 %p31, %r15, 0;
mov.f32 %f240, 0f00000000;
and.pred %p32, %p31, %p29;
mov.f32 %f241, %f240;
mov.f32 %f242, %f240;
@%p32 bra BB0_29;
mul.wide.s32 %rd52, %r19, 4;
add.s64 %rd53, %rd14, %rd52;
ld.global.f32 %f240, [%rd53];
add.s64 %rd55, %rd13, %rd52;
ld.global.f32 %f241, [%rd55];
add.s64 %rd57, %rd12, %rd52;
ld.global.f32 %f242, [%rd57];
BB0_29:
mul.f32 %f149, %f241, %f241;
fma.rn.f32 %f150, %f240, %f240, %f149;
fma.rn.f32 %f50, %f242, %f242, %f150;
setp.eq.f32 %p33, %f50, 0f00000000;
mov.u16 %rs37, %rs1;
@%p33 bra BB0_31;
cvt.s64.s32 %rd59, %r19;
add.s64 %rd60, %rd11, %rd59;
ld.global.u8 %rs37, [%rd60];
BB0_31:
setp.gt.u16 %p34, %rs37, %rs1;
cvt.u32.u16 %r99, %rs37;
and.b32 %r100, %r99, 255;
selp.b32 %r101, %r55, %r100, %p34;
selp.b32 %r102, %r100, %r55, %p34;
add.s32 %r103, %r102, 1;
mul.lo.s32 %r104, %r103, %r102;
shr.u32 %r105, %r104, 1;
add.s32 %r106, %r105, %r101;
mul.wide.s32 %rd62, %r106, 4;
add.s64 %rd63, %rd31, %rd62;
ld.global.f32 %f51, [%rd63];
add.s64 %rd65, %rd34, %rd62;
ld.global.f32 %f52, [%rd65];
and.pred %p37, %p33, %p14;
@%p37 bra BB0_35;
setp.neu.f32 %p38, %f50, 0f00000000;
@%p38 bra BB0_34;
mul.f32 %f151, %f52, 0f3F000000;
div.rn.f32 %f152, %f151, %f51;
mul.f32 %f153, %f152, %f100;
fma.rn.f32 %f241, %f3, %f153, %f2;
mul.f32 %f154, %f2, %f153;
sub.f32 %f242, %f3, %f154;
mov.f32 %f240, %f1;
BB0_34:
mul.f32 %f155, %f100, %f100;
add.f32 %f156, %f51, %f51;
div.rn.f32 %f157, %f156, %f155;
sub.f32 %f158, %f240, %f1;
sub.f32 %f159, %f241, %f2;
sub.f32 %f160, %f242, %f3;
fma.rn.f32 %f237, %f158, %f157, %f237;
fma.rn.f32 %f161, %f159, %f157, %f238;
fma.rn.f32 %f162, %f157, %f160, %f239;
div.rn.f32 %f163, %f52, %f100;
mul.f32 %f164, %f242, %f163;
sub.f32 %f238, %f161, %f164;
fma.rn.f32 %f239, %f241, %f163, %f162;
BB0_35:
add.s32 %r20, %r2, 1;
@%p29 bra BB0_37;
rem.s32 %r111, %r20, %r34;
add.s32 %r112, %r111, %r34;
rem.s32 %r216, %r112, %r34;
bra.uni BB0_38;
BB0_37:
add.s32 %r113, %r34, -1;
min.s32 %r216, %r20, %r113;
BB0_38:
shr.u16 %rs26, %rs12, 1;
and.b16 %rs27, %rs26, 1;
setp.eq.b16 %p40, %rs27, 1;
not.pred %p41, %p40;
mad.lo.s32 %r118, %r3, %r34, %r216;
mad.lo.s32 %r24, %r118, %r33, %r1;
setp.ge.s32 %p42, %r20, %r34;
mov.f32 %f249, 0f00000000;
and.pred %p43, %p42, %p41;
mov.f32 %f250, %f249;
mov.f32 %f251, %f249;
@%p43 bra BB0_40;
mul.wide.s32 %rd67, %r24, 4;
add.s64 %rd68, %rd14, %rd67;
ld.global.f32 %f249, [%rd68];
add.s64 %rd70, %rd13, %rd67;
ld.global.f32 %f250, [%rd70];
add.s64 %rd72, %rd12, %rd67;
ld.global.f32 %f251, [%rd72];
BB0_40:
mul.f32 %f168, %f250, %f250;
fma.rn.f32 %f169, %f249, %f249, %f168;
fma.rn.f32 %f70, %f251, %f251, %f169;
setp.eq.f32 %p44, %f70, 0f00000000;
mov.u16 %rs38, %rs1;
@%p44 bra BB0_42;
cvt.s64.s32 %rd74, %r24;
add.s64 %rd75, %rd11, %rd74;
ld.global.u8 %rs38, [%rd75];
BB0_42:
setp.gt.u16 %p45, %rs38, %rs1;
cvt.u32.u16 %r125, %rs38;
and.b32 %r126, %r125, 255;
selp.b32 %r127, %r55, %r126, %p45;
selp.b32 %r128, %r126, %r55, %p45;
add.s32 %r129, %r128, 1;
mul.lo.s32 %r130, %r129, %r128;
shr.u32 %r131, %r130, 1;
add.s32 %r132, %r131, %r127;
mul.wide.s32 %rd77, %r132, 4;
add.s64 %rd78, %rd31, %rd77;
ld.global.f32 %f71, [%rd78];
add.s64 %rd80, %rd34, %rd77;
ld.global.f32 %f72, [%rd80];
and.pred %p48, %p44, %p14;
@%p48 bra BB0_46;
setp.neu.f32 %p49, %f70, 0f00000000;
@%p49 bra BB0_45;
mul.f32 %f170, %f72, 0f3F000000;
div.rn.f32 %f171, %f170, %f71;
mul.f32 %f172, %f171, %f100;
mul.f32 %f173, %f3, %f172;
sub.f32 %f250, %f2, %f173;
fma.rn.f32 %f251, %f2, %f172, %f3;
mov.f32 %f249, %f1;
BB0_45:
mul.f32 %f174, %f100, %f100;
add.f32 %f175, %f71, %f71;
div.rn.f32 %f176, %f175, %f174;
sub.f32 %f177, %f249, %f1;
sub.f32 %f178, %f250, %f2;
sub.f32 %f179, %f251, %f3;
fma.rn.f32 %f237, %f177, %f176, %f237;
fma.rn.f32 %f180, %f178, %f176, %f238;
fma.rn.f32 %f181, %f176, %f179, %f239;
div.rn.f32 %f182, %f72, %f100;
fma.rn.f32 %f238, %f251, %f182, %f180;
mul.f32 %f183, %f250, %f182;
sub.f32 %f239, %f181, %f183;
BB0_46:
setp.eq.s32 %p50, %r35, 1;
@%p50 bra BB0_54;
and.b16 %rs11, %rs12, 4;
setp.eq.s16 %p51, %rs11, 0;
add.s32 %r25, %r3, -1;
@%p51 bra BB0_49;
rem.s32 %r137, %r25, %r35;
add.s32 %r138, %r137, %r35;
rem.s32 %r217, %r138, %r35;
bra.uni BB0_50;
BB0_49:
mov.u32 %r139, 0;
max.s32 %r217, %r25, %r139;
BB0_50:
mad.lo.s32 %r144, %r217, %r34, %r2;
mad.lo.s32 %r149, %r144, %r33, %r1;
cvt.s64.s32 %rd82, %r149;
mul.wide.s32 %rd83, %r149, 4;
add.s64 %rd84, %rd14, %rd83;
add.s64 %rd86, %rd13, %rd83;
add.s64 %rd88, %rd12, %rd83;
ld.global.f32 %f184, [%rd84];
ld.global.f32 %f185, [%rd86];
mul.f32 %f186, %f185, %f185;
fma.rn.f32 %f187, %f184, %f184, %f186;
ld.global.f32 %f188, [%rd88];
fma.rn.f32 %f189, %f188, %f188, %f187;
setp.eq.f32 %p52, %f189, 0f00000000;
selp.f32 %f190, %f1, %f184, %p52;
selp.f32 %f191, %f2, %f185, %p52;
selp.f32 %f192, %f3, %f188, %p52;
add.s64 %rd90, %rd11, %rd82;
ld.global.u8 %rs30, [%rd90];
setp.gt.u16 %p53, %rs30, %rs1;
cvt.u32.u16 %r150, %rs30;
selp.b32 %r153, %r55, %r150, %p53;
selp.b32 %r154, %r150, %r55, %p53;
add.s32 %r155, %r154, 1;
mul.lo.s32 %r156, %r155, %r154;
shr.u32 %r157, %r156, 1;
add.s32 %r158, %r157, %r153;
mul.wide.s32 %rd92, %r158, 4;
add.s64 %rd93, %rd31, %rd92;
ld.global.f32 %f193, [%rd93];
add.f32 %f194, %f193, %f193;
mul.f32 %f84, %f101, %f101;
div.rn.f32 %f195, %f194, %f84;
sub.f32 %f196, %f190, %f1;
sub.f32 %f197, %f191, %f2;
sub.f32 %f198, %f192, %f3;
fma.rn.f32 %f85, %f195, %f196, %f237;
fma.rn.f32 %f86, %f195, %f197, %f238;
fma.rn.f32 %f87, %f195, %f198, %f239;
add.s32 %r29, %r3, 1;
@%p51 bra BB0_52;
rem.s32 %r163, %r29, %r35;
add.s32 %r164, %r163, %r35;
rem.s32 %r218, %r164, %r35;
bra.uni BB0_53;
BB0_52:
add.s32 %r165, %r35, -1;
min.s32 %r218, %r29, %r165;
BB0_53:
mad.lo.s32 %r170, %r218, %r34, %r2;
mad.lo.s32 %r175, %r170, %r33, %r1;
cvt.s64.s32 %rd95, %r175;
mul.wide.s32 %rd96, %r175, 4;
add.s64 %rd97, %rd14, %rd96;
add.s64 %rd99, %rd13, %rd96;
add.s64 %rd101, %rd12, %rd96;
ld.global.f32 %f199, [%rd97];
ld.global.f32 %f200, [%rd99];
mul.f32 %f201, %f200, %f200;
fma.rn.f32 %f202, %f199, %f199, %f201;
ld.global.f32 %f203, [%rd101];
fma.rn.f32 %f204, %f203, %f203, %f202;
setp.eq.f32 %p55, %f204, 0f00000000;
selp.f32 %f205, %f3, %f203, %p55;
selp.f32 %f206, %f2, %f200, %p55;
selp.f32 %f207, %f1, %f199, %p55;
add.s64 %rd103, %rd11, %rd95;
ld.global.u8 %rs33, [%rd103];
setp.gt.u16 %p56, %rs33, %rs1;
cvt.u32.u16 %r176, %rs33;
selp.b32 %r179, %r55, %r176, %p56;
selp.b32 %r180, %r176, %r55, %p56;
add.s32 %r181, %r180, 1;
mul.lo.s32 %r182, %r181, %r180;
shr.u32 %r183, %r182, 1;
add.s32 %r184, %r183, %r179;
mul.wide.s32 %rd105, %r184, 4;
add.s64 %rd106, %rd31, %rd105;
ld.global.f32 %f208, [%rd106];
add.f32 %f209, %f208, %f208;
div.rn.f32 %f210, %f209, %f84;
sub.f32 %f211, %f207, %f1;
sub.f32 %f212, %f206, %f2;
sub.f32 %f213, %f205, %f3;
fma.rn.f32 %f237, %f210, %f211, %f85;
fma.rn.f32 %f238, %f210, %f212, %f86;
fma.rn.f32 %f239, %f210, %f213, %f87;
BB0_54:
setp.eq.s64 %p57, %rd7, 0;
@%p57 bra BB0_56;
mad.lo.s32 %r198, %r45, %r33, %r1;
cvta.to.global.u64 %rd107, %rd7;
mul.wide.s32 %rd108, %r198, 4;
add.s64 %rd109, %rd107, %rd108;
ld.global.f32 %f214, [%rd109];
mul.f32 %f261, %f214, %f261;
BB0_56:
setp.eq.f32 %p58, %f261, 0f00000000;
mov.f32 %f262, 0f00000000;
@%p58 bra BB0_58;
rcp.rn.f32 %f262, %f261;
BB0_58:
mad.lo.s32 %r212, %r45, %r33, %r1;
cvta.to.global.u64 %rd110, %rd1;
mul.wide.s32 %rd111, %r212, 4;
add.s64 %rd112, %rd110, %rd111;
ld.global.f32 %f216, [%rd112];
fma.rn.f32 %f217, %f237, %f262, %f216;
st.global.f32 [%rd112], %f217;
cvta.to.global.u64 %rd113, %rd2;
add.s64 %rd114, %rd113, %rd111;
ld.global.f32 %f218, [%rd114];
fma.rn.f32 %f219, %f238, %f262, %f218;
st.global.f32 [%rd114], %f219;
cvta.to.global.u64 %rd115, %rd3;
add.s64 %rd116, %rd115, %rd111;
ld.global.f32 %f220, [%rd116];
fma.rn.f32 %f221, %f239, %f262, %f220;
st.global.f32 [%rd116], %f221;
BB0_59:
ret;
}
`
adddmi_ptx_32 = `
.version 6.5
.target sm_32
.address_size 64
// .globl adddmi
.visible .entry adddmi(
.param .u64 adddmi_param_0,
.param .u64 adddmi_param_1,
.param .u64 adddmi_param_2,
.param .u64 adddmi_param_3,
.param .u64 adddmi_param_4,
.param .u64 adddmi_param_5,
.param .u64 adddmi_param_6,
.param .f32 adddmi_param_7,
.param .u64 adddmi_param_8,
.param .u64 adddmi_param_9,
.param .u64 adddmi_param_10,
.param .f32 adddmi_param_11,
.param .f32 adddmi_param_12,
.param .f32 adddmi_param_13,
.param .u32 adddmi_param_14,
.param .u32 adddmi_param_15,
.param .u32 adddmi_param_16,
.param .u8 adddmi_param_17,
.param .u8 adddmi_param_18
)
{
.reg .pred %p<56>;
.reg .b16 %rs<37>;
.reg .f32 %f<263>;
.reg .b32 %r<128>;
.reg .b64 %rd<85>;
ld.param.u64 %rd7, [adddmi_param_0];
ld.param.u64 %rd8, [adddmi_param_1];
ld.param.u64 %rd9, [adddmi_param_2];
ld.param.u64 %rd11, [adddmi_param_3];
ld.param.u64 %rd12, [adddmi_param_4];
ld.param.u64 %rd13, [adddmi_param_5];
ld.param.u64 %rd10, [adddmi_param_6];
ld.param.f32 %f261, [adddmi_param_7];
ld.param.u64 %rd14, [adddmi_param_8];
ld.param.u64 %rd15, [adddmi_param_9];
ld.param.u64 %rd16, [adddmi_param_10];
ld.param.f32 %f99, [adddmi_param_11];
ld.param.f32 %f100, [adddmi_param_12];
ld.param.f32 %f101, [adddmi_param_13];
ld.param.u32 %r36, [adddmi_param_14];
ld.param.u32 %r37, [adddmi_param_15];
ld.param.u32 %r38, [adddmi_param_16];
ld.param.u8 %rs14, [adddmi_param_18];
ld.param.u8 %rs13, [adddmi_param_17];
cvta.to.global.u64 %rd1, %rd15;
cvta.to.global.u64 %rd2, %rd14;
cvta.to.global.u64 %rd3, %rd16;
cvta.to.global.u64 %rd4, %rd13;
cvta.to.global.u64 %rd5, %rd12;
cvta.to.global.u64 %rd6, %rd11;
mov.u32 %r39, %ntid.x;
mov.u32 %r40, %ctaid.x;
mov.u32 %r41, %tid.x;
mad.lo.s32 %r1, %r39, %r40, %r41;
mov.u32 %r42, %ntid.y;
mov.u32 %r43, %ctaid.y;
mov.u32 %r44, %tid.y;
mad.lo.s32 %r2, %r42, %r43, %r44;
mov.u32 %r45, %ntid.z;
mov.u32 %r46, %ctaid.z;
mov.u32 %r47, %tid.z;
mad.lo.s32 %r3, %r45, %r46, %r47;
setp.ge.s32 %p1, %r2, %r37;
setp.ge.s32 %p2, %r1, %r36;
or.pred %p3, %p1, %p2;
setp.ge.s32 %p4, %r3, %r38;
or.pred %p5, %p3, %p4;
@%p5 bra BB0_59;
mul.lo.s32 %r4, %r3, %r37;
add.s32 %r48, %r4, %r2;
mul.lo.s32 %r5, %r48, %r36;
add.s32 %r6, %r5, %r1;
mul.wide.s32 %rd17, %r6, 4;
add.s64 %rd18, %rd6, %rd17;
cvt.s64.s32 %rd19, %r6;
add.s64 %rd20, %rd5, %rd17;
add.s64 %rd21, %rd4, %rd17;
add.s64 %rd22, %rd3, %rd19;
ld.global.nc.u8 %rs1, [%rd22];
cvt.u32.u16 %r49, %rs1;
and.b32 %r7, %r49, 255;
ld.global.nc.f32 %f1, [%rd18];
ld.global.nc.f32 %f2, [%rd20];
mul.f32 %f102, %f2, %f2;
fma.rn.f32 %f103, %f1, %f1, %f102;
ld.global.nc.f32 %f3, [%rd21];
fma.rn.f32 %f104, %f3, %f3, %f103;
setp.eq.f32 %p6, %f104, 0f00000000;
@%p6 bra BB0_59;
and.b16 %rs2, %rs13, 1;
setp.eq.s16 %p7, %rs2, 0;
add.s32 %r8, %r1, -1;
@%p7 bra BB0_4;
rem.s32 %r50, %r8, %r36;
add.s32 %r51, %r50, %r36;
rem.s32 %r122, %r51, %r36;
bra.uni BB0_5;
BB0_4:
mov.u32 %r52, 0;
max.s32 %r122, %r8, %r52;
BB0_5:
add.s32 %r12, %r122, %r5;
setp.lt.s32 %p9, %r8, 0;
mov.f32 %f225, 0f00000000;
and.pred %p10, %p9, %p7;
mov.f32 %f226, %f225;
mov.f32 %f227, %f225;
@%p10 bra BB0_7;
mul.wide.s32 %rd23, %r12, 4;
add.s64 %rd24, %rd6, %rd23;
ld.global.nc.f32 %f225, [%rd24];
add.s64 %rd25, %rd5, %rd23;
ld.global.nc.f32 %f226, [%rd25];
add.s64 %rd26, %rd4, %rd23;
ld.global.nc.f32 %f227, [%rd26];
BB0_7:
mul.f32 %f108, %f226, %f226;
fma.rn.f32 %f109, %f225, %f225, %f108;
fma.rn.f32 %f10, %f227, %f227, %f109;
setp.eq.f32 %p11, %f10, 0f00000000;
mov.u16 %rs33, %rs1;
@%p11 bra BB0_9;
cvt.s64.s32 %rd27, %r12;
add.s64 %rd28, %rd3, %rd27;
ld.global.nc.u8 %rs33, [%rd28];
BB0_9:
setp.gt.u16 %p12, %rs33, %rs1;
cvt.u32.u16 %r53, %rs33;
and.b32 %r54, %r53, 255;
selp.b32 %r55, %r7, %r54, %p12;
selp.b32 %r56, %r54, %r7, %p12;
add.s32 %r57, %r56, 1;
mul.lo.s32 %r58, %r57, %r56;
shr.u32 %r59, %r58, 1;
add.s32 %r60, %r59, %r55;
mul.wide.s32 %rd29, %r60, 4;
add.s64 %rd30, %rd2, %rd29;
ld.global.nc.f32 %f11, [%rd30];
add.s64 %rd31, %rd1, %rd29;
ld.global.nc.f32 %f12, [%rd31];
setp.ne.s16 %p13, %rs14, 0;
mov.f32 %f237, 0f00000000;
and.pred %p15, %p11, %p13;
mov.f32 %f238, %f237;
mov.f32 %f239, %f237;
@%p15 bra BB0_13;
setp.neu.f32 %p16, %f10, 0f00000000;
@%p16 bra BB0_12;
mul.f32 %f113, %f12, 0f3F000000;
div.rn.f32 %f114, %f113, %f11;
mul.f32 %f115, %f114, %f99;
fma.rn.f32 %f225, %f3, %f115, %f1;
mul.f32 %f116, %f1, %f115;
sub.f32 %f227, %f3, %f116;
mov.f32 %f226, %f2;
BB0_12:
mul.f32 %f117, %f99, %f99;
add.f32 %f118, %f11, %f11;
div.rn.f32 %f119, %f118, %f117;
sub.f32 %f120, %f225, %f1;
sub.f32 %f121, %f226, %f2;
sub.f32 %f122, %f227, %f3;
fma.rn.f32 %f123, %f120, %f119, 0f00000000;
fma.rn.f32 %f238, %f121, %f119, 0f00000000;
fma.rn.f32 %f124, %f119, %f122, 0f00000000;
div.rn.f32 %f125, %f12, %f99;
mul.f32 %f126, %f227, %f125;
sub.f32 %f237, %f123, %f126;
fma.rn.f32 %f239, %f225, %f125, %f124;
BB0_13:
add.s32 %r13, %r1, 1;
@%p7 bra BB0_15;
rem.s32 %r61, %r13, %r36;
add.s32 %r62, %r61, %r36;
rem.s32 %r123, %r62, %r36;
bra.uni BB0_16;
BB0_15:
add.s32 %r63, %r36, -1;
min.s32 %r123, %r13, %r63;
BB0_16:
add.s32 %r17, %r123, %r5;
setp.ge.s32 %p18, %r13, %r36;
mov.f32 %f231, 0f00000000;
and.pred %p20, %p18, %p7;
mov.f32 %f232, %f231;
mov.f32 %f233, %f231;
@%p20 bra BB0_18;
mul.wide.s32 %rd32, %r17, 4;
add.s64 %rd33, %rd6, %rd32;
ld.global.nc.f32 %f231, [%rd33];
add.s64 %rd34, %rd5, %rd32;
ld.global.nc.f32 %f232, [%rd34];
add.s64 %rd35, %rd4, %rd32;
ld.global.nc.f32 %f233, [%rd35];
BB0_18:
mul.f32 %f130, %f232, %f232;
fma.rn.f32 %f131, %f231, %f231, %f130;
fma.rn.f32 %f30, %f233, %f233, %f131;
setp.eq.f32 %p21, %f30, 0f00000000;
mov.u16 %rs34, %rs1;
@%p21 bra BB0_20;
cvt.s64.s32 %rd36, %r17;
add.s64 %rd37, %rd3, %rd36;
ld.global.nc.u8 %rs34, [%rd37];
BB0_20:
setp.gt.u16 %p22, %rs34, %rs1;
cvt.u32.u16 %r64, %rs34;
and.b32 %r65, %r64, 255;
selp.b32 %r66, %r7, %r65, %p22;
selp.b32 %r67, %r65, %r7, %p22;
add.s32 %r68, %r67, 1;
mul.lo.s32 %r69, %r68, %r67;
shr.u32 %r70, %r69, 1;
add.s32 %r71, %r70, %r66;
mul.wide.s32 %rd38, %r71, 4;
add.s64 %rd39, %rd2, %rd38;
ld.global.nc.f32 %f31, [%rd39];
add.s64 %rd40, %rd1, %rd38;
ld.global.nc.f32 %f32, [%rd40];
and.pred %p25, %p21, %p13;