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I just want to make you aware of my project to create a full fledged VHDL parser in Rust: https://github.com/kraigher/rust_hdl. It can already parse 500kloc of the most popular VHDL repositories on Github in just 0.5 seconds.
The goal is to be able to use the parser in any tool that needs one. My first goal is to use it in a language server for VHDL.
It seems you have interest in this area and you are welcome to contribute if you want.
The text was updated successfully, but these errors were encountered:
I just want to make you aware of my project to create a full fledged VHDL parser in Rust: https://github.com/kraigher/rust_hdl. It can already parse 500kloc of the most popular VHDL repositories on Github in just 0.5 seconds.
The goal is to be able to use the parser in any tool that needs one. My first goal is to use it in a language server for VHDL.
It seems you have interest in this area and you are welcome to contribute if you want.
The text was updated successfully, but these errors were encountered: