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aspeed-g7.dtsi
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aspeed-g7.dtsi
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// SPDX-License-Identifier: GPL-2.0-or-later
#include <dt-bindings/clock/aspeed,ast2700-clk.h>
#include <dt-bindings/reset/aspeed,ast2700-reset.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/interrupt-controller/aspeed-scu-ic.h>
/ {
model = "Aspeed BMC";
compatible = "aspeed,ast2700";
#address-cells = <2>;
#size-cells = <2>;
interrupt-parent = <&gic>;
aliases {
serial0 = &uart0;
serial1 = &uart1;
serial2 = &uart2;
serial3 = &uart3;
serial4 = &uart4;
serial5 = &uart5;
serial6 = &uart6;
serial7 = &uart7;
serial8 = &uart8;
serial9 = &uart9;
serial10 = &uart10;
serial11 = &uart11;
serial12 = &uart12;
serial13 = &vuart0;
serial14 = &vuart1;
serial15 = &vuart2;
serial16 = &vuart3;
serial17 = &pcie_vuart0;
serial18 = &pcie_vuart1;
serial19 = &pcie_vuart2;
serial20 = &pcie_vuart3;
i2c0 = &i2c0;
i2c1 = &i2c1;
i2c2 = &i2c2;
i2c3 = &i2c3;
i2c4 = &i2c4;
i2c5 = &i2c5;
i2c6 = &i2c6;
i2c7 = &i2c7;
i2c8 = &i2c8;
i2c9 = &i2c9;
i2c10 = &i2c10;
i2c11 = &i2c11;
i2c12 = &i2c12;
i2c13 = &i2c13;
i2c14 = &i2c14;
i2c15 = &i2c15;
mdio0 = &mdio0;
mdio1 = &mdio1;
mdio2 = &mdio2;
video0 = &video0;
video1 = &video1;
rvas0 = &rvas0;
rvas1 = &rvas1;
xdma0 = &xdma0;
xdma1 = &xdma1;
};
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu@0 {
compatible = "arm,cortex-a35";
enable-method = "psci";
device_type = "cpu";
reg = <0>;
d-cache-size = <0x8000>;
d-cache-line-size = <64>;
d-cache-sets = <128>;
i-cache-size = <0x8000>;
i-cache-line-size = <64>;
i-cache-sets = <256>;
next-level-cache = <&l2>;
};
cpu@1 {
compatible = "arm,cortex-a35";
enable-method = "psci";
device_type = "cpu";
reg = <1>;
d-cache-size = <0x8000>;
d-cache-line-size = <64>;
d-cache-sets = <128>;
i-cache-size = <0x8000>;
i-cache-line-size = <64>;
i-cache-sets = <256>;
next-level-cache = <&l2>;
};
cpu@2 {
compatible = "arm,cortex-a35";
enable-method = "psci";
device_type = "cpu";
reg = <2>;
d-cache-size = <0x8000>;
d-cache-line-size = <64>;
d-cache-sets = <128>;
i-cache-size = <0x8000>;
i-cache-line-size = <64>;
i-cache-sets = <256>;
next-level-cache = <&l2>;
};
cpu@3 {
compatible = "arm,cortex-a35";
enable-method = "psci";
device_type = "cpu";
reg = <3>;
d-cache-size = <0x8000>;
d-cache-line-size = <64>;
d-cache-sets = <128>;
i-cache-size = <0x8000>;
i-cache-line-size = <64>;
i-cache-sets = <256>;
next-level-cache = <&l2>;
};
l2: l2-cache0 {
compatible = "cache";
cache-size = <0x80000>;
cache-line-size = <64>;
cache-sets = <1024>;
cache-level = <2>;
};
};
pmu {
compatible = "arm,cortex-a35-pmu";
interrupt-parent = <&gic>;
interrupts = <GIC_PPI 7 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
};
psci {
compatible = "arm,psci-1.0";
method = "smc";
};
gic: interrupt-controller@12200000 {
compatible = "arm,gic-v3";
interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
#interrupt-cells = <3>;
interrupt-controller;
interrupt-parent = <&gic>;
#redistributor-regions = <1>;
reg = <0 0x12200000 0 0x10000>, //GICD
<0 0x12280000 0 0x80000>, //GICR
<0 0x40440000 0 0x1000>; //GICC
};
timer {
compatible = "arm,armv8-timer";
interrupt-parent = <&gic>;
interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
arm,cpu-registers-not-fw-configured;
always-on;
};
soc0: soc@10000000 {
compatible = "simple-bus";
#address-cells = <2>;
#size-cells = <2>;
ranges;
soc0_sram: sram@10000000 {
compatible = "mmio-sram";
reg = <0x0 0x10000000 0x0 0x20000>; /* 128KiB SRAM on soc0 */
ranges = <0x0 0x0 0x0 0x10000000 0x0 0x20000>;
#address-cells = <2>;
#size-cells = <2>;
no-memory-wc;
exported@0 {
reg = <0 0x0 0 0x20000>;
export;
};
};
phy3a: phy3@12010000 {
compatible = "aspeed,ast2700-phy3a";
reg = <0x0 0x12010000 0x0 0x820>;
clocks = <&syscon0 AST2700_SOC0_CLK_GATE_USB0CLK>;
resets = <&syscon0 ASPEED_RESET_P0_PHY3>;
aspeed,scu = <&syscon0>;
status = "disabled";
};
vhuba1: usb-vhub@12011000 {
compatible = "aspeed,ast2700-usb-vhuba1";
reg = <0x0 0x12011000 0x0 0x350>;
interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&syscon0 AST2700_SOC0_CLK_GATE_USB0CLK>;
resets = <&syscon0 ASPEED_RESET_P0_VHUB2>;
aspeed,vhub-downstream-ports = <7>;
aspeed,vhub-generic-endpoints = <21>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usb2axhpd1_default>;
aspeed,device = <&pcie_device0>;
aspeed,scu = <&syscon0>;
status = "disabled";
};
phy2a: phy2@12011800 {
compatible = "aspeed,ast2700-phy2a";
reg = <0x0 0x12011800 0x0 0x10>;
ctrl = <0x4 0xbc001e00>; /* xHCI to vHub1 clock rate: 60MHz */
aspeed,scu = <&syscon0>;
status = "disabled";
};
phy3b: phy3@12020000 {
compatible = "aspeed,ast2700-phy3b";
reg = <0x0 0x12020000 0x0 0x820>;
clocks = <&syscon0 AST2700_SOC0_CLK_GATE_USB2CLK>;
resets = <&syscon0 ASPEED_RESET_P1_PHY3>;
aspeed,scu = <&syscon0>;
status = "disabled";
};
vhubb1: usb-vhub@12021000 {
compatible = "aspeed,ast2700-usb-vhubb1";
reg = <0x0 0x12021000 0x0 0x350>;
interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&syscon0 AST2700_SOC0_CLK_GATE_USB2CLK>;
resets = <&syscon0 ASPEED_RESET_P1_VHUB2>;
aspeed,vhub-downstream-ports = <7>;
aspeed,vhub-generic-endpoints = <21>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usb2bxhpd1_default>;
aspeed,device = <&pcie_device1>;
aspeed,scu = <&syscon0>;
status = "disabled";
};
phy2b: phy2@12021800 {
compatible = "aspeed,ast2700-phy2b";
reg = <0x0 0x12021800 0x0 0x10>;
ctrl = <0x4 0xbc001e00>; /* xHCI to vHub1 clock rate: 60MHz */
aspeed,scu = <&syscon0>;
status = "disabled";
};
xhci0: usb@12030000 {
compatible = "aspeed,ast2700-xhci", "snps,dwc3";
reg = <0x0 0x12030000 0x0 0x10000>;
interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&syscon0 AST2700_SOC0_CLK_GATE_USB0CLK>,
<&syscon0 AST2700_SOC0_CLK_U2PHY_REFCLK>,
<&syscon0 AST2700_SOC0_CLK_U2PHY_CLK12M>;
clock-names = "bus_early", "ref", "suspend";
resets = <&syscon0 ASPEED_RESET_P0_XHCI>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usb3axh_default &pinctrl_usb2axh_default>;
dr_mode = "host";
status = "disabled";
};
usb3ahp: usb3ahp {
compatible = "aspeed,ast2700-usb3ahp";
clocks = <&syscon0 AST2700_SOC0_CLK_GATE_USB0CLK>;
resets = <&syscon0 ASPEED_RESET_P0_XHCI>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usb3axhp_default>;
aspeed,device = <&pcie_device0>;
status = "disabled";
};
uhci: usb@12040000 {
compatible = "aspeed,ast2700-uhci", "generic-uhci";
reg = <0x0 0x12040000 0x0 0x100>;
interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
#ports = <2>;
clocks = <&syscon0 AST2700_SOC0_CLK_GATE_USB1CLK>;
resets = <&syscon0 ASPEED_RESET_USB11>;
status = "disabled";
};
xhci1: usb@12050000 {
compatible = "aspeed,ast2700-xhci", "snps,dwc3";
reg = <0x0 0x12050000 0x0 0x10000>;
interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&syscon0 AST2700_SOC0_CLK_GATE_USB2CLK>,
<&syscon0 AST2700_SOC0_CLK_U2PHY_REFCLK>,
<&syscon0 AST2700_SOC0_CLK_U2PHY_CLK12M>;
clock-names = "bus_early", "ref", "suspend";
resets = <&syscon0 ASPEED_RESET_P1_XHCI>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usb3bxh_default &pinctrl_usb2bxh_default>;
dr_mode = "host";
status = "disabled";
};
usb3bhp: usb3bhp {
compatible = "aspeed,ast2700-usb3bhp";
clocks = <&syscon0 AST2700_SOC0_CLK_GATE_USB2CLK>;
resets = <&syscon0 ASPEED_RESET_P1_XHCI>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usb3bxhp_default>;
aspeed,device = <&pcie_device1>;
status = "disabled";
};
vhuba0: usb-vhub@12060000 {
compatible = "aspeed,ast2700-usb-vhuba0";
reg = <0x0 0x12060000 0x0 0x350>;
interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&syscon0 AST2700_SOC0_CLK_GATE_USB0CLK>;
resets = <&syscon0 ASPEED_RESET_P0_USB2>;
aspeed,vhub-downstream-ports = <7>;
aspeed,vhub-generic-endpoints = <21>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usb2ad0_default>;
aspeed,device = <&pcie_device0>;
aspeed,scu = <&syscon0>;
status = "disabled";
};
ehci0: usb@12061000 {
compatible = "aspeed,ast2700-ehci", "generic-ehci";
reg = <0x0 0x12061000 0x0 0x100>;
interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&syscon0 AST2700_SOC0_CLK_GATE_USB0CLK>;
resets = <&syscon0 ASPEED_RESET_P0_USB2>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usb2ah_default>;
status = "disabled";
};
usb2ahp: usb2ahp {
compatible = "aspeed,ast2700-usb2ahp";
clocks = <&syscon0 AST2700_SOC0_CLK_GATE_USB0CLK>;
resets = <&syscon0 ASPEED_RESET_P0_USB2>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usb2ahp_default>;
aspeed,device = <&pcie_device0>;
status = "disabled";
};
vhubb0: usb-vhub@12062000 {
compatible = "aspeed,ast2700-usb-vhubb0";
reg = <0x0 0x12062000 0x0 0x350>;
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&syscon0 AST2700_SOC0_CLK_GATE_USB2CLK>;
resets = <&syscon0 ASPEED_RESET_P1_USB2>;
aspeed,vhub-downstream-ports = <7>;
aspeed,vhub-generic-endpoints = <21>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usb2bd0_default>;
aspeed,device = <&pcie_device1>;
aspeed,scu = <&syscon0>;
status = "disabled";
};
ehci1: usb@12063000 {
compatible = "aspeed,ast2700-ehci", "generic-ehci";
reg = <0x0 0x12063000 0x0 0x100>;
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&syscon0 AST2700_SOC0_CLK_GATE_USB2CLK>;
resets = <&syscon0 ASPEED_RESET_P1_USB2>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usb2bh_default>;
status = "disabled";
};
usb2bhp: usb2bhp {
compatible = "aspeed,ast2700-usb2bhp";
clocks = <&syscon0 AST2700_SOC0_CLK_GATE_USB2CLK>;
resets = <&syscon0 ASPEED_RESET_P1_USB2>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usb2bhp_default>;
aspeed,device = <&pcie_device1>;
status = "disabled";
};
rsss: crypto@12080000 {
compatible = "aspeed,ast2700-rsss";
reg = <0x0 0x12080000 0 0x1000>;
clocks = <&syscon0 AST2700_SOC0_CLK_GATE_RSACLK>;
interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
resets = <&syscon0 ASPEED_RESET_RSA>,
<&syscon0 ASPEED_RESET_SHA3>,
<&syscon0 ASPEED_RESET_SM3>,
<&syscon0 ASPEED_RESET_SM4>;
reset-names = "rsa", "sha3", "sm3", "sm4";
status = "disabled";
};
emmc_controller: sdc@12090000 {
compatible = "aspeed,ast2600-sd-controller";
reg = <0 0x12090000 0 0x100>;
#address-cells = <2>;
#size-cells = <2>;
ranges = <0 0 0 0x12090000 0 0x10000>;
clocks = <&syscon0 AST2700_SOC0_CLK_GATE_EMMCCLK>;
resets = <&syscon0 ASPEED_RESET_EMMC>;
status = "disable";
emmc: sdhci@12090100 {
compatible = "aspeed,ast2600-emmc";
reg = <0 0x100 0 0x100>;
sdhci,auto-cmd12;
interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&syscon0 AST2700_SOC0_CLK_GATE_EMMCCLK>;
pinctrl-names = "default";
status = "disable";
};
};
ufs_controller: cnr@12c08000 {
compatible = "aspeed,ast2700-ufscnr";
reg = <0 0x12c08000 0 0x100>;
#address-cells = <2>;
#size-cells = <2>;
ranges = <0 0 0 0x12c08000 0 0x300>;
clocks = <&syscon0 AST2700_SOC0_CLK_GATE_UFSCLK>;
resets = <&syscon0 ASPEED_RESET_UFS>;
status = "disable";
ufs: ufshc@12c08200 {
compatible = "aspeed,ast2700-ufshc";
reg = <0 0x200 0 0x100>;
interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&syscon0 AST2700_SOC0_CLK_AXI1>;
clock-names = "core_clk";
freq-table-hz = <0 0>;
status = "disable";
};
};
soc0_intc: interrupt-controller@12100000 {
compatible = "simple-mfd";
reg = <0 0x12100000 0 0x4000>;
#address-cells = <2>;
#size-cells = <2>;
ranges = <0x0 0x0 0x0 0x12100000 0x0 0x4000>;
soc0_intc0: interrupt-controller@1000 {
#interrupt-cells = <1>;
interrupt-controller;
compatible = "aspeed,ast2700-intc-ic";
reg = <0x0 0x1000 0x0 0x10>;
interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>;
};
soc0_intc1: interrupt-controller@1100 {
#interrupt-cells = <1>;
interrupt-controller;
compatible = "aspeed,ast2700-intc-ic";
reg = <0x0 0x1100 0x0 0x10>;
interrupts = <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>;
};
soc0_intc2: interrupt-controller@1200 {
#interrupt-cells = <1>;
interrupt-controller;
compatible = "aspeed,ast2700-intc-ic";
reg = <0x0 0x1200 0x0 0x10>;
interrupts = <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
};
soc0_intc3: interrupt-controller@1300 {
#interrupt-cells = <1>;
interrupt-controller;
compatible = "aspeed,ast2700-intc-ic";
reg = <0x0 0x1300 0x0 0x10>;
interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
};
soc0_intc4: interrupt-controller@1400 {
#interrupt-cells = <1>;
interrupt-controller;
compatible = "aspeed,ast2700-intc-ic";
reg = <0x0 0x1400 0x0 0x10>;
interrupts = <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>;
};
soc0_intc5: interrupt-controller@1500 {
#interrupt-cells = <1>;
interrupt-controller;
compatible = "aspeed,ast2700-intc-ic";
reg = <0x0 0x1500 0x0 0x10>;
interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
};
soc0_intc6: interrupt-controller@1600 {
#interrupt-cells = <1>;
interrupt-controller;
compatible = "aspeed,ast2700-intc-ic";
reg = <0x0 0x1600 0x0 0x10>;
interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>;
};
soc0_intc7: interrupt-controller@1700 {
#interrupt-cells = <1>;
interrupt-controller;
compatible = "aspeed,ast2700-intc-ic";
reg = <0x0 0x1700 0x0 0x10>;
interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>;
};
soc0_intc8: interrupt-controller@1800 {
#interrupt-cells = <1>;
interrupt-controller;
compatible = "aspeed,ast2700-intc-ic";
reg = <0x0 0x1800 0x0 0x10>;
interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
};
soc0_intc_global: interrupt-controller@1900 {
#interrupt-cells = <1>;
interrupt-controller;
compatible = "aspeed,ast2700-intc-icv2";
reg = <0x0 0x1900 0x0 0x10>;
interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 195 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
};
};
bmc_dev0: bmc_dev@12110000 {
compatible = "aspeed,ast2600-bmc-device";
reg = <0x0 0x12110000 0x0 0xb000>;
interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
aspeed,config = <&pcie_config0>;
aspeed,device = <&pcie_device0>;
aspeed,e2m = <&e2m_config0>;
pcie2lpc;
status = "disabled";
};
bmc_dev1: bmc_dev@12120000 {
compatible = "aspeed,ast2600-bmc-device";
reg = <0x0 0x12120000 0x0 0xb000>;
interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
aspeed,config = <&pcie_config1>;
aspeed,device = <&pcie_device1>;
aspeed,e2m = <&e2m_config1>;
pcie2lpc;
status = "disabled";
};
syscon0: syscon@12c02000 {
compatible = "aspeed,ast2700-scu0", "syscon", "simple-mfd";
reg = <0x0 0x12c02000 0x0 0x1000>;
ranges = <0x0 0x0 0 0x12c02000 0 0x1000>;
#address-cells = <2>;
#size-cells = <2>;
#clock-cells = <1>;
#reset-cells = <1>;
silicon-id@0 {
compatible = "aspeed,ast2700-silicon-id", "aspeed,silicon-id";
reg = <0 0x0 0 0x4>;
};
scu_ic0: interrupt-controller@1D0 {
#interrupt-cells = <1>;
compatible = "aspeed,ast2700-scu-ic0";
reg = <0 0x1d0 0 0xc>;
interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
interrupt-controller;
};
scu_ic1: interrupt-controller@1E0 {
#interrupt-cells = <1>;
compatible = "aspeed,ast2700-scu-ic1";
reg = <0 0x1e0 0 0xc>;
interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
interrupt-controller;
};
soc0_rst: reset-controller@200 {
reg = <0 0x200 0 0x40>;
};
soc0_clk: clock-controller@240 {
reg = <0 0x240 0 0x1c0>;
};
pinctrl0: pinctrl@400 {
compatible = "aspeed,ast2700-soc0-pinctrl";
reg = <0 0x400 0 0x100>;
};
};
pcie_config0: pcie_config@12c02960 {
compatible = "syscon", "simple-mfd";
reg = <0 0x12c02960 0 0x40>;
};
pcie_config1: pcie_config@12c029a0 {
compatible = "syscon", "simple-mfd";
reg = <0 0x12c029a0 0 0x40>;
};
pcie_device0: pcie_device@12c02a00 {
compatible = "syscon", "simple-mfd";
reg = <0 0x12c02a00 0 0x80>;
};
pcie_device1: pcie_device@12c02a80 {
compatible = "syscon", "simple-mfd";
reg = <0 0x12c02a80 0 0x80>;
};
mctp0: mctp0@12c06000 {
compatible = "aspeed,ast2700-mctp0";
reg = <0x0 0x12c06000 0x0 0x40>;
interrupts-extended = <&gic GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>, <&scu_ic0 ASPEED_AST2700_SCU_IC0_PCIE_PERST_LO_TO_HI>;
interrupt-names = "mctp", "pcie";
resets = <&syscon0 ASPEED_RESET_MCTP0>;
aspeed,scu = <&syscon0>;
aspeed,pcieh = <&pcie_phy0>;
status = "disabled";
};
mctp1: mctp1@12c07000 {
compatible = "aspeed,ast2700-mctp1";
reg = <0x0 0x12c07000 0x0 0x40>;
interrupts-extended = <&gic GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>, <&scu_ic1 ASPEED_AST2700_SCU_IC1_PCIE_RCRST_LO_TO_HI>;
interrupt-names = "mctp", "pcie";
resets = <&syscon0 ASPEED_RESET_MCTP1>;
aspeed,scu = <&syscon0>;
aspeed,pcieh = <&pcie_phy1>;
status = "disabled";
};
display_port: dp@12c0a000 {
compatible = "aspeed,ast2700-displayport", "syscon";
reg = <0x0 0x12c0a000 0x0 0x200>;
status = "disabled";
};
display_port_mcu: dpmcu@11000000 {
compatible = "aspeed,ast2700-displayport-mcu", "syscon";
reg = <0x0 0x11000000 0x0 0xf00>;
status = "disabled";
};
gfx: display@12c09000 {
compatible = "aspeed,ast2700-gfx", "syscon";
reg = <0 0x12c09000 0 0x100>;
reg-io-width = <4>;
clocks = <&syscon0 AST2700_SOC0_CLK_CRT1>;
resets = <&syscon0 ASPEED_RESET_CRT0>;
syscon = <&syscon0>;
status = "disabled";
interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
};
disp_intf: disp_intf {
compatible = "aspeed,ast2700-disp-intf", "syscon";
reg = <0x0 0x12c1d000 0x0 0x40>;
syscon = <&syscon0>;
status = "disabled";
};
rtc: rtc@12c0f000 {
compatible = "aspeed,ast2700-rtc";
reg = <0 0x12c0f000 0 0x18>;
interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
pcie_phy0: pcie_phy@12c15000 {
compatible = "aspeed,ast2700-pcie-phy", "syscon";
reg = <0x0 0x12c15000 0x0 0x800>;
};
pcie_phy1: rc_bridge@12c15800 {
compatible = "aspeed,ast2700-pcie-phy", "syscon";
reg = <0x0 0x12c15800 0x0 0x800>;
};
pcie_vuart0: serial@12c18000 {
compatible = "aspeed,ast2600-uart";
reg = <0x0 0x12c18000 0x0 0x40>;
interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&syscon0 AST2700_SOC0_CLK_APB>;
virtual;
status = "disabled";
};
pcie_vuart1: serial@12c18100 {
compatible = "aspeed,ast2600-uart";
reg = <0x0 0x12c18100 0x0 0x40>;
interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&syscon0 AST2700_SOC0_CLK_APB>;
virtual;
status = "disabled";
};
pcie_vuart2: serial@12c18200 {
compatible = "aspeed,ast2600-uart";
reg = <0x0 0x12c18200 0x0 0x40>;
interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&syscon0 AST2700_SOC0_CLK_APB>;
virtual;
status = "disabled";
};
pcie_vuart3: serial@12c18300 {
compatible = "aspeed,ast2600-uart";
reg = <0x0 0x12c18300 0x0 0x40>;
interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&syscon0 AST2700_SOC0_CLK_APB>;
virtual;
status = "disabled";
};
pcie_lpc0: pcie-lpc@12c19000 {
compatible = "aspeed,ast2700-lpc", "simple-mfd", "syscon";
reg = <0x0 0x12c19000 0x0 0x800>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0x0 0x12c19000 0x800>;
pcie_lpc0_kcs0: pcie-kcs@24 {
compatible = "aspeed,ast2700-kcs-bmc";
reg = <0x24 0x1>, <0x30 0x1>, <0x3c 0x1>;
interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
pcie_lpc0_kcs1: pcie-kcs@28 {
compatible = "aspeed,ast2700-kcs-bmc";
reg = <0x28 0x1>, <0x34 0x1>, <0x40 0x1>;
interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
pcie_lpc0_kcs2: pcie-kcs@2c {
compatible = "aspeed,ast2700-kcs-bmc";
reg = <0x2c 0x1>, <0x38 0x1>, <0x44 0x1>;
interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
pcie_lpc0_kcs3: pcie-kcs@114 {
compatible = "aspeed,ast2700-kcs-bmc";
reg = <0x114 0x1>, <0x118 0x1>, <0x11c 0x1>;
interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
pcie_lpc0_snoop: pcie-snoop@80 {
compatible = "aspeed,ast2700-lpc-snoop";
reg = <0x80 0x80>;
interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
pcie_lpc0_pcc: pcie-pcc@0 {
compatible = "aspeed,ast2700-lpc-pcc";
reg = <0x0 0x140>;
interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
pcie_lpc0_ibt: pcie_ibt@140 {
compatible = "aspeed,ast2700-ibt-bmc";
reg = <0x140 0x18>;
interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
};
pcie_lpc1: pcie-lpc@12c19800 {
compatible = "aspeed,ast2700-lpc", "simple-mfd", "syscon";
reg = <0x0 0x12c19800 0x0 0x800>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0x0 0x12c19800 0x800>;
pcie_lpc1_kcs0: pcie-kcs@24 {
compatible = "aspeed,ast2700-kcs-bmc";
reg = <0x24 0x1>, <0x30 0x1>, <0x3c 0x1>;
interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
pcie_lpc1_kcs1: pcie-kcs@28 {
compatible = "aspeed,ast2700-kcs-bmc";
reg = <0x28 0x1>, <0x34 0x1>, <0x40 0x1>;
interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
pcie_lpc1_kcs2: pcie-kcs@2c {
compatible = "aspeed,ast2700-kcs-bmc";
reg = <0x2c 0x1>, <0x38 0x1>, <0x44 0x1>;
interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
pcie_lpc1_kcs3: pcie-kcs@114 {
compatible = "aspeed,ast2700-kcs-bmc";
reg = <0x114 0x1>, <0x118 0x1>, <0x11c 0x1>;
interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
pcie_lpc1_snoop: pcie-snoop@80 {
compatible = "aspeed,ast2700-lpc-snoop";
reg = <0x80 0x80>;
interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
pcie_lpc1_pcc: pcie-pcc@0 {
compatible = "aspeed,ast2700-lpc-pcc";
reg = <0x0 0x140>;
interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
pcie_lpc1_ibt: pcie_ibt@140 {
compatible = "aspeed,ast2700-ibt-bmc";
reg = <0x140 0x18>;
interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
};
uart4: serial@12c1a000 {
compatible = "aspeed,ast2700-uart";
reg = <0x0 0x12c1a000 0x0 0x1000>;
reg-shift = <2>;
reg-io-width = <4>;
clocks = <&syscon0 AST2700_SOC0_CLK_GATE_UART4CLK>;
interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
no-loopback-test;
status = "disabled";
};
ecdsa: crypto@12c1e000 {
compatible = "aspeed,ast2700-ecdsa";
reg = <0x0 0x12c1e000 0x0 0x1000>;
interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&syscon0 AST2700_SOC0_CLK_GATE_ECCCLK>;
resets = <&syscon0 ASPEED_RESET_HACE>;
status = "disabled";
};
jtag0: jtag@12c20000 {
compatible = "aspeed,ast2700-jtag";
reg= <0x0 0x12c20000 0x0 0x40>;
interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&syscon0 AST2700_SOC0_CLK_APB>;
resets = <&syscon0 ASPEED_RESET_JTAG0>;
status = "disabled";
};
e2m_config0: e2m_config@12c21000 {
compatible = "syscon", "simple-mfd";
reg = <0 0x12c21000 0 0x200>;
};
e2m_config1: e2m_config@12c22000 {
compatible = "syscon", "simple-mfd";
reg = <0 0x12c22000 0 0x200>;
};
hace: crypto@12070000 {
compatible = "aspeed,ast2700-hace";
reg = <0x0 0x12070000 0x0 0x200>;
interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&syscon0 AST2700_SOC0_CLK_GATE_YCLK>;
resets = <&syscon0 ASPEED_RESET_HACE>;
status = "disabled";
};
video0: video@120a0000 {
compatible = "aspeed,ast2700-video-engine", "syscon";
reg = <0x0 0x120a0000 0x0 0x400>;
clocks = <&syscon0 AST2700_SOC0_CLK_GATE_VCLK>,
<&syscon0 AST2700_SOC0_CLK_GATE_ECLK>;
clock-names = "vclk", "eclk";
interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
resets = <&syscon0 ASPEED_RESET_VIDEO>;
aspeed,scu = <&syscon0>;
status = "disabled";
};
video1: video@120a1000 {
compatible = "aspeed,ast2700-video-engine";
reg = <0x0 0x120a1000 0x0 0x400>,
<0x0 0x12c14800 0x0 0x100>;
clocks = <&syscon0 AST2700_SOC0_CLK_GATE_VCLK>,
<&syscon0 AST2700_SOC0_CLK_GATE_ECLK>;
clock-names = "vclk", "eclk";
interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
resets = <&syscon0 ASPEED_RESET_VIDEO>;
aspeed,scu = <&syscon0>;
aspeed,video0 = <&video0>;
status = "disabled";
};
rvas0: rvas@120b8000 {
compatible = "aspeed,ast2700-rvas";
reg = <0x0 0x120b8000 0x0 0x800>,
<0x0 0x12c14000 0x0 0x800>,
<0x0 0x120a0000 0x0 0x1000>;
clocks = <&syscon0 AST2700_SOC0_CLK_GATE_RVAS0CLK>,
<&syscon0 AST2700_SOC0_CLK_GATE_VCLK>,
<&syscon0 AST2700_SOC0_CLK_GATE_ECLK>;
clock-names = "rvasclk", "vclk", "eclk";
interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
resets = <&syscon0 ASPEED_RESET_RVAS0>, <&syscon0 ASPEED_RESET_VIDEO>;
status = "disabled";
};
rvas1: rvas@120bc000 {
compatible = "aspeed,ast2700-rvas";
reg = <0x0 0x120bc000 0x0 0x800>,
<0x0 0x12c14800 0x0 0x800>,
<0x0 0x120a1000 0x0 0x1000>;
clocks = <&syscon0 AST2700_SOC0_CLK_GATE_RVAS1CLK>,
<&syscon0 AST2700_SOC0_CLK_GATE_VCLK>,
<&syscon0 AST2700_SOC0_CLK_GATE_ECLK>;
clock-names = "rvas2clk", "vclk", "eclk";
interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
resets = <&syscon0 ASPEED_RESET_RVAS1>, <&syscon0 ASPEED_RESET_VIDEO>;
status = "disabled";
};
xdma0: xdma@12c04000 {
compatible = "aspeed,ast2700-xdma0";
reg = <0x0 0x12c04000 0x0 0x100>;
clocks = <&syscon0 AST2700_SOC0_CLK_GATE_BCLK>;
resets = <&syscon0 ASPEED_RESET_XDMA0>;
reset-names = "device";
interrupts-extended = <&gic GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
<&scu_ic0 ASPEED_AST2700_SCU_IC0_PCIE_PERST_LO_TO_HI>;
aspeed,pcie-device = "bmc";
aspeed,scu = <&syscon0>;
status = "disabled";
};
xdma1: xdma@12c05000 {
compatible = "aspeed,ast2700-xdma1";
reg = <0x0 0x12c05000 0x0 0x100>;
clocks = <&syscon0 AST2700_SOC0_CLK_GATE_BCLK>;
resets = <&syscon0 ASPEED_RESET_XDMA1>;
reset-names = "device";
interrupts-extended = <&gic GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
<&scu_ic1 ASPEED_AST2700_SCU_IC1_PCIE_RCRST_LO_TO_HI>;
aspeed,pcie-device = "bmc";
aspeed,scu = <&syscon0>;
status = "disabled";
};
};
soc1: soc@14000000 {
compatible = "simple-bus";
#address-cells = <2>;
#size-cells = <2>;
ranges;
fmc: spi@14000000 {
reg = <0x0 0x14000000 0x0 0xc4>, <0x1 0x00000000 0x0 0x80000000>;
#address-cells = <1>;
#size-cells = <0>;
compatible = "aspeed,ast2700-fmc";
status = "disabled";
clocks = <&syscon1 AST2700_SOC1_CLK_AHB>;
num-cs = <3>;
flash@0 {
reg = < 0 >;
compatible = "jedec,spi-nor";
spi-max-frequency = <50000000>;
spi-rx-bus-width = <2>;
status = "disabled";
};
flash@1 {
reg = < 1 >;
compatible = "jedec,spi-nor";
spi-max-frequency = <50000000>;
spi-rx-bus-width = <2>;
status = "disabled";
};
flash@2 {
reg = < 2 >;