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Test plan for LAG on Distributed VOQ System #3033
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@eswaranb - please add Arista reviewers |
retest vs image please |
retest vs image please |
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retest vs image please |
retest vs image please |
@yxieca, Could you help merge this test plan? The failures in the test case are unrelated to this commit. And this was presented in the test community last week. Thanks. |
@yxieca @wangxin , @saravanansv - could you please take a look, thanks. |
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Verify that when a LAG is dynamically deleted via CLI on an ASIC, it is removed in remote ASIC_DB. | ||
### Test Steps | ||
* Delete an existing LAG from any ASIC in the OC topology |
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What is OC topology
?
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OC topology was to refer Open community topology, I have removed 'OC topology'.
What is the motivation for this PR? This is the test plan for LAG on SONIC Distributed VOQ System, as described in the VOQ LAG HLD (https://github.com/Azure/SONiC/blob/2e05c6b8ac570fd237484a18e732a58eec004b9c/doc/voq/lag_hld.md) The PR covered in this test plan is Distributed VOQ LAG HLD PR 697 (https://github.com/Azure/SONiC/pull/697/files#diff-77ea0c16b4ae9885fa0e388e81f6343c6bda0f24b999f93e64fcee8467df63fc) The scope of this test plan is as follows: * Check for unique SYSTEM_LAG_ID per LAG in a chassis with multiple line cards * Check if LAG is learned by local and remote ASIC This test plan does not cover functioning of LAG as an IP/Layer3 endpoint as that is outside the scope of the code PR. How did you do it? Based on the code changes based on the associated PR Any platform specific information? This is valid only on VOQ systems. Co-authored-by: falodiya <renu.falodiy@nokia.com>
What is the motivation for this PR? This is the test plan for LAG on SONIC Distributed VOQ System, as described in the VOQ LAG HLD (https://github.com/Azure/SONiC/blob/2e05c6b8ac570fd237484a18e732a58eec004b9c/doc/voq/lag_hld.md) The PR covered in this test plan is Distributed VOQ LAG HLD PR 697 (https://github.com/Azure/SONiC/pull/697/files#diff-77ea0c16b4ae9885fa0e388e81f6343c6bda0f24b999f93e64fcee8467df63fc) The scope of this test plan is as follows: * Check for unique SYSTEM_LAG_ID per LAG in a chassis with multiple line cards * Check if LAG is learned by local and remote ASIC This test plan does not cover functioning of LAG as an IP/Layer3 endpoint as that is outside the scope of the code PR. How did you do it? Based on the code changes based on the associated PR Any platform specific information? This is valid only on VOQ systems. Co-authored-by: falodiya <renu.falodiy@nokia.com>
Description of PR
The PR is to introduced LAG on VOQ
Summary:
Fixes # (issue)
Type of change
Approach
What is the motivation for this PR?
This is the test plan for LAG on SONIC Distributed VOQ System, as described in the VOQ LAG HLD
The PR covered in this test plan is Distributed VOQ LAG HLD PR 697
The scope of this test plan is as follows:
This test plan does not cover functioning of LAG as an IP/Layer3 endpoint as that is outside the scope of the code PR.
How did you do it?
Based on the code changes based on the associated PR
How did you verify/test it?
Any platform specific information?
This is valid only on VOQ systems.
Supported testbed topology if it's a new test case?
Documentation