SBOX

AES SBOX evaluation

Source files

• the src directory contains the SBOX source files in different formats
  • the original VHDL file was converted to Verilog by vhd2vl
  • the BLIF file was synthesized by yosys
  • the AAG file was written by abc
• the layout directory contains the (post-)layout files
  • (post-)layout source files are provided in form readable by open source tools, namely Magic, ngSPICE and [qflow](https://github.com/RTimothyEdwards/qflow
  • Magic was used to generate SPICE netlist
  • the cell maping procedure was done by a custom tool TSaCt2 using AAG source file as input
  • technology node is TSMC 180nm
• protected cells PAND2X1 and POR2X1 were drawn by Magic
  • the LEF descriptions were exported by Magic built-in commands, customized by hand (offsets, etc.) and incorporated into the custom version of the OSU018 library
  • the custom technology file allowing direct usage of the (annotated !! be careful with drain/source identification - this must be done manually !! )SPICE netlist exported by Magic (since Magic v8.3.48) is provided

SPICE Tests

Circuit type	SPICE test	Description	BLIF map file	Magic file	SPICE netlist
singleRail	test001	The single-rail circuit implemented by 2-input NAND and NOR gates and inverters only	singleRail.blif	singleRail.mag	singleRail.spice
dualRailAS	test002	The dual-rail circuit (with alternating spacer) implemented by 2-input NAND and NOR gates only	dualRailAS.blif	dualRailAS.mag	dualRailAS.spice
dualRail	test003	The dual-rail circuit implemented by by 2-input AND and OR gates only	dualRail.blif	dualRail.mag	dualRail.spice
pDualRail	test004	The dual-rail circuit implemented by protected AND and OR gates only	pDualRail.blif	pDualRail.mag	pDualRail.spice
secLibDualRail	test005	The dual-rail circuit implemented by dual-rail secLib gates	secLibDualRail.blif	secLibDualRail.mag	secLibDualRail.spice

The pDualRail and secLibDualRail netlists are huge; thus these netlists were partitioned by a custom tool and simulated "per-partes". All partitions of pDualRail can be simulated by the upstream ngSPICE. The secLibDualRail partitions tend to have huge subcircuit interfaces exceeding the ngSPICE limits: modified version of ngSPICE must be used (N_GLOBAL_NODES define was increased from 1005 to 10000).

Generate SBOX Inputs

$ bash gen_SBOX_inputs.sh
$ bash gen_SBOX_dinputs.sh

Run Simulation(s)

START=0   # SBOX input begin
START=255 # SBOX input end
PWR=300   # 300mW laser power
TEST="test001_SBOX"

$ bash test00X_runner.sh ${PWR} ${START} ${STOP} ${TEST}