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arch.c
3599 lines (3341 loc) · 137 KB
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arch.c
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/* **********************************************************
* Copyright (c) 2010-2017 Google, Inc. All rights reserved.
* Copyright (c) 2000-2010 VMware, Inc. All rights reserved.
* **********************************************************/
/*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* * Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* * Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* * Neither the name of VMware, Inc. nor the names of its contributors may be
* used to endorse or promote products derived from this software without
* specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL VMWARE, INC. OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
* DAMAGE.
*/
/* Copyright (c) 2003-2007 Determina Corp. */
/* Copyright (c) 2001-2003 Massachusetts Institute of Technology */
/* Copyright (c) 2000-2001 Hewlett-Packard Company */
/*
* arch.c - x86 architecture specific routines
*/
#include "../globals.h"
#include "../link.h"
#include "../fragment.h"
#include "arch.h"
#include "instr.h"
#include "instr_create.h"
#include "decode.h"
#include "decode_fast.h"
#include "../fcache.h"
#include "proc.h"
#include "instrument.h"
#include <string.h> /* for memcpy */
#if defined(DEBUG) || defined(INTERNAL)
# include "disassemble.h"
#endif
/* in interp.c */
void interp_init(void);
void interp_exit(void);
/* Thread-shared generated routines.
* We don't allocate the shared_code statically so that we can mark it
* executable.
*/
generated_code_t *shared_code = NULL;
#if defined(X86) && defined(X64)
/* PR 282576: For WOW64 processes we need context switches that swap between 64-bit
* mode and 32-bit mode when executing 32-bit code cache code, as well as
* 32-bit-targeted IBL routines for performance.
*/
generated_code_t *shared_code_x86 = NULL;
/* In x86_to_x64 we can use the extra registers as scratch space.
* The IBL routines are 64-bit and they use r8-r10 freely.
*/
generated_code_t *shared_code_x86_to_x64 = NULL;
#endif
static int syscall_method = SYSCALL_METHOD_UNINITIALIZED;
byte *app_sysenter_instr_addr = NULL;
#ifdef LINUX
static bool sysenter_hook_failed = false;
#endif
/* static functions forward references */
static byte *
emit_ibl_routines(dcontext_t *dcontext, generated_code_t *code,
byte *pc, byte *fcache_return_pc,
ibl_source_fragment_type_t source_fragment_type,
bool thread_shared,
bool target_trace_table,
ibl_code_t ibl_code[]);
static byte *
emit_syscall_routines(dcontext_t *dcontext, generated_code_t *code, byte *pc,
bool thread_shared);
int
reg_spill_tls_offs(reg_id_t reg)
{
switch (reg) {
case SCRATCH_REG0: return TLS_REG0_SLOT;
case SCRATCH_REG1: return TLS_REG1_SLOT;
case SCRATCH_REG2: return TLS_REG2_SLOT;
case SCRATCH_REG3: return TLS_REG3_SLOT;
#ifdef AARCH64
case SCRATCH_REG4: return TLS_REG4_SLOT;
case SCRATCH_REG5: return TLS_REG5_SLOT;
#endif
}
/* don't assert if another reg passed: used on random regs looking for spills */
return -1;
}
/* For Thumb, we store all the entry points with LSB=0 and rely on anyone
* targeting them to use PC_AS_JMP_TGT().
*/
#ifdef INTERNAL
/* routine can be used for dumping both thread private and the thread shared routines */
static void
dump_emitted_routines(dcontext_t *dcontext, file_t file,
const char *code_description,
generated_code_t *code, byte *emitted_pc)
{
byte *last_pc;
/* FIXME i#1551: merge w/ GENCODE_IS_X86 below */
# if defined(X86) && defined(X64)
if (GENCODE_IS_X86(code->gencode_mode)) {
/* parts of x86 gencode are 64-bit but it's hard to know which here
* so we dump all as x86
*/
set_x86_mode(dcontext, true/*x86*/);
}
# endif
print_file(file, "%s routines created:\n", code_description);
{
last_pc = code->gen_start_pc;
do {
const char *ibl_brtype;
const char *ibl_name = get_ibl_routine_name(dcontext, last_pc, &ibl_brtype);
# ifdef WINDOWS
/* must test first, as get_ibl_routine_name will think "bb_ibl_indjmp" */
if (last_pc == code->unlinked_shared_syscall)
print_file(file, "unlinked_shared_syscall:\n");
else if (last_pc == code->shared_syscall)
print_file(file, "shared_syscall:\n");
else
# endif
if (ibl_name)
print_file(file, "%s_%s:\n", ibl_name, ibl_brtype);
else if (last_pc == code->fcache_enter)
print_file(file, "fcache_enter:\n");
else if (last_pc == code->fcache_return)
print_file(file, "fcache_return:\n");
else if (last_pc == code->do_syscall)
print_file(file, "do_syscall:\n");
# ifdef ARM
else if (last_pc == code->fcache_enter_gonative)
print_file(file, "fcache_enter_gonative:\n");
# endif
# ifdef WINDOWS
else if (last_pc == code->fcache_enter_indirect)
print_file(file, "fcache_enter_indirect:\n");
else if (last_pc == code->do_callback_return)
print_file(file, "do_callback_return:\n");
# else
else if (last_pc == code->do_int_syscall)
print_file(file, "do_int_syscall:\n");
else if (last_pc == code->do_int81_syscall)
print_file(file, "do_int81_syscall:\n");
else if (last_pc == code->do_int82_syscall)
print_file(file, "do_int82_syscall:\n");
else if (last_pc == code->do_clone_syscall)
print_file(file, "do_clone_syscall:\n");
# ifdef VMX86_SERVER
else if (last_pc == code->do_vmkuw_syscall)
print_file(file, "do_vmkuw_syscall:\n");
# endif
# endif
# ifdef UNIX
else if (last_pc == code->new_thread_dynamo_start)
print_file(file, "new_thread_dynamo_start:\n");
# endif
# ifdef TRACE_HEAD_CACHE_INCR
else if (last_pc == code->trace_head_incr)
print_file(file, "trace_head_incr:\n");
# endif
else if (last_pc == code->reset_exit_stub)
print_file(file, "reset_exit_stub:\n");
else if (last_pc == code->fcache_return_coarse)
print_file(file, "fcache_return_coarse:\n");
else if (last_pc == code->trace_head_return_coarse)
print_file(file, "trace_head_return_coarse:\n");
# ifdef CLIENT_INTERFACE
else if (last_pc == code->special_ibl_xfer[CLIENT_IBL_IDX])
print_file(file, "client_ibl_xfer:\n");
# endif
# ifdef UNIX
else if (last_pc == code->special_ibl_xfer[NATIVE_PLT_IBL_IDX])
print_file(file, "native_plt_ibl_xfer:\n");
else if (last_pc == code->special_ibl_xfer[NATIVE_RET_IBL_IDX])
print_file(file, "native_ret_ibl_xfer:\n");
# endif
else if (last_pc == code->clean_call_save)
print_file(file, "clean_call_save:\n");
else if (last_pc == code->clean_call_restore)
print_file(file, "clean_call_restore:\n");
last_pc = disassemble_with_bytes(dcontext, last_pc, file);
} while (last_pc < emitted_pc);
print_file(file, "%s routines size: "SSZFMT" / "SSZFMT"\n\n",
code_description, emitted_pc - code->gen_start_pc,
code->commit_end_pc - code->gen_start_pc);
}
# if defined(X86) && defined(X64)
if (GENCODE_IS_X86(code->gencode_mode))
set_x86_mode(dcontext, false/*x64*/);
# endif
}
void
dump_emitted_routines_to_file(dcontext_t *dcontext, const char *filename,
const char *label, generated_code_t *code,
byte *stop_pc)
{
file_t file = open_log_file(filename, NULL, 0);
if (file != INVALID_FILE) {
/* FIXME: we currently miss later patches for table & mask, but
* that only changes a few immeds
*/
dump_emitted_routines(dcontext, file, label, code, stop_pc);
close_log_file(file);
} else
ASSERT_NOT_REACHED();
}
#endif /* INTERNAL */
/*** functions exported to src directory ***/
static byte *
code_align_forward(dr_isa_mode_t isa_mode, byte *pc, size_t alignment)
{
byte *new_pc = (byte *) ALIGN_FORWARD(pc, alignment);
DOCHECK(1, {
SET_TO_NOPS(isa_mode, pc, new_pc - pc);
});
return new_pc;
}
static byte *
move_to_start_of_cache_line(dr_isa_mode_t isa_mode, byte *pc)
{
return code_align_forward(isa_mode, pc, proc_get_cache_line_size());
}
/* The real size of generated code we need varies by cache line size and
* options like inlining of ibl code. We also generate different routines
* for thread-private and thread-shared. So, we dynamically extend the size
* as we generate. Currently our max is under 5 pages.
*/
#define GENCODE_RESERVE_SIZE (5*PAGE_SIZE)
#define GENCODE_COMMIT_SIZE \
((size_t)(ALIGN_FORWARD(sizeof(generated_code_t), PAGE_SIZE) + PAGE_SIZE))
static byte *
check_size_and_cache_line(dr_isa_mode_t isa_mode, generated_code_t *code, byte *pc)
{
/* Assumption: no single emit uses more than a page.
* We keep an extra page at all times and release it at the end.
*/
byte *next_pc = move_to_start_of_cache_line(isa_mode, pc);
if ((byte *)ALIGN_FORWARD(pc, PAGE_SIZE) + PAGE_SIZE > code->commit_end_pc) {
ASSERT(code->commit_end_pc + PAGE_SIZE <= ((byte *)code) + GENCODE_RESERVE_SIZE);
heap_mmap_extend_commitment(code->commit_end_pc, PAGE_SIZE, VMM_SPECIAL_MMAP);
code->commit_end_pc += PAGE_SIZE;
}
return next_pc;
}
static void
release_final_page(generated_code_t *code)
{
/* FIXME: have heap_mmap not allocate a guard page, and use our
* extra for that page, to use one fewer total page of address space.
*/
size_t leftover = (ptr_uint_t)code->commit_end_pc -
ALIGN_FORWARD(code->gen_end_pc, PAGE_SIZE);
ASSERT(code->commit_end_pc >= (byte *) ALIGN_FORWARD(code->gen_end_pc, PAGE_SIZE));
ASSERT(ALIGNED(code->commit_end_pc, PAGE_SIZE));
ASSERT(ALIGNED(leftover, PAGE_SIZE));
if (leftover > 0) {
heap_mmap_retract_commitment(code->commit_end_pc - leftover, leftover,
VMM_SPECIAL_MMAP);
code->commit_end_pc -= leftover;
}
LOG(THREAD_GET, LOG_EMIT, 1,
"Generated code "PFX": %d header, "SZFMT" gen, "SZFMT" commit/%d reserve\n",
code, sizeof(*code), code->gen_end_pc - code->gen_start_pc,
(ptr_uint_t)code->commit_end_pc - (ptr_uint_t)code, GENCODE_RESERVE_SIZE);
}
static void
shared_gencode_emit(generated_code_t *gencode _IF_X86_64(bool x86_mode))
{
byte *pc;
/* As ARM mode switches are inexpensive, we do not need separate gencode
* versions and stick with Thumb for all our gencode.
*/
dr_isa_mode_t isa_mode = dr_get_isa_mode(GLOBAL_DCONTEXT);
pc = gencode->gen_start_pc;
/* Temporarily set this so that ibl queries work during generation */
gencode->gen_end_pc = gencode->commit_end_pc;
pc = check_size_and_cache_line(isa_mode, gencode, pc);
gencode->fcache_enter = pc;
pc = emit_fcache_enter_shared(GLOBAL_DCONTEXT, gencode, pc);
pc = check_size_and_cache_line(isa_mode, gencode, pc);
gencode->fcache_return = pc;
pc = emit_fcache_return_shared(GLOBAL_DCONTEXT, gencode, pc);
if (DYNAMO_OPTION(coarse_units)) {
pc = check_size_and_cache_line(isa_mode, gencode, pc);
gencode->fcache_return_coarse = pc;
pc = emit_fcache_return_coarse(GLOBAL_DCONTEXT, gencode, pc);
pc = check_size_and_cache_line(isa_mode, gencode, pc);
gencode->trace_head_return_coarse = pc;
pc = emit_trace_head_return_coarse(GLOBAL_DCONTEXT, gencode, pc);
}
#ifdef WINDOWS_PC_SAMPLE
gencode->fcache_enter_return_end = pc;
#endif
/* PR 244737: thread-private uses shared gencode on x64.
* Should we set the option instead? */
if (USE_SHARED_TRACE_IBL()) {
/* expected to be false for private trace IBL routine */
pc = emit_ibl_routines(GLOBAL_DCONTEXT, gencode,
pc, gencode->fcache_return,
DYNAMO_OPTION(shared_traces) ?
IBL_TRACE_SHARED : IBL_TRACE_PRIVATE, /* source type */
true, /* thread_shared */
true, /* target_trace_table */
gencode->trace_ibl);
}
if (USE_SHARED_BB_IBL()) {
pc = emit_ibl_routines(GLOBAL_DCONTEXT, gencode,
pc, gencode->fcache_return,
IBL_BB_SHARED, /* source_fragment_type */
/* thread_shared */
IF_X86_64_ELSE(true, SHARED_FRAGMENTS_ENABLED()),
!DYNAMO_OPTION(bb_ibl_targets), /* target_trace_table */
gencode->bb_ibl);
}
if (DYNAMO_OPTION(coarse_units)) {
pc = emit_ibl_routines(GLOBAL_DCONTEXT, gencode, pc,
/* ibl routines use regular fcache_return */
gencode->fcache_return,
IBL_COARSE_SHARED, /* source_fragment_type */
/* thread_shared */
IF_X86_64_ELSE(true, SHARED_FRAGMENTS_ENABLED()),
!DYNAMO_OPTION(bb_ibl_targets), /*target_trace_table*/
gencode->coarse_ibl);
}
#ifdef WINDOWS_PC_SAMPLE
gencode->ibl_routines_end = pc;
#endif
#if defined(WINDOWS) && !defined(X64)
/* no dispatch needed on x64 since syscall routines are thread-shared */
if (DYNAMO_OPTION(shared_fragment_shared_syscalls)) {
pc = check_size_and_cache_line(isa_mode, gencode, pc);
gencode->shared_syscall = pc;
pc = emit_shared_syscall_dispatch(GLOBAL_DCONTEXT, pc);
pc = check_size_and_cache_line(isa_mode, gencode, pc);
gencode->unlinked_shared_syscall = pc;
pc = emit_unlinked_shared_syscall_dispatch(GLOBAL_DCONTEXT, pc);
LOG(GLOBAL, LOG_EMIT, 3,
"shared_syscall_dispatch: linked "PFX", unlinked "PFX"\n",
gencode->shared_syscall, gencode->unlinked_shared_syscall);
}
#endif
#ifdef UNIX
/* must create before emit_do_clone_syscall() in emit_syscall_routines() */
pc = check_size_and_cache_line(isa_mode, gencode, pc);
gencode->new_thread_dynamo_start = pc;
pc = emit_new_thread_dynamo_start(GLOBAL_DCONTEXT, pc);
#endif
#ifdef ARM
pc = check_size_and_cache_line(isa_mode, gencode, pc);
gencode->fcache_enter_gonative = pc;
pc = emit_fcache_enter_gonative(GLOBAL_DCONTEXT, gencode, pc);
#endif
#if defined(X86) && defined(X64)
# ifdef WINDOWS
/* plain fcache_enter indirects through edi, and next_tag is in tls,
* so we don't need a separate routine for callback return
*/
gencode->fcache_enter_indirect = gencode->fcache_enter;
# endif
/* i#821/PR 284029: for now we assume there are no syscalls in x86 code */
if (IF_X64_ELSE(!x86_mode, true)) {
/* PR 244737: syscall routines are all shared */
pc = emit_syscall_routines(GLOBAL_DCONTEXT, gencode, pc, true/*thread-shared*/);
}
#elif defined(UNIX) && defined(HAVE_TLS)
/* PR 212570: we need a thread-shared do_syscall for our vsyscall hook */
/* PR 361894: we don't support sysenter if no TLS */
ASSERT(gencode->do_syscall == NULL || dynamo_initialized/*re-gen*/);
pc = check_size_and_cache_line(isa_mode, gencode, pc);
gencode->do_syscall = pc;
pc = emit_do_syscall(GLOBAL_DCONTEXT, gencode, pc, gencode->fcache_return,
true/*shared*/, 0, &gencode->do_syscall_offs);
# ifdef AARCHXX
/* ARM has no thread-private gencode, so our clone syscall is shared */
gencode->do_clone_syscall = pc;
pc = emit_do_clone_syscall(GLOBAL_DCONTEXT, gencode, pc, gencode->fcache_return,
true/*shared*/, &gencode->do_clone_syscall_offs);
# endif
#endif
if (USE_SHARED_GENCODE_ALWAYS()) {
fragment_t *fragment;
/* make reset stub shared */
gencode->reset_exit_stub = pc;
fragment = linkstub_fragment(GLOBAL_DCONTEXT, (linkstub_t *)get_reset_linkstub());
#ifdef X86_64
if (GENCODE_IS_X86(gencode->gencode_mode))
fragment = empty_fragment_mark_x86(fragment);
#endif
/* reset exit stub should look just like a direct exit stub */
pc += insert_exit_stub_other_flags
(GLOBAL_DCONTEXT, fragment,
(linkstub_t *) get_reset_linkstub(), pc, LINK_DIRECT);
}
#ifdef TRACE_HEAD_CACHE_INCR
pc = check_size_and_cache_line(isa_mode, gencode, pc);
gencode->trace_head_incr = pc;
pc = emit_trace_head_incr_shared(GLOBAL_DCONTEXT, pc, gencode->fcache_return);
#endif
if (!special_ibl_xfer_is_thread_private()) {
#ifdef CLIENT_INTERFACE
gencode->special_ibl_xfer[CLIENT_IBL_IDX] = pc;
pc = emit_client_ibl_xfer(GLOBAL_DCONTEXT, pc, gencode);
#endif
#ifdef UNIX
/* i#1238: native exec optimization */
if (DYNAMO_OPTION(native_exec_opt)) {
pc = check_size_and_cache_line(isa_mode, gencode, pc);
gencode->special_ibl_xfer[NATIVE_PLT_IBL_IDX] = pc;
pc = emit_native_plt_ibl_xfer(GLOBAL_DCONTEXT, pc, gencode);
/* native ret */
pc = check_size_and_cache_line(isa_mode, gencode, pc);
gencode->special_ibl_xfer[NATIVE_RET_IBL_IDX] = pc;
pc = emit_native_ret_ibl_xfer(GLOBAL_DCONTEXT, pc, gencode);
}
#endif
}
if (!client_clean_call_is_thread_private()) {
pc = check_size_and_cache_line(isa_mode, gencode, pc);
gencode->clean_call_save = pc;
pc = emit_clean_call_save(GLOBAL_DCONTEXT, pc, gencode);
pc = check_size_and_cache_line(isa_mode, gencode, pc);
gencode->clean_call_restore = pc;
pc = emit_clean_call_restore(GLOBAL_DCONTEXT, pc, gencode);
}
ASSERT(pc < gencode->commit_end_pc);
gencode->gen_end_pc = pc;
machine_cache_sync(gencode->gen_start_pc, gencode->gen_end_pc, true);
}
static void
shared_gencode_init(IF_X86_64_ELSE(gencode_mode_t gencode_mode, void))
{
generated_code_t *gencode;
ibl_branch_type_t branch_type;
#if defined(X86) && defined(X64)
bool x86_mode = false;
bool x86_to_x64_mode = false;
#endif
gencode = heap_mmap_reserve(GENCODE_RESERVE_SIZE, GENCODE_COMMIT_SIZE,
VMM_SPECIAL_MMAP);
/* we would return gencode and let caller assign, but emit routines
* that this routine calls query the shared vars so we set here
*/
#if defined(X86) && defined(X64)
switch (gencode_mode) {
case GENCODE_X64:
shared_code = gencode;
break;
case GENCODE_X86:
/* we do not call set_x86_mode() b/c much of the gencode may be
* 64-bit: it's up the gencode to mark each instr that's 32-bit.
*/
shared_code_x86 = gencode;
x86_mode = true;
break;
case GENCODE_X86_TO_X64:
shared_code_x86_to_x64 = gencode;
x86_to_x64_mode = true;
break;
default:
ASSERT_NOT_REACHED();
}
#else
shared_code = gencode;
#endif
memset(gencode, 0, sizeof(*gencode));
gencode->thread_shared = true;
IF_X86_64(gencode->gencode_mode = gencode_mode);
/* Generated code immediately follows struct */
gencode->gen_start_pc = ((byte *)gencode) + sizeof(*gencode);
gencode->commit_end_pc = ((byte *)gencode) + GENCODE_COMMIT_SIZE;
for (branch_type = IBL_BRANCH_TYPE_START;
branch_type < IBL_BRANCH_TYPE_END; branch_type++) {
gencode->trace_ibl[branch_type].initialized = false;
gencode->bb_ibl[branch_type].initialized = false;
gencode->coarse_ibl[branch_type].initialized = false;
#if defined(X86) && defined(X64)
/* cache the mode so we can pass just the ibl_code_t around */
gencode->trace_ibl[branch_type].x86_mode = x86_mode;
gencode->trace_ibl[branch_type].x86_to_x64_mode = x86_to_x64_mode;
gencode->bb_ibl[branch_type].x86_mode = x86_mode;
gencode->bb_ibl[branch_type].x86_to_x64_mode = x86_to_x64_mode;
gencode->coarse_ibl[branch_type].x86_mode = x86_mode;
gencode->coarse_ibl[branch_type].x86_to_x64_mode = x86_to_x64_mode;
#endif
}
#if defined(X86) && defined(X64) && defined(WINDOWS)
gencode->shared_syscall_code.x86_mode = x86_mode;
gencode->shared_syscall_code.x86_to_x64_mode = x86_to_x64_mode;
#endif
shared_gencode_emit(gencode _IF_X86_64(x86_mode));
release_final_page(gencode);
DOLOG(3, LOG_EMIT, {
dump_emitted_routines(GLOBAL_DCONTEXT, GLOBAL,
IF_X86_64_ELSE(x86_mode ? "thread-shared x86" :
"thread-shared", "thread-shared"),
gencode, gencode->gen_end_pc);
});
#ifdef INTERNAL
if (INTERNAL_OPTION(gendump)) {
dump_emitted_routines_to_file(GLOBAL_DCONTEXT, "gencode-shared",
IF_X86_64_ELSE(x86_mode ? "thread-shared x86" :
"thread-shared", "thread-shared"),
gencode, gencode->gen_end_pc);
}
#endif
#ifdef WINDOWS_PC_SAMPLE
if (dynamo_options.profile_pcs &&
dynamo_options.prof_pcs_gencode >= 2 &&
dynamo_options.prof_pcs_gencode <= 32) {
gencode->profile =
create_profile(gencode->gen_start_pc, gencode->gen_end_pc,
dynamo_options.prof_pcs_gencode, NULL);
start_profile(gencode->profile);
} else
gencode->profile = NULL;
#endif
gencode->writable = true;
protect_generated_code(gencode, READONLY);
}
#ifdef AARCHXX
/* Called during a reset when all threads are suspended */
void
arch_reset_stolen_reg(void)
{
/* We have no per-thread gencode. We simply re-emit on top of the existing
* shared_code, which means we do not need to update each thread's pointers
* to gencode stored in TLS.
*/
dr_isa_mode_t old_mode;
dcontext_t *dcontext;
# ifdef AARCH64
ASSERT_NOT_IMPLEMENTED(false); /* FIXME i#1569 */
# endif
if (DR_REG_R0 + INTERNAL_OPTION(steal_reg_at_reset) == dr_reg_stolen)
return;
SYSLOG_INTERNAL_INFO("swapping stolen reg from %s to %s",
reg_names[dr_reg_stolen],
reg_names[DR_REG_R0 + INTERNAL_OPTION(steal_reg_at_reset)]);
dcontext = get_thread_private_dcontext();
ASSERT(dcontext != NULL);
dr_set_isa_mode(dcontext, DR_ISA_ARM_THUMB, &old_mode);
SELF_UNPROTECT_DATASEC(DATASEC_RARELY_PROT);
dr_reg_stolen = DR_REG_R0 + INTERNAL_OPTION(steal_reg_at_reset);
ASSERT(dr_reg_stolen >= DR_REG_STOLEN_MIN && dr_reg_stolen <= DR_REG_STOLEN_MAX);
shared_gencode_emit(shared_code);
SELF_PROTECT_DATASEC(DATASEC_RARELY_PROT);
dr_set_isa_mode(dcontext, old_mode, NULL);
DOLOG(3, LOG_EMIT, {
dump_emitted_routines(GLOBAL_DCONTEXT, GLOBAL, "swap stolen reg", shared_code,
shared_code->gen_end_pc);
});
}
void
arch_mcontext_reset_stolen_reg(dcontext_t *dcontext, priv_mcontext_t *mc)
{
/* Put the app value in the old stolen reg */
*(reg_t*)(((byte *)mc) +
opnd_get_reg_dcontext_offs(DR_REG_R0 + INTERNAL_OPTION(steal_reg))) =
dcontext->local_state->spill_space.reg_stolen;
/* Put the TLs base into the new stolen reg */
set_stolen_reg_val(mc, (reg_t) os_get_dr_tls_base(dcontext));
}
#endif /* AARCHXX */
#if defined(X86) && defined(X64)
/* Sets other-mode ibl targets, for mixed-mode and x86_to_x64 mode */
static void
far_ibl_set_targets(ibl_code_t src_ibl[], ibl_code_t tgt_ibl[])
{
ibl_branch_type_t branch_type;
for (branch_type = IBL_BRANCH_TYPE_START;
branch_type < IBL_BRANCH_TYPE_END; branch_type++) {
if (src_ibl[branch_type].initialized) {
/* selector was set in emit_far_ibl (but at that point we didn't have
* the other mode's ibl ready for the target)
*/
ASSERT(CHECK_TRUNCATE_TYPE_uint
((ptr_uint_t)tgt_ibl[branch_type].indirect_branch_lookup_routine));
ASSERT(CHECK_TRUNCATE_TYPE_uint
((ptr_uint_t)tgt_ibl[branch_type].unlinked_ibl_entry));
src_ibl[branch_type].far_jmp_opnd.pc = (uint)(ptr_uint_t)
tgt_ibl[branch_type].indirect_branch_lookup_routine;
src_ibl[branch_type].far_jmp_unlinked_opnd.pc = (uint)(ptr_uint_t)
tgt_ibl[branch_type].unlinked_ibl_entry;
}
}
}
#endif
/* arch-specific initializations */
void
arch_init(void)
{
ASSERT(sizeof(opnd_t) == EXPECTED_SIZEOF_OPND);
IF_X86(ASSERT(CHECK_TRUNCATE_TYPE_byte(OPSZ_LAST)));
/* ensure our flag sharing is done properly */
ASSERT((uint)LINK_FINAL_INSTR_SHARED_FLAG <
(uint)INSTR_FIRST_NON_LINK_SHARED_FLAG);
ASSERT_TRUNCATE(byte, byte, OPSZ_LAST_ENUM);
ASSERT(DR_ISA_ARM_A32 + 1 == DR_ISA_ARM_THUMB); /* ibl relies on this */
/* Verify that the structures used for a register spill area and to hold IBT
* table addresses & masks for IBL code are laid out as expected. We expect
* the spill area to be at offset 0 within the container struct and for the
* table address/mask pair array to follow immediately after the spill area.
*/
/* FIXME These can be converted into compile-time checks as follows:
*
* lookup_table_access_t table[
* (offsetof(local_state_extended_t, spill_space) == 0 &&
* offsetof(local_state_extended_t, table_space) ==
* sizeof(spill_state_t)) ? IBL_BRANCH_TYPE_END : -1 ];
*
* This isn't self-descriptive, though, so it's not being used right now
* (xref case 7097).
*/
ASSERT(offsetof(local_state_extended_t, spill_space) == 0);
ASSERT(offsetof(local_state_extended_t, table_space) == sizeof(spill_state_t));
#ifdef WINDOWS
/* syscalls_init() should have already set the syscall_method so go ahead
* and create the globlal_do_syscall now */
ASSERT(syscall_method != SYSCALL_METHOD_UNINITIALIZED);
#endif
#ifdef AARCHXX
dr_reg_stolen = DR_REG_R0 + DYNAMO_OPTION(steal_reg);
ASSERT(dr_reg_stolen >= DR_REG_STOLEN_MIN && dr_reg_stolen <= DR_REG_STOLEN_MAX)
#endif
/* Ensure we have no unexpected padding inside structs that include
* priv_mcontext_t (app_state_at_intercept_t and dcontext_t) */
IF_X86(ASSERT(offsetof(priv_mcontext_t, pc) + sizeof(byte*) + PRE_XMM_PADDING ==
offsetof(priv_mcontext_t, ymm)));
ASSERT(offsetof(app_state_at_intercept_t, mc) ==
offsetof(app_state_at_intercept_t, start_pc) + sizeof(void*));
/* Try to catch errors in x86.asm offsets for dcontext_t */
ASSERT(sizeof(unprotected_context_t) == sizeof(priv_mcontext_t) +
IF_WINDOWS_ELSE(IF_X64_ELSE(8, 4), 8) +
IF_CLIENT_INTERFACE_ELSE(5 * sizeof(reg_t), 0));
interp_init();
#ifdef CHECK_RETURNS_SSE2
if (proc_has_feature(FEATURE_SSE2)) {
FATAL_USAGE_ERROR(CHECK_RETURNS_SSE2_REQUIRES_SSE2, 2,
get_application_name(), get_application_pid());
}
#endif
if (USE_SHARED_GENCODE()) {
/* thread-shared generated code */
/* Assumption: no single emit uses more than a page.
* We keep an extra page at all times and release it at the end.
* FIXME: have heap_mmap not allocate a guard page, and use our
* extra for that page, to use one fewer total page of address space.
*/
ASSERT(GENCODE_COMMIT_SIZE < GENCODE_RESERVE_SIZE);
shared_gencode_init(IF_X86_64(GENCODE_X64));
#if defined(X86) && defined(X64)
/* FIXME i#49: usually LOL64 has only 32-bit code (kernel has 32-bit syscall
* interface) but for mixed modes how would we know? We'd have to make
* this be initialized lazily on first occurrence.
*/
if (mixed_mode_enabled()) {
generated_code_t *shared_code_opposite_mode;
shared_gencode_init(IF_X64(GENCODE_X86));
if (DYNAMO_OPTION(x86_to_x64)) {
shared_gencode_init(IF_X64(GENCODE_X86_TO_X64));
shared_code_opposite_mode = shared_code_x86_to_x64;
} else
shared_code_opposite_mode = shared_code_x86;
/* Now link the far_ibl for each type to the corresponding regular
* ibl of the opposite mode.
*/
far_ibl_set_targets(shared_code->trace_ibl,
shared_code_opposite_mode->trace_ibl);
far_ibl_set_targets(shared_code->bb_ibl,
shared_code_opposite_mode->bb_ibl);
far_ibl_set_targets(shared_code->coarse_ibl,
shared_code_opposite_mode->coarse_ibl);
far_ibl_set_targets(shared_code_opposite_mode->trace_ibl,
shared_code->trace_ibl);
far_ibl_set_targets(shared_code_opposite_mode->bb_ibl,
shared_code->bb_ibl);
far_ibl_set_targets(shared_code_opposite_mode->coarse_ibl,
shared_code->coarse_ibl);
}
#endif
}
mangle_init();
}
#ifdef WINDOWS_PC_SAMPLE
static void
arch_extract_profile(dcontext_t *dcontext _IF_X86_64(gencode_mode_t mode))
{
generated_code_t *tpc = get_emitted_routines_code(dcontext _IF_X86_64(mode));
thread_id_t tid = dcontext == GLOBAL_DCONTEXT ? 0 : dcontext->owning_thread;
/* we may not have x86 gencode */
ASSERT(tpc != NULL IF_X86_64(|| mode == GENCODE_X86));
if (tpc != NULL && tpc->profile != NULL) {
ibl_branch_type_t branch_type;
int sum;
protect_generated_code(tpc, WRITABLE);
stop_profile(tpc->profile);
mutex_lock(&profile_dump_lock);
/* Print the thread id so even if it has no hits we can
* count the # total threads. */
print_file(profile_file, "Profile for thread "TIDFMT"\n", tid);
sum = sum_profile_range(tpc->profile, tpc->fcache_enter,
tpc->fcache_enter_return_end);
if (sum > 0) {
print_file(profile_file, "\nDumping cache enter/exit code profile "
"(thread "TIDFMT")\n%d hits\n", tid, sum);
dump_profile_range(profile_file, tpc->profile, tpc->fcache_enter,
tpc->fcache_enter_return_end);
}
/* Break out the IBL code by trace/BB and opcode types.
* Not worth showing far_ibl hits since should be quite rare.
*/
for (branch_type = IBL_BRANCH_TYPE_START;
branch_type < IBL_BRANCH_TYPE_END; branch_type++) {
byte *start;
byte *end;
if (tpc->trace_ibl[branch_type].initialized) {
start = tpc->trace_ibl[branch_type].indirect_branch_lookup_routine;
end = start + tpc->trace_ibl[branch_type].ibl_routine_length;
sum = sum_profile_range(tpc->profile, start, end);
if (sum > 0) {
print_file(profile_file, "\nDumping trace IBL code %s profile "
"(thread "TIDFMT")\n%d hits\n",
get_branch_type_name(branch_type), tid, sum);
dump_profile_range(profile_file, tpc->profile, start, end);
}
}
if (tpc->bb_ibl[branch_type].initialized) {
start = tpc->bb_ibl[branch_type].indirect_branch_lookup_routine;
end = start + tpc->bb_ibl[branch_type].ibl_routine_length;
sum = sum_profile_range(tpc->profile, start, end);
if (sum > 0) {
print_file(profile_file, "\nDumping BB IBL code %s profile "
"(thread "TIDFMT")\n%d hits\n",
get_branch_type_name(branch_type), tid, sum);
dump_profile_range(profile_file, tpc->profile, start, end);
}
}
if (tpc->coarse_ibl[branch_type].initialized) {
start = tpc->coarse_ibl[branch_type].indirect_branch_lookup_routine;
end = start + tpc->coarse_ibl[branch_type].ibl_routine_length;
sum = sum_profile_range(tpc->profile, start, end);
if (sum > 0) {
print_file(profile_file, "\nDumping coarse IBL code %s profile "
"(thread "TIDFMT")\n%d hits\n",
get_branch_type_name(branch_type), tid, sum);
dump_profile_range(profile_file, tpc->profile, start, end);
}
}
}
sum = sum_profile_range(tpc->profile, tpc->ibl_routines_end,
tpc->profile->end);
if (sum > 0) {
print_file(profile_file, "\nDumping generated code profile "
"(thread "TIDFMT")\n%d hits\n", tid, sum);
dump_profile_range(profile_file, tpc->profile,
tpc->ibl_routines_end, tpc->profile->end);
}
mutex_unlock(&profile_dump_lock);
free_profile(tpc->profile);
tpc->profile = NULL;
}
}
void
arch_profile_exit()
{
if (USE_SHARED_GENCODE()) {
arch_extract_profile(GLOBAL_DCONTEXT _IF_X64(GENCODE_X64));
IF_X64(arch_extract_profile(GLOBAL_DCONTEXT _IF_X64(GENCODE_X86)));
}
}
#endif /* WINDOWS_PC_SAMPLE */
/* arch-specific atexit cleanup */
void
arch_exit(IF_WINDOWS_ELSE_NP(bool detach_stacked_callbacks, void))
{
/* we only need to unprotect shared_code for profile extraction
* so we do it there to also cover the fast exit path
*/
#ifdef WINDOWS_PC_SAMPLE
arch_profile_exit();
#endif
/* on x64 we have syscall routines in the shared code so can't free if detaching */
if (IF_WINDOWS(IF_X64(!detach_stacked_callbacks &&)) shared_code != NULL) {
heap_munmap(shared_code, GENCODE_RESERVE_SIZE, VMM_SPECIAL_MMAP);
}
#if defined(X86) && defined(X64)
if (shared_code_x86 != NULL)
heap_munmap(shared_code_x86, GENCODE_RESERVE_SIZE, VMM_SPECIAL_MMAP);
if (shared_code_x86_to_x64 != NULL)
heap_munmap(shared_code_x86_to_x64, GENCODE_RESERVE_SIZE, VMM_SPECIAL_MMAP);
#endif
interp_exit();
mangle_exit();
if (doing_detach) {
/* Clear for possible re-attach. */
shared_code = NULL;
#if defined(X86) && defined(X64)
shared_code_x86 = NULL;
shared_code_x86_to_x64 = NULL;
#endif
app_sysenter_instr_addr = NULL;
#ifdef LINUX
/* If we don't clear this we get asserts on vsyscall hook on re-attach on
* some Linux variants. We don't want to clear on Windows 8+ as that causes
* asserts on re-attach (i#2145).
*/
syscall_method = SYSCALL_METHOD_UNINITIALIZED;
sysenter_hook_failed = false;
#endif
}
}
static byte *
emit_ibl_routine_and_template(dcontext_t *dcontext, generated_code_t *code,
byte *pc,
byte *fcache_return_pc,
bool target_trace_table,
bool inline_ibl_head,
bool thread_shared,
ibl_branch_type_t branch_type,
ibl_source_fragment_type_t source_type,
ibl_code_t *ibl_code)
{
/* FIXME i#1551: pass in or store mode in generated_code_t */
dr_isa_mode_t isa_mode = dr_get_isa_mode(dcontext);
pc = check_size_and_cache_line(isa_mode, code, pc);
ibl_code->initialized = true;
ibl_code->indirect_branch_lookup_routine = pc;
ibl_code->ibl_head_is_inlined = inline_ibl_head;
ibl_code->thread_shared_routine = thread_shared;
ibl_code->branch_type = branch_type;
ibl_code->source_fragment_type = source_type;
pc = emit_indirect_branch_lookup(dcontext, code, pc, fcache_return_pc,
target_trace_table, inline_ibl_head,
ibl_code);
if (inline_ibl_head) {
/* create the inlined ibl template */
pc = check_size_and_cache_line(isa_mode, code, pc);
pc = emit_inline_ibl_stub(dcontext, pc, ibl_code, target_trace_table);
}
ibl_code->far_ibl = pc;
pc = emit_far_ibl(dcontext, pc, ibl_code,
ibl_code->indirect_branch_lookup_routine
_IF_X86_64(&ibl_code->far_jmp_opnd));
ibl_code->far_ibl_unlinked = pc;
pc = emit_far_ibl(dcontext, pc, ibl_code,
ibl_code->unlinked_ibl_entry
_IF_X86_64(&ibl_code->far_jmp_unlinked_opnd));
return pc;
}
static byte *
emit_ibl_routines(dcontext_t *dcontext, generated_code_t *code, byte *pc,
byte *fcache_return_pc,
ibl_source_fragment_type_t source_fragment_type,
bool thread_shared,
bool target_trace_table,
ibl_code_t ibl_code_routines[])
{
ibl_branch_type_t branch_type;
/* emit separate routines for each branch type
The goal is to have routines that target different fragment tables
so that we can control for example return targets for RAC,
or we can control inlining if some branch types have better hit ratios.
Currently it only gives us better stats.
*/
/*
N.B.: shared fragments requires -atomic_inlined_linking in order to
inline ibl lookups, but not for private since they're unlinked by another thread
flushing but not linked by anyone but themselves.
*/
bool inline_ibl_head = (IS_IBL_TRACE(source_fragment_type)) ?
DYNAMO_OPTION(inline_trace_ibl) : DYNAMO_OPTION(inline_bb_ibl);
for (branch_type = IBL_BRANCH_TYPE_START;
branch_type < IBL_BRANCH_TYPE_END; branch_type++) {
#ifdef HASHTABLE_STATISTICS
/* ugly asserts but we'll stick with uints to save space */
IF_X64(ASSERT(CHECK_TRUNCATE_TYPE_uint
(GET_IBL_TARGET_TABLE(branch_type, target_trace_table)
+ offsetof(ibl_table_t, unprot_stats))));
ibl_code_routines[branch_type].unprot_stats_offset = (uint)
GET_IBL_TARGET_TABLE(branch_type, target_trace_table)
+ offsetof(ibl_table_t, unprot_stats);
IF_X64(ASSERT(CHECK_TRUNCATE_TYPE_uint
(GET_IBL_TARGET_TABLE(branch_type, target_trace_table)
+ offsetof(ibl_table_t, entry_stats_to_lookup_table))));
ibl_code_routines[branch_type].entry_stats_to_lookup_table_offset = (uint)
GET_IBL_TARGET_TABLE(branch_type, target_trace_table)
+ offsetof(ibl_table_t, entry_stats_to_lookup_table);
IF_X64(ASSERT(CHECK_TRUNCATE_TYPE_uint
(offsetof(unprot_ht_statistics_t, trace_ibl_stats[branch_type]))));
IF_X64(ASSERT(CHECK_TRUNCATE_TYPE_uint
(offsetof(unprot_ht_statistics_t, bb_ibl_stats[branch_type]))));
ibl_code_routines[branch_type].hashtable_stats_offset = (uint)
((IS_IBL_TRACE(source_fragment_type)) ?
offsetof(unprot_ht_statistics_t, trace_ibl_stats[branch_type])
: offsetof(unprot_ht_statistics_t, bb_ibl_stats[branch_type]));
#endif
pc = emit_ibl_routine_and_template(dcontext, code, pc,
fcache_return_pc,
target_trace_table,
inline_ibl_head, thread_shared,
branch_type, source_fragment_type,