apio lint [OPTIONS]
Lint the verilog code. It is agnostic of the FPGA. It does not use the pcf file.
Required packages: scons
, verilator
.
-a, --all
Enable all warnings, including code style warnings.
-t, --top
Set top module.
--nostyle
Disable all style warnings.
--nowarn
Disable specific warning(s).
--warn
Enable specific warning(s).
-p, --project-dir
Set the target directory for the project.
- Lint the leds example
$ apio lint
verilator --lint-only -I/path/to/share leds.v
================================== [SUCCESS] Took 0.20 seconds ==============================
- Lint the leds example with all the options
$ apio lint --all --top leds --nostyle --nowarn PINMISSING,WIDTH --warn DECLFILENAME,DEFPARAM
verilator --lint-only -I/path/to/share -Wall -Wno-style -Wno-PINMISSING -Wno-WIDTH -Wwarn-DECLFILENAME -Wwarn-DEFPARAM --top-module leds leds.v
================================== [SUCCESS] Took 0.20 seconds ==============================