apio verify [OPTIONS]
Verify the verilog code. It is agnostic of the FPGA. It does not use the pcf file.
Required packages: scons
, iverilog
.
-p, --project-dir
Set the target directory for the project.
- Verify the leds example
$ apio verify
iverilog -B /path/to/lib/ivl -o hardware.out -D VCD_OUTPUT= /path/to/vlib/system.v leds.v
================================== [SUCCESS] Took 0.17 seconds ==============================