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Defpin cleanup (#866)
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* Bring fastpin_avr in line with standard defpin macros (to simplify porting document notes

* checkpoint - bring all the arm and esp platforms in line w/defpin macro naming/ordering

* checkpoint - update PORTING.md to include information around just adding pin definitions if needed

* Kick all the pin definitions to allow for some runtime querying of ports and tweak pintest to have it provide pin definitions for platforms that have port definitions but might be missing pin specifics (e.g. not yet-supported avr platforms
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@focalintent
focalintent committed Aug 25, 2019
1 parent 3c5484c commit 8ac3dd7
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26 changes: 26 additions & 0 deletions PORTING.md
View file
@@ -1,5 +1,31 @@
=New platform porting guide=

== Fast porting for a new board on existing hardware ==

Sometimes "porting" FastLED simply consists of supplying new pin definitions for the given platform. For example, platforms/avr/fastpin_avr.h contains various pin definitions for all the AVR variant chipsets/boards that FastLED supports. Defining a set of pins involves setting up a set of definitions - for example here's one full set from the avr fastpin file:

```
#elif defined(__AVR_ATmega1284P__) || defined(__AVR_ATmega644P__)
_FL_IO(A); _FL_IO(B); _FL_IO(C); _FL_IO(D);
#define MAX_PIN 31
_FL_DEFPIN(0, 0, B); _FL_DEFPIN(1, 1, B); _FL_DEFPIN(2, 2, B); _FL_DEFPIN(3, 3, B);
_FL_DEFPIN(4, 4, B); _FL_DEFPIN(5, 5, B); _FL_DEFPIN(6, 6, B); _FL_DEFPIN(7, 7, B);
_FL_DEFPIN(8, 0, D); _FL_DEFPIN(9, 1, D); _FL_DEFPIN(10, 2, D); _FL_DEFPIN(11, 3, D);
_FL_DEFPIN(12, 4, D); _FL_DEFPIN(13, 5, D); _FL_DEFPIN(14, 6, D); _FL_DEFPIN(15, 7, D);
_FL_DEFPIN(16, 0, C); _FL_DEFPIN(17, 1, C); _FL_DEFPIN(18, 2, C); _FL_DEFPIN(19, 3, C);
_FL_DEFPIN(20, 4, C); _FL_DEFPIN(21, 5, C); _FL_DEFPIN(22, 6, C); _FL_DEFPIN(23, 7, C);
_FL_DEFPIN(24, 0, A); _FL_DEFPIN(25, 1, A); _FL_DEFPIN(26, 2, A); _FL_DEFPIN(27, 3, A);
_FL_DEFPIN(28, 4, A); _FL_DEFPIN(29, 5, A); _FL_DEFPIN(30, 6, A); _FL_DEFPIN(31, 7, A);
#define HAS_HARDWARE_PIN_SUPPORT 1
```

The ```_FL_IO``` macro is used to define the port registers for the platform while the ```_FL_DEFPIN``` macro is used to define pins. The parameters to the macro are the pin number, the bit on the port that represents that pin, and the port identifier itself. On some platforms, like the AVR, ports are identified by letter. On other platforms, like arm, ports are identified by number.

The ```HAS_HARDWARE_PIN_SUPPORT``` define tells the rest of the FastLED library that there is hardware pin support available. There may be other platform specific defines for things like hardware SPI ports and such.

== Setting up the basic files/folders ==

* Create platform directory (e.g. platforms/arm/kl26)
Expand Down
79 changes: 74 additions & 5 deletions examples/Pintest/Pintest.ino
View file
Expand Up @@ -94,12 +94,12 @@ template<uint8_t PIN> void CheckPin()
{
CheckPin<PIN - 1>();

RwReg *systemThinksPortIs = portOutputRegister(digitalPinToPort(PIN));
void *systemThinksPortIs = (void*)portOutputRegister(digitalPinToPort(PIN));
RwReg systemThinksMaskIs = digitalPinToBitMask(PIN);

Serial.print("Pin "); Serial.print(PIN); Serial.print(": Port ");

if(systemThinksPortIs == FastPin<PIN>::port()) {
if(systemThinksPortIs == (void*)FastPin<PIN>::port()) {
Serial.print("valid & mask ");
} else {
Serial.print("invalid, is "); Serial.print(getPort((void*)FastPin<PIN>::port())); Serial.print(" should be ");
Expand All @@ -114,17 +114,86 @@ template<uint8_t PIN> void CheckPin()
}
}

template<> void CheckPin<-1> () {}
template<> void CheckPin<255> () {}


template<uint8_t _PORT> const char *_GetPinPort(void *ptr) {
if (__FL_PORT_INFO<_PORT>::hasPort() && (ptr == (void*)__FL_PORT_INFO<_PORT>::portAddr())) {
return __FL_PORT_INFO<_PORT>::portName();
} else {
return _GetPinPort<_PORT - 1>(ptr);
}
}
template<> const char *_GetPinPort<-1>(void *ptr) {
return NULL;
}

const char *GetPinPort(void *ptr) {
return _GetPinPort<'Z'>(ptr);
}

static uint8_t pcount = 0;


template<uint8_t PIN> void PrintPins() {
PrintPins<PIN - 1>();

RwReg *systemThinksPortIs = portOutputRegister(digitalPinToPort(PIN));
RwReg systemThinksMaskIs = digitalPinToBitMask(PIN);

int maskBit = 0;
while(systemThinksMaskIs > 1) { systemThinksMaskIs >>= 1; maskBit++; }

const char *pinport = GetPinPort((void*)systemThinksPortIs);
if (pinport) {
Serial.print("__FL_DEFPIN("); Serial.print(PIN);
Serial.print(","); Serial.print(maskBit);
Serial.print(","); Serial.print(pinport);
Serial.print("); ");
pcount++;
if(pcount == 4) { pcount = 0; Serial.println(""); }
} else {
// Serial.print("Not found for pin "); Serial.println(PIN);
}
}

template<> void PrintPins<0>() {
RwReg *systemThinksPortIs = portOutputRegister(digitalPinToPort(0));
RwReg systemThinksMaskIs = digitalPinToBitMask(0);

int maskBit = 0;
while(systemThinksMaskIs > 1) { systemThinksMaskIs >>= 1; maskBit++; }

const char *pinport = GetPinPort((void*)systemThinksPortIs);
if (pinport) {
Serial.print("__FL_DEFPIN("); Serial.print(0);
Serial.print(","); Serial.print(maskBit);
Serial.print(","); Serial.print(pinport);
Serial.print("); ");
pcount++;
if(pcount == 4) { pcount = 0; Serial.println(""); }
}
}

int counter = 0;
void setup() {
delay(5000);
Serial.begin(38400);
Serial.println("resetting!");
}

void loop() {
Serial.println(counter);

#ifdef MAX_PIN
CheckPin<MAX_PIN>();
delay(100000);
#endif

Serial.print("GPIO_1_DR is: "); Serial.print(getPort((void*)&(GPIO1_DR)));
Serial.println("-----");
#ifdef NUM_DIGITAL_PINS
PrintPins<NUM_DIGITAL_PINS>();
#endif
Serial.println("------");

delay(100000);
}
22 changes: 22 additions & 0 deletions fastpin.h
View file
Expand Up @@ -241,6 +241,28 @@ template<uint8_t PIN> class FastPinBB : public FastPin<PIN> {};
typedef volatile uint32_t & reg32_t;
typedef volatile uint32_t * ptr_reg32_t;

// Utility templates for tracking down information about pins and ports
template<uint8_t port> struct __FL_PORT_INFO {
static bool hasPort() { return 0; }
static const char *portName() { return "--"; }
static const void *portAddr() { return NULL; }
};

// Give us our instantiations for defined ports - we're going to abuse this later for
// auto discovery of pin/port mappings for new variants. Use _FL_DEFINE_PORT for ports that
// are numeric in nature, e.g. GPIO0, GPIO1. Use _FL_DEFINE_PORT3 for ports that are letters.
// The first parameter will be the letter, the second parameter will be an integer/counter of smoe kind
// (this is because attempts to turn macro parameters into character constants break in some compilers)
#define _FL_DEFINE_PORT(L, BASE) template<> struct __FL_PORT_INFO<L> { static bool hasPort() { return 1; } \
static const char *portName() { return #L; } \
typedef BASE __t_baseType; \
static const void *portAddr() { return (void*)&__t_baseType::r(); } };

#define _FL_DEFINE_PORT3(L, LC, BASE) template<> struct __FL_PORT_INFO<LC> { static bool hasPort() { return 1; } \
static const char *portName() { return #L; } \
typedef BASE __t_baseType; \
static const void *portAddr() { return (void*)&__t_baseType::r(); } };

FASTLED_NAMESPACE_END

#pragma GCC diagnostic pop
Expand Down
142 changes: 71 additions & 71 deletions platforms/arm/d21/fastpin_arm_d21.h
View file
Expand Up @@ -57,19 +57,19 @@ template<uint8_t PIN, uint8_t _BIT, uint32_t _MASK, int _GRP> class _ARMPIN {
#define _R(T) struct __gen_struct_ ## T
#define _RD32(T) struct __gen_struct_ ## T { static __attribute__((always_inline)) inline volatile PortGroup * r() { return T; } };

#define _IO32(L) _RD32(GPIO ## L)
#define _FL_IO(L) _RD32(GPIO ## L)

#define _DEFPIN_ARM(PIN, L, BIT) template<> class FastPin<PIN> : public _ARMPIN<PIN, BIT, 1 << BIT, L> {};
#define _FL_DEFPIN(PIN, BIT, L) template<> class FastPin<PIN> : public _ARMPIN<PIN, BIT, 1 << BIT, L> {};

// Actual pin definitions
#if defined(ARDUINO_SAMD_CIRCUITPLAYGROUND_EXPRESS)

#define MAX_PIN 17
_DEFPIN_ARM( 8,1,23);
_DEFPIN_ARM( 0,1, 9); _DEFPIN_ARM( 1,1, 8); _DEFPIN_ARM( 2,1, 2); _DEFPIN_ARM( 3,1, 3);
_DEFPIN_ARM( 6,0, 5); _DEFPIN_ARM( 9,0, 6); _DEFPIN_ARM(10,0, 7); _DEFPIN_ARM(12,0, 2);
_DEFPIN_ARM(A6,1, 9); _DEFPIN_ARM(A7,1, 8); _DEFPIN_ARM(A5,1, 2); _DEFPIN_ARM(A4,1, 3);
_DEFPIN_ARM(A1,0, 5); _DEFPIN_ARM(A2,0, 6); _DEFPIN_ARM(A3,0, 7); _DEFPIN_ARM(A0,0, 2);
_FL_DEFPIN( 8,23,1);
_FL_DEFPIN( 0, 9,1); _FL_DEFPIN( 1, 8,1); _FL_DEFPIN( 2, 2,1); _FL_DEFPIN( 3, 3,1);
_FL_DEFPIN( 6, 5,0); _FL_DEFPIN( 9, 6,0); _FL_DEFPIN(10, 7,0); _FL_DEFPIN(12, 2,0);
_FL_DEFPIN(A6, 9,1); _FL_DEFPIN(A7, 8,1); _FL_DEFPIN(A5, 2,1); _FL_DEFPIN(A4, 3,1);
_FL_DEFPIN(A1, 5,0); _FL_DEFPIN(A2, 6,0); _FL_DEFPIN(A3, 7,0); _FL_DEFPIN(A0, 2,0);

#define HAS_HARDWARE_PIN_SUPPORT 1

Expand All @@ -78,19 +78,19 @@ _DEFPIN_ARM(A1,0, 5); _DEFPIN_ARM(A2,0, 6); _DEFPIN_ARM(A3,0, 7); _DEFPIN_ARM(A0

#define MAX_PIN 20
// 0 & 1
_DEFPIN_ARM( 0, 0, 9); _DEFPIN_ARM( 1, 0, 10);
_FL_DEFPIN( 0, 9, 0); _FL_DEFPIN( 1, 10, 0);
// 2, 3, 4
_DEFPIN_ARM( 2, 0, 14); _DEFPIN_ARM( 3, 0, 11); _DEFPIN_ARM( 4, 0, 8);
_FL_DEFPIN( 2, 14, 0); _FL_DEFPIN( 3, 11, 0); _FL_DEFPIN( 4, 8, 0);
// 5, 6, 7
_DEFPIN_ARM( 5, 0, 15); _DEFPIN_ARM( 6, 0, 18); _DEFPIN_ARM( 7, 0, 0);
_FL_DEFPIN( 5, 15, 0); _FL_DEFPIN( 6, 18, 0); _FL_DEFPIN( 7, 0, 0);
// 8, 9, 10
_DEFPIN_ARM( 8, 0, 12); _DEFPIN_ARM( 9, 0, 19); _DEFPIN_ARM(10, 0, 20);
_FL_DEFPIN( 8, 12, 0); _FL_DEFPIN( 9, 19, 0); _FL_DEFPIN(10, 20, 0);
// 11, 12, 13
_DEFPIN_ARM(11, 0, 21); _DEFPIN_ARM(12, 0, 22); _DEFPIN_ARM(13, 0, 23);
_FL_DEFPIN(11, 21, 0); _FL_DEFPIN(12, 22, 0); _FL_DEFPIN(13, 23, 0);
// 14, 15, 16 (A0 - A2)
_DEFPIN_ARM(14, 0, 2); _DEFPIN_ARM(15, 1, 8); _DEFPIN_ARM(16, 1, 9);
_FL_DEFPIN(14, 2, 0); _FL_DEFPIN(15, 8, 1); _FL_DEFPIN(16, 9, 1);
// 17, 18, 19 (A3 - A5)
_DEFPIN_ARM(17, 0, 4); _DEFPIN_ARM(18, 0, 5); _DEFPIN_ARM(19, 0, 6);
_FL_DEFPIN(17, 4, 0); _FL_DEFPIN(18, 5, 0); _FL_DEFPIN(19, 6, 0);

#define SPI_DATA PIN_SPI_MOSI
#define SPI_CLOCK PIN_SPI_SCK
Expand All @@ -101,17 +101,17 @@ _DEFPIN_ARM(17, 0, 4); _DEFPIN_ARM(18, 0, 5); _DEFPIN_ARM(19, 0, 6);
#elif defined(ARDUINO_SAMD_ZERO)

#define MAX_PIN 42
_DEFPIN_ARM( 0,0,10); _DEFPIN_ARM( 1,0,11); _DEFPIN_ARM( 2,0, 8); _DEFPIN_ARM( 3,0, 9);
_DEFPIN_ARM( 4,0,14); _DEFPIN_ARM( 5,0,15); _DEFPIN_ARM( 6,0,20); _DEFPIN_ARM( 7,0,21);
_DEFPIN_ARM( 8,0, 6); _DEFPIN_ARM( 9,0, 7); _DEFPIN_ARM(10,0,18); _DEFPIN_ARM(11,0,16);
_DEFPIN_ARM(12,0,19); _DEFPIN_ARM(13,0,17); _DEFPIN_ARM(14,0, 2); _DEFPIN_ARM(15,1, 8);
_DEFPIN_ARM(16,1, 9); _DEFPIN_ARM(17,0, 4); _DEFPIN_ARM(18,0, 5); _DEFPIN_ARM(19,1, 2);
_DEFPIN_ARM(20,0,22); _DEFPIN_ARM(21,0,23); _DEFPIN_ARM(22,0,12); _DEFPIN_ARM(23,1,11);
_DEFPIN_ARM(24,1,10); _DEFPIN_ARM(25,1, 3); _DEFPIN_ARM(26,0,27); _DEFPIN_ARM(27,0,28);
_DEFPIN_ARM(28,0,24); _DEFPIN_ARM(29,0,25); _DEFPIN_ARM(30,1,22); _DEFPIN_ARM(31,1,23);
_DEFPIN_ARM(32,0,22); _DEFPIN_ARM(33,0,23); _DEFPIN_ARM(34,0,19); _DEFPIN_ARM(35,0,16);
_DEFPIN_ARM(36,0,18); _DEFPIN_ARM(37,0,17); _DEFPIN_ARM(38,0,13); _DEFPIN_ARM(39,0,21);
_DEFPIN_ARM(40,0, 6); _DEFPIN_ARM(41,0, 7); _DEFPIN_ARM(42,0, 3);
_FL_DEFPIN( 0,10,0); _FL_DEFPIN( 1,11,0); _FL_DEFPIN( 2, 8,0); _FL_DEFPIN( 3, 9,0);
_FL_DEFPIN( 4,14,0); _FL_DEFPIN( 5,15,0); _FL_DEFPIN( 6,20,0); _FL_DEFPIN( 7,21,0);
_FL_DEFPIN( 8, 6,0); _FL_DEFPIN( 9, 7,0); _FL_DEFPIN(10,18,0); _FL_DEFPIN(11,16,0);
_FL_DEFPIN(12,19,0); _FL_DEFPIN(13,17,0); _FL_DEFPIN(14, 2,0); _FL_DEFPIN(15, 8,1);
_FL_DEFPIN(16, 9,1); _FL_DEFPIN(17, 4,0); _FL_DEFPIN(18, 5,0); _FL_DEFPIN(19, 2,1);
_FL_DEFPIN(20,22,0); _FL_DEFPIN(21,23,0); _FL_DEFPIN(22,12,0); _FL_DEFPIN(23,11,1);
_FL_DEFPIN(24,10,1); _FL_DEFPIN(25, 3,1); _FL_DEFPIN(26,27,0); _FL_DEFPIN(27,28,0);
_FL_DEFPIN(28,24,0); _FL_DEFPIN(29,25,0); _FL_DEFPIN(30,22,1); _FL_DEFPIN(31,23,1);
_FL_DEFPIN(32,22,0); _FL_DEFPIN(33,23,0); _FL_DEFPIN(34,19,0); _FL_DEFPIN(35,16,0);
_FL_DEFPIN(36,18,0); _FL_DEFPIN(37,17,0); _FL_DEFPIN(38,13,0); _FL_DEFPIN(39,21,0);
_FL_DEFPIN(40, 6,0); _FL_DEFPIN(41, 7,0); _FL_DEFPIN(42, 3,0);

#define SPI_DATA 24
#define SPI_CLOCK 23
Expand All @@ -121,21 +121,21 @@ _DEFPIN_ARM(40,0, 6); _DEFPIN_ARM(41,0, 7); _DEFPIN_ARM(42,0, 3);
#elif defined(ARDUINO_SODAQ_AUTONOMO)

#define MAX_PIN 56
_DEFPIN_ARM( 0,0, 9); _DEFPIN_ARM( 1,0,10); _DEFPIN_ARM( 2,0,11); _DEFPIN_ARM( 3,1,10);
_DEFPIN_ARM( 4,1,11); _DEFPIN_ARM( 5,1,12); _DEFPIN_ARM( 6,1,13); _DEFPIN_ARM( 7,1,14);
_DEFPIN_ARM( 8,1,15); _DEFPIN_ARM( 9,0,14); _DEFPIN_ARM(10,0,15); _DEFPIN_ARM(11,0,16);
_DEFPIN_ARM(12,0,17); _DEFPIN_ARM(13,0,18); _DEFPIN_ARM(14,0,19); _DEFPIN_ARM(15,1,16);
_DEFPIN_ARM(16,0, 8); _DEFPIN_ARM(17,0,28); _DEFPIN_ARM(18,1,17); _DEFPIN_ARM(19,0, 2);
_DEFPIN_ARM(20,0, 6); _DEFPIN_ARM(21,0, 5); _DEFPIN_ARM(22,0, 4); _DEFPIN_ARM(23,1, 9);
_DEFPIN_ARM(24,1, 8); _DEFPIN_ARM(25,1, 7); _DEFPIN_ARM(26,1, 6); _DEFPIN_ARM(27,1, 5);
_DEFPIN_ARM(28,1, 4); _DEFPIN_ARM(29,0, 7); _DEFPIN_ARM(30,1, 3); _DEFPIN_ARM(31,1, 2);
_DEFPIN_ARM(32,1, 1); _DEFPIN_ARM(33,1, 0); _DEFPIN_ARM(34,0, 3); _DEFPIN_ARM(35,0, 3);
_DEFPIN_ARM(36,1,30); _DEFPIN_ARM(37,1,31); _DEFPIN_ARM(38,1,22); _DEFPIN_ARM(39,1,23);
_DEFPIN_ARM(40,0,12); _DEFPIN_ARM(41,0,13); _DEFPIN_ARM(42,0,22); _DEFPIN_ARM(43,0,23);
_DEFPIN_ARM(44,0,20); _DEFPIN_ARM(45,0,21); _DEFPIN_ARM(46,0,27); _DEFPIN_ARM(47,0,24);
_DEFPIN_ARM(48,0,25); _DEFPIN_ARM(49,1,13); _DEFPIN_ARM(50,1,14); _DEFPIN_ARM(51,0,17);
_DEFPIN_ARM(52,0,18); _DEFPIN_ARM(53,1,12); _DEFPIN_ARM(54,1,13); _DEFPIN_ARM(55,1,14);
_DEFPIN_ARM(56,1,15);
_FL_DEFPIN( 0, 9,0); _FL_DEFPIN( 1,10,0); _FL_DEFPIN( 2,11,0); _FL_DEFPIN( 3,10,1);
_FL_DEFPIN( 4,11,1); _FL_DEFPIN( 5,12,1); _FL_DEFPIN( 6,13,1); _FL_DEFPIN( 7,14,1);
_FL_DEFPIN( 8,15,1); _FL_DEFPIN( 9,14,0); _FL_DEFPIN(10,15,0); _FL_DEFPIN(11,16,0);
_FL_DEFPIN(12,17,0); _FL_DEFPIN(13,18,0); _FL_DEFPIN(14,19,0); _FL_DEFPIN(15,16,1);
_FL_DEFPIN(16, 8,0); _FL_DEFPIN(17,28,0); _FL_DEFPIN(18,17,1); _FL_DEFPIN(19, 2,0);
_FL_DEFPIN(20, 6,0); _FL_DEFPIN(21, 5,0); _FL_DEFPIN(22, 4,0); _FL_DEFPIN(23, 9,1);
_FL_DEFPIN(24, 8,1); _FL_DEFPIN(25, 7,1); _FL_DEFPIN(26, 6,1); _FL_DEFPIN(27, 5,1);
_FL_DEFPIN(28, 4,1); _FL_DEFPIN(29, 7,0); _FL_DEFPIN(30, 3,1); _FL_DEFPIN(31, 2,1);
_FL_DEFPIN(32, 1,1); _FL_DEFPIN(33, 0,1); _FL_DEFPIN(34, 3,0); _FL_DEFPIN(35, 3,0);
_FL_DEFPIN(36,30,1); _FL_DEFPIN(37,31,1); _FL_DEFPIN(38,22,1); _FL_DEFPIN(39,23,1);
_FL_DEFPIN(40,12,0); _FL_DEFPIN(41,13,0); _FL_DEFPIN(42,22,0); _FL_DEFPIN(43,23,0);
_FL_DEFPIN(44,20,0); _FL_DEFPIN(45,21,0); _FL_DEFPIN(46,27,0); _FL_DEFPIN(47,24,0);
_FL_DEFPIN(48,25,0); _FL_DEFPIN(49,13,1); _FL_DEFPIN(50,14,1); _FL_DEFPIN(51,17,0);
_FL_DEFPIN(52,18,0); _FL_DEFPIN(53,12,1); _FL_DEFPIN(54,13,1); _FL_DEFPIN(55,14,1);
_FL_DEFPIN(56,15,1);

#define SPI_DATA 44
#define SPI_CLOCK 45
Expand All @@ -145,24 +145,24 @@ _DEFPIN_ARM(56,1,15);
#elif defined(ARDUINO_SAMD_WINO)

#define MAX_PIN 22
_DEFPIN_ARM( 0, 0, 23); _DEFPIN_ARM( 1, 0, 22); _DEFPIN_ARM( 2, 0, 16); _DEFPIN_ARM( 3, 0, 17);
_DEFPIN_ARM( 4, 0, 18); _DEFPIN_ARM( 5, 0, 19); _DEFPIN_ARM( 6, 0, 24); _DEFPIN_ARM( 7, 0, 25);
_DEFPIN_ARM( 8, 0, 27); _DEFPIN_ARM( 9, 0, 28); _DEFPIN_ARM( 10, 0, 30); _DEFPIN_ARM( 11, 0, 31);
_DEFPIN_ARM( 12, 0, 15); _DEFPIN_ARM( 13, 0, 14); _DEFPIN_ARM( 14, 0, 2); _DEFPIN_ARM( 15, 0, 3);
_DEFPIN_ARM( 16, 0, 4); _DEFPIN_ARM( 17, 0, 5); _DEFPIN_ARM( 18, 0, 6); _DEFPIN_ARM( 19, 0, 7);
_DEFPIN_ARM( 20, 0, 8); _DEFPIN_ARM( 21, 0, 9); _DEFPIN_ARM( 22, 0, 10); _DEFPIN_ARM( 23, 0, 11);
_FL_DEFPIN( 0, 23, 0); _FL_DEFPIN( 1, 22, 0); _FL_DEFPIN( 2, 16, 0); _FL_DEFPIN( 3, 17, 0);
_FL_DEFPIN( 4, 18, 0); _FL_DEFPIN( 5, 19, 0); _FL_DEFPIN( 6, 24, 0); _FL_DEFPIN( 7, 25, 0);
_FL_DEFPIN( 8, 27, 0); _FL_DEFPIN( 9, 28, 0); _FL_DEFPIN( 10, 30, 0); _FL_DEFPIN( 11, 31, 0);
_FL_DEFPIN( 12, 15, 0); _FL_DEFPIN( 13, 14, 0); _FL_DEFPIN( 14, 2, 0); _FL_DEFPIN( 15, 3, 0);
_FL_DEFPIN( 16, 4, 0); _FL_DEFPIN( 17, 5, 0); _FL_DEFPIN( 18, 6, 0); _FL_DEFPIN( 19, 7, 0);
_FL_DEFPIN( 20, 8, 0); _FL_DEFPIN( 21, 9, 0); _FL_DEFPIN( 22, 10, 0); _FL_DEFPIN( 23, 11, 0);

#define HAS_HARDWARE_PIN_SUPPORT 1

#elif defined(ARDUINO_SAMD_MKR1000)

#define MAX_PIN 22
_DEFPIN_ARM( 0, 0, 22); _DEFPIN_ARM( 1, 0, 23); _DEFPIN_ARM( 2, 0, 10); _DEFPIN_ARM( 3, 0, 11);
_DEFPIN_ARM( 4, 1, 10); _DEFPIN_ARM( 5, 1, 11); _DEFPIN_ARM( 6, 0, 20); _DEFPIN_ARM( 7, 0, 21);
_DEFPIN_ARM( 8, 0, 16); _DEFPIN_ARM( 9, 0, 17); _DEFPIN_ARM( 10, 0, 19); _DEFPIN_ARM( 11, 0, 8);
_DEFPIN_ARM( 12, 0, 9); _DEFPIN_ARM( 13, 1, 23); _DEFPIN_ARM( 14, 1, 22); _DEFPIN_ARM( 15, 0, 2);
_DEFPIN_ARM( 16, 1, 2); _DEFPIN_ARM( 17, 1, 3); _DEFPIN_ARM( 18, 0, 4); _DEFPIN_ARM( 19, 0, 5);
_DEFPIN_ARM( 20, 0, 6); _DEFPIN_ARM( 21, 0, 7);
_FL_DEFPIN( 0, 22, 0); _FL_DEFPIN( 1, 23, 0); _FL_DEFPIN( 2, 10, 0); _FL_DEFPIN( 3, 11, 0);
_FL_DEFPIN( 4, 10, 1); _FL_DEFPIN( 5, 11, 1); _FL_DEFPIN( 6, 20, 0); _FL_DEFPIN( 7, 21, 0);
_FL_DEFPIN( 8, 16, 0); _FL_DEFPIN( 9, 17, 0); _FL_DEFPIN( 10, 19, 0); _FL_DEFPIN( 11, 8, 0);
_FL_DEFPIN( 12, 9, 0); _FL_DEFPIN( 13, 23, 1); _FL_DEFPIN( 14, 22, 1); _FL_DEFPIN( 15, 2, 0);
_FL_DEFPIN( 16, 2, 1); _FL_DEFPIN( 17, 3, 1); _FL_DEFPIN( 18, 4, 0); _FL_DEFPIN( 19, 5, 0);
_FL_DEFPIN( 20, 6, 0); _FL_DEFPIN( 21, 7, 0);

#define SPI_DATA 8
#define SPI_CLOCK 9
Expand All @@ -172,13 +172,13 @@ _DEFPIN_ARM( 20, 0, 6); _DEFPIN_ARM( 21, 0, 7);
#elif defined(ARDUINO_SAMD_NANO_33_IOT)

#define MAX_PIN 25
_DEFPIN_ARM( 0, 0, 11); _DEFPIN_ARM( 1, 0, 10); _DEFPIN_ARM( 2, 0, 14); _DEFPIN_ARM( 3, 0, 9);
_DEFPIN_ARM( 4, 0, 8); _DEFPIN_ARM( 5, 0, 15); _DEFPIN_ARM( 6, 0, 20); _DEFPIN_ARM( 7, 0, 21);
_DEFPIN_ARM( 8, 0, 6); _DEFPIN_ARM( 9, 0, 7); _DEFPIN_ARM( 10, 0, 18); _DEFPIN_ARM( 11, 0, 16);
_DEFPIN_ARM( 12, 0, 19); _DEFPIN_ARM( 13, 0, 17); _DEFPIN_ARM( 14, 0, 2); _DEFPIN_ARM( 15, 1, 8);
_DEFPIN_ARM( 16, 1, 9); _DEFPIN_ARM( 17, 0, 4); _DEFPIN_ARM( 18, 0, 5); _DEFPIN_ARM( 19, 1, 2);
_DEFPIN_ARM( 20, 0, 22); _DEFPIN_ARM( 21, 0, 23); _DEFPIN_ARM( 22, 0, 12); _DEFPIN_ARM( 23, 1, 10);
_DEFPIN_ARM( 24, 1, 11);
_FL_DEFPIN( 0, 11, 0); _FL_DEFPIN( 1, 10, 0); _FL_DEFPIN( 2, 14, 0); _FL_DEFPIN( 3, 9, 0);
_FL_DEFPIN( 4, 8, 0); _FL_DEFPIN( 5, 15, 0); _FL_DEFPIN( 6, 20, 0); _FL_DEFPIN( 7, 21, 0);
_FL_DEFPIN( 8, 6, 0); _FL_DEFPIN( 9, 7, 0); _FL_DEFPIN( 10, 18, 0); _FL_DEFPIN( 11, 16, 0);
_FL_DEFPIN( 12, 19, 0); _FL_DEFPIN( 13, 17, 0); _FL_DEFPIN( 14, 2, 0); _FL_DEFPIN( 15, 8, 1);
_FL_DEFPIN( 16, 9, 1); _FL_DEFPIN( 17, 4, 0); _FL_DEFPIN( 18, 5, 0); _FL_DEFPIN( 19, 2, 1);
_FL_DEFPIN( 20, 22, 0); _FL_DEFPIN( 21, 23, 0); _FL_DEFPIN( 22, 12, 0); _FL_DEFPIN( 23, 10, 1);
_FL_DEFPIN( 24, 11, 1);

#define SPI_DATA 23
#define SPI_CLOCK 24
Expand All @@ -188,16 +188,16 @@ _DEFPIN_ARM( 24, 1, 11);
#elif defined(ARDUINO_GEMMA_M0)

#define MAX_PIN 4
_DEFPIN_ARM( 0, 0, 4); _DEFPIN_ARM( 1, 0, 2); _DEFPIN_ARM( 2, 0, 5);
_DEFPIN_ARM( 3, 0, 0); _DEFPIN_ARM( 4, 0, 1);
_FL_DEFPIN( 0, 4, 0); _FL_DEFPIN( 1, 2, 0); _FL_DEFPIN( 2, 5, 0);
_FL_DEFPIN( 3, 0, 0); _FL_DEFPIN( 4, 1, 0);

#define HAS_HARDWARE_PIN_SUPPORT 1

#elif defined(ADAFRUIT_TRINKET_M0)

#define MAX_PIN 7
_DEFPIN_ARM( 0, 0, 8); _DEFPIN_ARM( 1, 0, 2); _DEFPIN_ARM( 2, 0, 9);
_DEFPIN_ARM( 3, 0, 7); _DEFPIN_ARM( 4, 0, 6); _DEFPIN_ARM( 7, 0, 0); _DEFPIN_ARM( 8, 0, 1);
_FL_DEFPIN( 0, 8, 0); _FL_DEFPIN( 1, 2, 0); _FL_DEFPIN( 2, 9, 0);
_FL_DEFPIN( 3, 7, 0); _FL_DEFPIN( 4, 6, 0); _FL_DEFPIN( 7, 0, 0); _FL_DEFPIN( 8, 1, 0);

#define SPI_DATA 4
#define SPI_CLOCK 3
Expand All @@ -207,14 +207,14 @@ _DEFPIN_ARM( 3, 0, 7); _DEFPIN_ARM( 4, 0, 6); _DEFPIN_ARM( 7, 0, 0); _DEFPIN_ARM
#elif defined(ADAFRUIT_ITSYBITSY_M0)

#define MAX_PIN 16
_DEFPIN_ARM( 2, 0, 14); _DEFPIN_ARM( 3, 0, 9); _DEFPIN_ARM( 4, 0, 8);
_DEFPIN_ARM( 5, 0, 15); _DEFPIN_ARM( 6, 0, 20); _DEFPIN_ARM( 7, 0, 21);
_DEFPIN_ARM( 8, 0, 6); _DEFPIN_ARM( 9, 0, 7); _DEFPIN_ARM( 10, 0, 18);
_DEFPIN_ARM( 11, 0, 16); _DEFPIN_ARM( 12, 0, 19); _DEFPIN_ARM( 13, 0, 17);
_DEFPIN_ARM( 29, 0, 10); // MOSI
_DEFPIN_ARM( 30, 0, 11); // SCK
_DEFPIN_ARM( 40, 0, 0); //APA102 Clock
_DEFPIN_ARM( 41, 0, 1) //APA102 Data
_FL_DEFPIN( 2, 14, 0); _FL_DEFPIN( 3, 9, 0); _FL_DEFPIN( 4, 8, 0);
_FL_DEFPIN( 5, 15, 0); _FL_DEFPIN( 6, 20, 0); _FL_DEFPIN( 7, 21, 0);
_FL_DEFPIN( 8, 6, 0); _FL_DEFPIN( 9, 7, 0); _FL_DEFPIN( 10, 18, 0);
_FL_DEFPIN( 11, 16, 0); _FL_DEFPIN( 12, 19, 0); _FL_DEFPIN( 13, 17, 0);
_FL_DEFPIN( 29, 10, 0); // MOSI
_FL_DEFPIN( 30, 11, 0); // SCK
_FL_DEFPIN( 40, 0, 0); //APA102 Clock
_FL_DEFPIN( 41, 0, 1) //APA102 Data

#define SPI_DATA 29
#define SPI_CLOCK 30
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