/
dmi_wrapper.go
4656 lines (4096 loc) · 110 KB
/
dmi_wrapper.go
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package cuda
/*
THIS FILE IS AUTO-GENERATED BY CUDA2GO.
EDITING IS FUTILE.
*/
import (
"github.com/mumax/3/cuda/cu"
"github.com/mumax/3/timer"
"sync"
"unsafe"
)
// CUDA handle for adddmi kernel
var adddmi_code cu.Function
// Stores the arguments for adddmi kernel invocation
type adddmi_args_t struct {
arg_Hx unsafe.Pointer
arg_Hy unsafe.Pointer
arg_Hz unsafe.Pointer
arg_mx unsafe.Pointer
arg_my unsafe.Pointer
arg_mz unsafe.Pointer
arg_aLUT2d unsafe.Pointer
arg_dLUT2d unsafe.Pointer
arg_regions unsafe.Pointer
arg_cx float32
arg_cy float32
arg_cz float32
arg_Nx int
arg_Ny int
arg_Nz int
arg_PBC byte
argptr [16]unsafe.Pointer
sync.Mutex
}
// Stores the arguments for adddmi kernel invocation
var adddmi_args adddmi_args_t
func init() {
// CUDA driver kernel call wants pointers to arguments, set them up once.
adddmi_args.argptr[0] = unsafe.Pointer(&adddmi_args.arg_Hx)
adddmi_args.argptr[1] = unsafe.Pointer(&adddmi_args.arg_Hy)
adddmi_args.argptr[2] = unsafe.Pointer(&adddmi_args.arg_Hz)
adddmi_args.argptr[3] = unsafe.Pointer(&adddmi_args.arg_mx)
adddmi_args.argptr[4] = unsafe.Pointer(&adddmi_args.arg_my)
adddmi_args.argptr[5] = unsafe.Pointer(&adddmi_args.arg_mz)
adddmi_args.argptr[6] = unsafe.Pointer(&adddmi_args.arg_aLUT2d)
adddmi_args.argptr[7] = unsafe.Pointer(&adddmi_args.arg_dLUT2d)
adddmi_args.argptr[8] = unsafe.Pointer(&adddmi_args.arg_regions)
adddmi_args.argptr[9] = unsafe.Pointer(&adddmi_args.arg_cx)
adddmi_args.argptr[10] = unsafe.Pointer(&adddmi_args.arg_cy)
adddmi_args.argptr[11] = unsafe.Pointer(&adddmi_args.arg_cz)
adddmi_args.argptr[12] = unsafe.Pointer(&adddmi_args.arg_Nx)
adddmi_args.argptr[13] = unsafe.Pointer(&adddmi_args.arg_Ny)
adddmi_args.argptr[14] = unsafe.Pointer(&adddmi_args.arg_Nz)
adddmi_args.argptr[15] = unsafe.Pointer(&adddmi_args.arg_PBC)
}
// Wrapper for adddmi CUDA kernel, asynchronous.
func k_adddmi_async(Hx unsafe.Pointer, Hy unsafe.Pointer, Hz unsafe.Pointer, mx unsafe.Pointer, my unsafe.Pointer, mz unsafe.Pointer, aLUT2d unsafe.Pointer, dLUT2d unsafe.Pointer, regions unsafe.Pointer, cx float32, cy float32, cz float32, Nx int, Ny int, Nz int, PBC byte, cfg *config) {
if Synchronous { // debug
Sync()
timer.Start("adddmi")
}
adddmi_args.Lock()
defer adddmi_args.Unlock()
if adddmi_code == 0 {
adddmi_code = fatbinLoad(adddmi_map, "adddmi")
}
adddmi_args.arg_Hx = Hx
adddmi_args.arg_Hy = Hy
adddmi_args.arg_Hz = Hz
adddmi_args.arg_mx = mx
adddmi_args.arg_my = my
adddmi_args.arg_mz = mz
adddmi_args.arg_aLUT2d = aLUT2d
adddmi_args.arg_dLUT2d = dLUT2d
adddmi_args.arg_regions = regions
adddmi_args.arg_cx = cx
adddmi_args.arg_cy = cy
adddmi_args.arg_cz = cz
adddmi_args.arg_Nx = Nx
adddmi_args.arg_Ny = Ny
adddmi_args.arg_Nz = Nz
adddmi_args.arg_PBC = PBC
args := adddmi_args.argptr[:]
cu.LaunchKernel(adddmi_code, cfg.Grid.X, cfg.Grid.Y, cfg.Grid.Z, cfg.Block.X, cfg.Block.Y, cfg.Block.Z, 0, stream0, args)
if Synchronous { // debug
Sync()
timer.Stop("adddmi")
}
}
// maps compute capability on PTX code for adddmi kernel.
var adddmi_map = map[int]string{0: "",
20: adddmi_ptx_20,
30: adddmi_ptx_30,
35: adddmi_ptx_35,
50: adddmi_ptx_50,
52: adddmi_ptx_52,
53: adddmi_ptx_53}
// adddmi PTX code for various compute capabilities.
const (
adddmi_ptx_20 = `
.version 4.3
.target sm_20
.address_size 64
// .globl adddmi
.visible .entry adddmi(
.param .u64 adddmi_param_0,
.param .u64 adddmi_param_1,
.param .u64 adddmi_param_2,
.param .u64 adddmi_param_3,
.param .u64 adddmi_param_4,
.param .u64 adddmi_param_5,
.param .u64 adddmi_param_6,
.param .u64 adddmi_param_7,
.param .u64 adddmi_param_8,
.param .f32 adddmi_param_9,
.param .f32 adddmi_param_10,
.param .f32 adddmi_param_11,
.param .u32 adddmi_param_12,
.param .u32 adddmi_param_13,
.param .u32 adddmi_param_14,
.param .u8 adddmi_param_15
)
{
.reg .pred %p<42>;
.reg .b16 %rs<29>;
.reg .f32 %f<232>;
.reg .b32 %r<280>;
.reg .b64 %rd<124>;
ld.param.u64 %rd8, [adddmi_param_0];
ld.param.u64 %rd9, [adddmi_param_1];
ld.param.u64 %rd10, [adddmi_param_2];
ld.param.u64 %rd11, [adddmi_param_3];
ld.param.u64 %rd12, [adddmi_param_4];
ld.param.u64 %rd13, [adddmi_param_5];
ld.param.u64 %rd14, [adddmi_param_6];
ld.param.u64 %rd15, [adddmi_param_7];
ld.param.u64 %rd16, [adddmi_param_8];
ld.param.f32 %f101, [adddmi_param_9];
ld.param.f32 %f102, [adddmi_param_10];
ld.param.f32 %f103, [adddmi_param_11];
ld.param.u32 %r65, [adddmi_param_12];
ld.param.u32 %r66, [adddmi_param_13];
ld.param.u32 %r67, [adddmi_param_14];
ld.param.u8 %rs8, [adddmi_param_15];
mov.u32 %r68, %ntid.x;
mov.u32 %r69, %ctaid.x;
mov.u32 %r70, %tid.x;
mad.lo.s32 %r1, %r68, %r69, %r70;
mov.u32 %r71, %ntid.y;
mov.u32 %r72, %ctaid.y;
mov.u32 %r73, %tid.y;
mad.lo.s32 %r2, %r71, %r72, %r73;
mov.u32 %r74, %ntid.z;
mov.u32 %r75, %ctaid.z;
mov.u32 %r76, %tid.z;
mad.lo.s32 %r3, %r74, %r75, %r76;
setp.ge.s32 %p1, %r2, %r66;
setp.ge.s32 %p2, %r1, %r65;
or.pred %p3, %p1, %p2;
setp.ge.s32 %p4, %r3, %r67;
or.pred %p5, %p3, %p4;
@%p5 bra BB0_73;
cvta.to.global.u64 %rd17, %rd16;
cvta.to.global.u64 %rd18, %rd13;
cvta.to.global.u64 %rd19, %rd12;
cvta.to.global.u64 %rd20, %rd11;
mad.lo.s32 %r77, %r3, %r66, %r2;
mad.lo.s32 %r78, %r77, %r65, %r1;
cvt.s64.s32 %rd1, %r78;
mul.wide.s32 %rd21, %r78, 4;
add.s64 %rd22, %rd20, %rd21;
add.s64 %rd23, %rd19, %rd21;
add.s64 %rd24, %rd18, %rd21;
add.s64 %rd25, %rd17, %rd1;
ld.global.u8 %rs1, [%rd25];
cvt.u32.u16 %r79, %rs1;
and.b32 %r4, %r79, 255;
ld.global.f32 %f1, [%rd22];
ld.global.f32 %f2, [%rd23];
mul.f32 %f104, %f2, %f2;
fma.rn.f32 %f105, %f1, %f1, %f104;
ld.global.f32 %f3, [%rd24];
fma.rn.f32 %f106, %f3, %f3, %f105;
setp.eq.f32 %p6, %f106, 0f00000000;
@%p6 bra BB0_73;
cvta.to.global.u64 %rd26, %rd8;
shl.b64 %rd27, %rd1, 2;
add.s64 %rd28, %rd26, %rd27;
ld.global.f32 %f4, [%rd28];
cvta.to.global.u64 %rd29, %rd9;
add.s64 %rd30, %rd29, %rd27;
ld.global.f32 %f5, [%rd30];
cvta.to.global.u64 %rd31, %rd10;
add.s64 %rd32, %rd31, %rd27;
ld.global.f32 %f6, [%rd32];
and.b16 %rs9, %rs8, 1;
setp.eq.b16 %p7, %rs9, 1;
add.s32 %r5, %r1, -1;
@!%p7 bra BB0_4;
bra.uni BB0_3;
BB0_3:
rem.s32 %r84, %r5, %r65;
add.s32 %r85, %r84, %r65;
rem.s32 %r264, %r85, %r65;
bra.uni BB0_5;
BB0_4:
mov.u32 %r86, 0;
max.s32 %r264, %r5, %r86;
BB0_5:
mad.lo.s32 %r96, %r77, %r65, %r264;
setp.gt.s32 %p8, %r1, 0;
setp.eq.b16 %p9, %rs9, 1;
or.pred %p10, %p8, %p9;
cvt.s64.s32 %rd2, %r96;
mov.f32 %f202, 0f00000000;
mov.f32 %f209, %f202;
mov.f32 %f201, %f202;
@!%p10 bra BB0_7;
bra.uni BB0_6;
BB0_6:
shl.b64 %rd34, %rd2, 2;
add.s64 %rd35, %rd20, %rd34;
ld.global.f32 %f201, [%rd35];
add.s64 %rd37, %rd19, %rd34;
ld.global.f32 %f209, [%rd37];
add.s64 %rd39, %rd18, %rd34;
ld.global.f32 %f202, [%rd39];
BB0_7:
mov.f32 %f11, %f209;
add.s64 %rd41, %rd17, %rd2;
ld.global.u8 %rs2, [%rd41];
cvt.u32.u16 %r9, %rs2;
setp.gt.u16 %p11, %rs2, %rs1;
@%p11 bra BB0_9;
bra.uni BB0_8;
BB0_9:
add.s32 %r104, %r9, 1;
mul.lo.s32 %r105, %r104, %r9;
shr.u32 %r106, %r105, 1;
add.s32 %r265, %r106, %r4;
bra.uni BB0_10;
BB0_8:
add.s32 %r101, %r4, 1;
mul.lo.s32 %r102, %r101, %r4;
shr.u32 %r103, %r102, 1;
add.s32 %r265, %r9, %r103;
BB0_10:
cvta.to.global.u64 %rd42, %rd14;
mul.wide.s32 %rd43, %r265, 4;
add.s64 %rd44, %rd42, %rd43;
ld.global.f32 %f13, [%rd44];
@%p11 bra BB0_12;
bra.uni BB0_11;
BB0_12:
add.s32 %r110, %r9, 1;
mul.lo.s32 %r111, %r110, %r9;
shr.u32 %r112, %r111, 1;
add.s32 %r266, %r112, %r4;
bra.uni BB0_13;
BB0_11:
add.s32 %r107, %r4, 1;
mul.lo.s32 %r108, %r107, %r4;
shr.u32 %r109, %r108, 1;
add.s32 %r266, %r9, %r109;
BB0_13:
cvta.to.global.u64 %rd45, %rd15;
mul.wide.s32 %rd46, %r266, 4;
add.s64 %rd47, %rd45, %rd46;
ld.global.f32 %f14, [%rd47];
mul.f32 %f110, %f11, %f11;
fma.rn.f32 %f111, %f201, %f201, %f110;
fma.rn.f32 %f112, %f202, %f202, %f111;
setp.neu.f32 %p13, %f112, 0f00000000;
mov.f32 %f208, %f11;
@%p13 bra BB0_15;
mul.f32 %f113, %f14, 0f3F000000;
div.rn.f32 %f114, %f113, %f13;
mul.f32 %f115, %f114, %f101;
fma.rn.f32 %f201, %f3, %f115, %f1;
mul.f32 %f116, %f1, %f115;
sub.f32 %f202, %f3, %f116;
mov.f32 %f208, %f2;
BB0_15:
mov.f32 %f18, %f208;
setp.eq.b16 %p14, %rs9, 1;
mul.f32 %f20, %f101, %f101;
add.f32 %f117, %f13, %f13;
div.rn.f32 %f118, %f117, %f20;
sub.f32 %f119, %f201, %f1;
sub.f32 %f120, %f18, %f2;
sub.f32 %f121, %f202, %f3;
fma.rn.f32 %f122, %f119, %f118, %f4;
fma.rn.f32 %f21, %f120, %f118, %f5;
fma.rn.f32 %f123, %f118, %f121, %f6;
div.rn.f32 %f124, %f14, %f101;
mul.f32 %f125, %f202, %f124;
sub.f32 %f22, %f122, %f125;
fma.rn.f32 %f23, %f201, %f124, %f123;
add.s32 %r16, %r1, 1;
@!%p14 bra BB0_17;
bra.uni BB0_16;
BB0_16:
rem.s32 %r117, %r16, %r65;
add.s32 %r118, %r117, %r65;
rem.s32 %r267, %r118, %r65;
bra.uni BB0_18;
BB0_17:
add.s32 %r119, %r65, -1;
min.s32 %r267, %r16, %r119;
BB0_18:
setp.eq.b16 %p15, %rs9, 1;
mad.lo.s32 %r129, %r77, %r65, %r267;
setp.lt.s32 %p16, %r16, %r65;
or.pred %p17, %p16, %p15;
cvt.s64.s32 %rd3, %r129;
mov.f32 %f211, 0f00000000;
mov.f32 %f210, %f211;
mov.f32 %f203, %f211;
@!%p17 bra BB0_20;
bra.uni BB0_19;
BB0_19:
shl.b64 %rd49, %rd3, 2;
add.s64 %rd50, %rd20, %rd49;
ld.global.f32 %f203, [%rd50];
add.s64 %rd52, %rd19, %rd49;
ld.global.f32 %f210, [%rd52];
add.s64 %rd54, %rd18, %rd49;
ld.global.f32 %f211, [%rd54];
BB0_20:
mov.f32 %f207, %f210;
add.s64 %rd56, %rd17, %rd3;
ld.global.u8 %rs3, [%rd56];
cvt.u32.u16 %r20, %rs3;
setp.gt.u16 %p18, %rs3, %rs1;
@%p18 bra BB0_22;
bra.uni BB0_21;
BB0_22:
add.s32 %r133, %r20, 1;
mul.lo.s32 %r134, %r133, %r20;
shr.u32 %r135, %r134, 1;
add.s32 %r268, %r135, %r4;
bra.uni BB0_23;
BB0_21:
add.s32 %r130, %r4, 1;
mul.lo.s32 %r131, %r130, %r4;
shr.u32 %r132, %r131, 1;
add.s32 %r268, %r20, %r132;
BB0_23:
mul.wide.s32 %rd58, %r268, 4;
add.s64 %rd59, %rd42, %rd58;
ld.global.f32 %f30, [%rd59];
@%p18 bra BB0_25;
bra.uni BB0_24;
BB0_25:
add.s32 %r139, %r20, 1;
mul.lo.s32 %r140, %r139, %r20;
shr.u32 %r141, %r140, 1;
add.s32 %r269, %r141, %r4;
bra.uni BB0_26;
BB0_24:
add.s32 %r136, %r4, 1;
mul.lo.s32 %r137, %r136, %r4;
shr.u32 %r138, %r137, 1;
add.s32 %r269, %r20, %r138;
BB0_26:
mul.wide.s32 %rd61, %r269, 4;
add.s64 %rd62, %rd45, %rd61;
ld.global.f32 %f31, [%rd62];
mul.f32 %f129, %f207, %f207;
fma.rn.f32 %f130, %f203, %f203, %f129;
fma.rn.f32 %f131, %f211, %f211, %f130;
setp.neu.f32 %p20, %f131, 0f00000000;
@%p20 bra BB0_28;
mul.f32 %f132, %f31, 0f3F000000;
div.rn.f32 %f133, %f132, %f30;
mul.f32 %f134, %f133, %f101;
mul.f32 %f135, %f3, %f134;
sub.f32 %f203, %f1, %f135;
fma.rn.f32 %f211, %f1, %f134, %f3;
mov.f32 %f207, %f2;
BB0_28:
add.f32 %f136, %f30, %f30;
div.rn.f32 %f137, %f136, %f20;
sub.f32 %f138, %f203, %f1;
sub.f32 %f139, %f207, %f2;
sub.f32 %f140, %f211, %f3;
fma.rn.f32 %f141, %f138, %f137, %f22;
fma.rn.f32 %f37, %f139, %f137, %f21;
fma.rn.f32 %f142, %f137, %f140, %f23;
div.rn.f32 %f143, %f31, %f101;
fma.rn.f32 %f38, %f211, %f143, %f141;
mul.f32 %f144, %f203, %f143;
sub.f32 %f39, %f142, %f144;
and.b16 %rs4, %rs8, 2;
setp.eq.s16 %p21, %rs4, 0;
add.s32 %r27, %r2, -1;
@%p21 bra BB0_30;
rem.s32 %r146, %r27, %r66;
add.s32 %r147, %r146, %r66;
rem.s32 %r270, %r147, %r66;
bra.uni BB0_31;
BB0_30:
mov.u32 %r148, 0;
max.s32 %r270, %r27, %r148;
BB0_31:
mad.lo.s32 %r153, %r3, %r66, %r270;
mad.lo.s32 %r158, %r153, %r65, %r1;
setp.gt.s32 %p22, %r2, 0;
setp.ne.s16 %p23, %rs4, 0;
or.pred %p24, %p22, %p23;
cvt.s64.s32 %rd4, %r158;
mov.f32 %f213, 0f00000000;
mov.f32 %f212, %f213;
mov.f32 %f219, %f213;
@!%p24 bra BB0_33;
bra.uni BB0_32;
BB0_32:
shl.b64 %rd64, %rd4, 2;
add.s64 %rd65, %rd20, %rd64;
ld.global.f32 %f219, [%rd65];
add.s64 %rd67, %rd19, %rd64;
ld.global.f32 %f212, [%rd67];
add.s64 %rd69, %rd18, %rd64;
ld.global.f32 %f213, [%rd69];
BB0_33:
mov.f32 %f43, %f219;
add.s64 %rd71, %rd17, %rd4;
ld.global.u8 %rs5, [%rd71];
cvt.u32.u16 %r31, %rs5;
setp.gt.u16 %p25, %rs5, %rs1;
@%p25 bra BB0_35;
bra.uni BB0_34;
BB0_35:
add.s32 %r166, %r31, 1;
mul.lo.s32 %r167, %r166, %r31;
shr.u32 %r168, %r167, 1;
add.s32 %r271, %r168, %r4;
bra.uni BB0_36;
BB0_34:
add.s32 %r163, %r4, 1;
mul.lo.s32 %r164, %r163, %r4;
shr.u32 %r165, %r164, 1;
add.s32 %r271, %r31, %r165;
BB0_36:
mul.wide.s32 %rd73, %r271, 4;
add.s64 %rd74, %rd42, %rd73;
ld.global.f32 %f46, [%rd74];
@%p25 bra BB0_38;
bra.uni BB0_37;
BB0_38:
add.s32 %r172, %r31, 1;
mul.lo.s32 %r173, %r172, %r31;
shr.u32 %r174, %r173, 1;
add.s32 %r272, %r174, %r4;
bra.uni BB0_39;
BB0_37:
add.s32 %r169, %r4, 1;
mul.lo.s32 %r170, %r169, %r4;
shr.u32 %r171, %r170, 1;
add.s32 %r272, %r31, %r171;
BB0_39:
mul.wide.s32 %rd76, %r272, 4;
add.s64 %rd77, %rd45, %rd76;
ld.global.f32 %f47, [%rd77];
mul.f32 %f148, %f212, %f212;
fma.rn.f32 %f149, %f43, %f43, %f148;
fma.rn.f32 %f150, %f213, %f213, %f149;
setp.neu.f32 %p27, %f150, 0f00000000;
mov.f32 %f218, %f43;
@%p27 bra BB0_41;
mul.f32 %f151, %f47, 0f3F000000;
div.rn.f32 %f152, %f151, %f46;
mul.f32 %f153, %f152, %f102;
fma.rn.f32 %f212, %f3, %f153, %f2;
mul.f32 %f154, %f2, %f153;
sub.f32 %f213, %f3, %f154;
mov.f32 %f218, %f1;
BB0_41:
mov.f32 %f50, %f218;
mul.f32 %f53, %f102, %f102;
add.f32 %f155, %f46, %f46;
div.rn.f32 %f156, %f155, %f53;
sub.f32 %f157, %f50, %f1;
sub.f32 %f158, %f212, %f2;
sub.f32 %f159, %f213, %f3;
fma.rn.f32 %f54, %f157, %f156, %f38;
fma.rn.f32 %f160, %f158, %f156, %f37;
fma.rn.f32 %f161, %f156, %f159, %f39;
div.rn.f32 %f162, %f47, %f102;
mul.f32 %f163, %f213, %f162;
sub.f32 %f55, %f160, %f163;
fma.rn.f32 %f56, %f212, %f162, %f161;
add.s32 %r38, %r2, 1;
@%p21 bra BB0_43;
rem.s32 %r179, %r38, %r66;
add.s32 %r180, %r179, %r66;
rem.s32 %r273, %r180, %r66;
bra.uni BB0_44;
BB0_43:
add.s32 %r181, %r66, -1;
min.s32 %r273, %r38, %r181;
BB0_44:
mad.lo.s32 %r186, %r3, %r66, %r273;
mad.lo.s32 %r191, %r186, %r65, %r1;
setp.lt.s32 %p29, %r38, %r66;
or.pred %p31, %p29, %p23;
cvt.s64.s32 %rd5, %r191;
mov.f32 %f222, 0f00000000;
mov.f32 %f221, %f222;
mov.f32 %f220, %f222;
@!%p31 bra BB0_46;
bra.uni BB0_45;
BB0_45:
shl.b64 %rd79, %rd5, 2;
add.s64 %rd80, %rd20, %rd79;
ld.global.f32 %f220, [%rd80];
add.s64 %rd82, %rd19, %rd79;
ld.global.f32 %f221, [%rd82];
add.s64 %rd84, %rd18, %rd79;
ld.global.f32 %f222, [%rd84];
BB0_46:
mov.f32 %f217, %f220;
add.s64 %rd86, %rd17, %rd5;
ld.global.u8 %rs6, [%rd86];
cvt.u32.u16 %r42, %rs6;
setp.gt.u16 %p32, %rs6, %rs1;
@%p32 bra BB0_48;
bra.uni BB0_47;
BB0_48:
add.s32 %r195, %r42, 1;
mul.lo.s32 %r196, %r195, %r42;
shr.u32 %r197, %r196, 1;
add.s32 %r274, %r197, %r4;
bra.uni BB0_49;
BB0_47:
add.s32 %r192, %r4, 1;
mul.lo.s32 %r193, %r192, %r4;
shr.u32 %r194, %r193, 1;
add.s32 %r274, %r42, %r194;
BB0_49:
mul.wide.s32 %rd88, %r274, 4;
add.s64 %rd89, %rd42, %rd88;
ld.global.f32 %f63, [%rd89];
@%p32 bra BB0_51;
bra.uni BB0_50;
BB0_51:
add.s32 %r201, %r42, 1;
mul.lo.s32 %r202, %r201, %r42;
shr.u32 %r203, %r202, 1;
add.s32 %r275, %r203, %r4;
bra.uni BB0_52;
BB0_50:
add.s32 %r198, %r4, 1;
mul.lo.s32 %r199, %r198, %r4;
shr.u32 %r200, %r199, 1;
add.s32 %r275, %r42, %r200;
BB0_52:
mul.wide.s32 %rd91, %r275, 4;
add.s64 %rd92, %rd45, %rd91;
ld.global.f32 %f64, [%rd92];
mul.f32 %f167, %f221, %f221;
fma.rn.f32 %f168, %f217, %f217, %f167;
fma.rn.f32 %f169, %f222, %f222, %f168;
setp.neu.f32 %p34, %f169, 0f00000000;
@%p34 bra BB0_54;
mul.f32 %f170, %f64, 0f3F000000;
div.rn.f32 %f171, %f170, %f63;
mul.f32 %f172, %f171, %f102;
mul.f32 %f173, %f3, %f172;
sub.f32 %f221, %f2, %f173;
fma.rn.f32 %f222, %f2, %f172, %f3;
mov.f32 %f217, %f1;
BB0_54:
add.f32 %f174, %f63, %f63;
div.rn.f32 %f175, %f174, %f53;
sub.f32 %f176, %f217, %f1;
sub.f32 %f177, %f221, %f2;
sub.f32 %f178, %f222, %f3;
fma.rn.f32 %f229, %f176, %f175, %f54;
fma.rn.f32 %f179, %f177, %f175, %f55;
fma.rn.f32 %f180, %f175, %f178, %f56;
div.rn.f32 %f181, %f64, %f102;
fma.rn.f32 %f230, %f222, %f181, %f179;
mul.f32 %f182, %f221, %f181;
sub.f32 %f231, %f180, %f182;
setp.eq.s32 %p35, %r67, 1;
@%p35 bra BB0_72;
and.b16 %rs7, %rs8, 4;
setp.eq.s16 %p36, %rs7, 0;
add.s32 %r49, %r3, -1;
@%p36 bra BB0_57;
rem.s32 %r208, %r49, %r67;
add.s32 %r209, %r208, %r67;
rem.s32 %r276, %r209, %r67;
bra.uni BB0_58;
BB0_57:
mov.u32 %r210, 0;
max.s32 %r276, %r49, %r210;
BB0_58:
mad.lo.s32 %r215, %r276, %r66, %r2;
mad.lo.s32 %r220, %r215, %r65, %r1;
cvt.s64.s32 %rd6, %r220;
mul.wide.s32 %rd94, %r220, 4;
add.s64 %rd95, %rd20, %rd94;
add.s64 %rd97, %rd19, %rd94;
add.s64 %rd99, %rd18, %rd94;
ld.global.f32 %f223, [%rd95];
ld.global.f32 %f224, [%rd97];
ld.global.f32 %f225, [%rd99];
mul.f32 %f183, %f224, %f224;
fma.rn.f32 %f184, %f223, %f223, %f183;
fma.rn.f32 %f185, %f225, %f225, %f184;
setp.neu.f32 %p37, %f185, 0f00000000;
@%p37 bra BB0_60;
mov.f32 %f225, %f3;
mov.f32 %f224, %f2;
mov.f32 %f223, %f1;
BB0_60:
add.s64 %rd101, %rd17, %rd6;
ld.global.u8 %rs24, [%rd101];
setp.gt.u16 %p38, %rs24, %rs1;
cvt.u32.u16 %r53, %rs24;
@%p38 bra BB0_62;
bra.uni BB0_61;
BB0_62:
add.s32 %r224, %r53, 1;
mul.lo.s32 %r225, %r224, %r53;
shr.u32 %r226, %r225, 1;
add.s32 %r277, %r226, %r4;
bra.uni BB0_63;
BB0_61:
add.s32 %r221, %r4, 1;
mul.lo.s32 %r222, %r221, %r4;
shr.u32 %r223, %r222, 1;
add.s32 %r277, %r53, %r223;
BB0_63:
mul.wide.s32 %rd103, %r277, 4;
add.s64 %rd104, %rd42, %rd103;
ld.global.f32 %f186, [%rd104];
add.f32 %f187, %f186, %f186;
mul.f32 %f82, %f103, %f103;
div.rn.f32 %f188, %f187, %f82;
sub.f32 %f189, %f223, %f1;
sub.f32 %f190, %f224, %f2;
sub.f32 %f191, %f225, %f3;
fma.rn.f32 %f83, %f189, %f188, %f229;
fma.rn.f32 %f84, %f190, %f188, %f230;
fma.rn.f32 %f85, %f191, %f188, %f231;
add.s32 %r57, %r3, 1;
@%p36 bra BB0_65;
rem.s32 %r231, %r57, %r67;
add.s32 %r232, %r231, %r67;
rem.s32 %r278, %r232, %r67;
bra.uni BB0_66;
BB0_65:
add.s32 %r233, %r67, -1;
min.s32 %r278, %r57, %r233;
BB0_66:
mad.lo.s32 %r238, %r278, %r66, %r2;
mad.lo.s32 %r243, %r238, %r65, %r1;
cvt.s64.s32 %rd7, %r243;
mul.wide.s32 %rd106, %r243, 4;
add.s64 %rd107, %rd20, %rd106;
add.s64 %rd109, %rd19, %rd106;
add.s64 %rd111, %rd18, %rd106;
ld.global.f32 %f226, [%rd107];
ld.global.f32 %f227, [%rd109];
ld.global.f32 %f228, [%rd111];
mul.f32 %f192, %f227, %f227;
fma.rn.f32 %f193, %f226, %f226, %f192;
fma.rn.f32 %f194, %f228, %f228, %f193;
setp.neu.f32 %p40, %f194, 0f00000000;
@%p40 bra BB0_68;
mov.f32 %f228, %f3;
mov.f32 %f227, %f2;
mov.f32 %f226, %f1;
BB0_68:
add.s64 %rd113, %rd17, %rd7;
ld.global.u8 %rs27, [%rd113];
setp.gt.u16 %p41, %rs27, %rs1;
cvt.u32.u16 %r61, %rs27;
@%p41 bra BB0_70;
bra.uni BB0_69;
BB0_70:
add.s32 %r247, %r61, 1;
mul.lo.s32 %r248, %r247, %r61;
shr.u32 %r249, %r248, 1;
add.s32 %r279, %r249, %r4;
bra.uni BB0_71;
BB0_69:
add.s32 %r244, %r4, 1;
mul.lo.s32 %r245, %r244, %r4;
shr.u32 %r246, %r245, 1;
add.s32 %r279, %r61, %r246;
BB0_71:
mul.wide.s32 %rd115, %r279, 4;
add.s64 %rd116, %rd42, %rd115;
ld.global.f32 %f195, [%rd116];
add.f32 %f196, %f195, %f195;
div.rn.f32 %f197, %f196, %f82;
sub.f32 %f198, %f226, %f1;
sub.f32 %f199, %f227, %f2;
sub.f32 %f200, %f228, %f3;
fma.rn.f32 %f229, %f198, %f197, %f83;
fma.rn.f32 %f230, %f199, %f197, %f84;
fma.rn.f32 %f231, %f200, %f197, %f85;
BB0_72:
add.s64 %rd119, %rd26, %rd21;
st.global.f32 [%rd119], %f229;
add.s64 %rd121, %rd29, %rd21;
st.global.f32 [%rd121], %f230;
add.s64 %rd123, %rd31, %rd21;
st.global.f32 [%rd123], %f231;
BB0_73:
ret;
}
`
adddmi_ptx_30 = `
.version 4.3
.target sm_30
.address_size 64
// .globl adddmi
.visible .entry adddmi(
.param .u64 adddmi_param_0,
.param .u64 adddmi_param_1,
.param .u64 adddmi_param_2,
.param .u64 adddmi_param_3,
.param .u64 adddmi_param_4,
.param .u64 adddmi_param_5,
.param .u64 adddmi_param_6,
.param .u64 adddmi_param_7,
.param .u64 adddmi_param_8,
.param .f32 adddmi_param_9,
.param .f32 adddmi_param_10,
.param .f32 adddmi_param_11,
.param .u32 adddmi_param_12,
.param .u32 adddmi_param_13,
.param .u32 adddmi_param_14,
.param .u8 adddmi_param_15
)
{
.reg .pred %p<42>;
.reg .b16 %rs<29>;
.reg .f32 %f<232>;
.reg .b32 %r<280>;
.reg .b64 %rd<124>;
ld.param.u64 %rd8, [adddmi_param_0];
ld.param.u64 %rd9, [adddmi_param_1];
ld.param.u64 %rd10, [adddmi_param_2];
ld.param.u64 %rd11, [adddmi_param_3];
ld.param.u64 %rd12, [adddmi_param_4];
ld.param.u64 %rd13, [adddmi_param_5];
ld.param.u64 %rd14, [adddmi_param_6];
ld.param.u64 %rd15, [adddmi_param_7];
ld.param.u64 %rd16, [adddmi_param_8];
ld.param.f32 %f101, [adddmi_param_9];
ld.param.f32 %f102, [adddmi_param_10];
ld.param.f32 %f103, [adddmi_param_11];
ld.param.u32 %r65, [adddmi_param_12];
ld.param.u32 %r66, [adddmi_param_13];
ld.param.u32 %r67, [adddmi_param_14];
ld.param.u8 %rs8, [adddmi_param_15];
mov.u32 %r68, %ntid.x;
mov.u32 %r69, %ctaid.x;
mov.u32 %r70, %tid.x;
mad.lo.s32 %r1, %r68, %r69, %r70;
mov.u32 %r71, %ntid.y;
mov.u32 %r72, %ctaid.y;
mov.u32 %r73, %tid.y;
mad.lo.s32 %r2, %r71, %r72, %r73;
mov.u32 %r74, %ntid.z;
mov.u32 %r75, %ctaid.z;
mov.u32 %r76, %tid.z;
mad.lo.s32 %r3, %r74, %r75, %r76;
setp.ge.s32 %p1, %r2, %r66;
setp.ge.s32 %p2, %r1, %r65;
or.pred %p3, %p1, %p2;
setp.ge.s32 %p4, %r3, %r67;
or.pred %p5, %p3, %p4;
@%p5 bra BB0_73;
cvta.to.global.u64 %rd17, %rd16;
cvta.to.global.u64 %rd18, %rd13;
cvta.to.global.u64 %rd19, %rd12;
cvta.to.global.u64 %rd20, %rd11;
mad.lo.s32 %r77, %r3, %r66, %r2;
mad.lo.s32 %r78, %r77, %r65, %r1;
cvt.s64.s32 %rd1, %r78;
mul.wide.s32 %rd21, %r78, 4;
add.s64 %rd22, %rd20, %rd21;
add.s64 %rd23, %rd19, %rd21;
add.s64 %rd24, %rd18, %rd21;
add.s64 %rd25, %rd17, %rd1;
ld.global.u8 %rs1, [%rd25];
cvt.u32.u16 %r79, %rs1;
and.b32 %r4, %r79, 255;
ld.global.f32 %f1, [%rd22];
ld.global.f32 %f2, [%rd23];
mul.f32 %f104, %f2, %f2;
fma.rn.f32 %f105, %f1, %f1, %f104;
ld.global.f32 %f3, [%rd24];
fma.rn.f32 %f106, %f3, %f3, %f105;
setp.eq.f32 %p6, %f106, 0f00000000;
@%p6 bra BB0_73;
cvta.to.global.u64 %rd26, %rd8;
shl.b64 %rd27, %rd1, 2;
add.s64 %rd28, %rd26, %rd27;
ld.global.f32 %f4, [%rd28];
cvta.to.global.u64 %rd29, %rd9;
add.s64 %rd30, %rd29, %rd27;
ld.global.f32 %f5, [%rd30];
cvta.to.global.u64 %rd31, %rd10;
add.s64 %rd32, %rd31, %rd27;
ld.global.f32 %f6, [%rd32];
and.b16 %rs9, %rs8, 1;
setp.eq.b16 %p7, %rs9, 1;
add.s32 %r5, %r1, -1;
@!%p7 bra BB0_4;
bra.uni BB0_3;
BB0_3:
rem.s32 %r84, %r5, %r65;
add.s32 %r85, %r84, %r65;
rem.s32 %r264, %r85, %r65;
bra.uni BB0_5;
BB0_4:
mov.u32 %r86, 0;
max.s32 %r264, %r5, %r86;
BB0_5:
mad.lo.s32 %r96, %r77, %r65, %r264;
setp.gt.s32 %p8, %r1, 0;
setp.eq.b16 %p9, %rs9, 1;
or.pred %p10, %p8, %p9;
cvt.s64.s32 %rd2, %r96;
mov.f32 %f202, 0f00000000;
mov.f32 %f209, %f202;
mov.f32 %f201, %f202;
@!%p10 bra BB0_7;
bra.uni BB0_6;
BB0_6:
shl.b64 %rd34, %rd2, 2;
add.s64 %rd35, %rd20, %rd34;
ld.global.f32 %f201, [%rd35];
add.s64 %rd37, %rd19, %rd34;
ld.global.f32 %f209, [%rd37];
add.s64 %rd39, %rd18, %rd34;
ld.global.f32 %f202, [%rd39];
BB0_7:
mov.f32 %f11, %f209;
add.s64 %rd41, %rd17, %rd2;
ld.global.u8 %rs2, [%rd41];
cvt.u32.u16 %r9, %rs2;
setp.gt.u16 %p11, %rs2, %rs1;
@%p11 bra BB0_9;
bra.uni BB0_8;
BB0_9:
add.s32 %r104, %r9, 1;
mul.lo.s32 %r105, %r104, %r9;
shr.u32 %r106, %r105, 1;
add.s32 %r265, %r106, %r4;
bra.uni BB0_10;
BB0_8:
add.s32 %r101, %r4, 1;
mul.lo.s32 %r102, %r101, %r4;
shr.u32 %r103, %r102, 1;
add.s32 %r265, %r9, %r103;
BB0_10:
cvta.to.global.u64 %rd42, %rd14;
mul.wide.s32 %rd43, %r265, 4;
add.s64 %rd44, %rd42, %rd43;
ld.global.f32 %f13, [%rd44];
@%p11 bra BB0_12;
bra.uni BB0_11;
BB0_12:
add.s32 %r110, %r9, 1;
mul.lo.s32 %r111, %r110, %r9;
shr.u32 %r112, %r111, 1;
add.s32 %r266, %r112, %r4;
bra.uni BB0_13;
BB0_11:
add.s32 %r107, %r4, 1;
mul.lo.s32 %r108, %r107, %r4;
shr.u32 %r109, %r108, 1;
add.s32 %r266, %r9, %r109;
BB0_13:
cvta.to.global.u64 %rd45, %rd15;
mul.wide.s32 %rd46, %r266, 4;
add.s64 %rd47, %rd45, %rd46;
ld.global.f32 %f14, [%rd47];
mul.f32 %f110, %f11, %f11;
fma.rn.f32 %f111, %f201, %f201, %f110;
fma.rn.f32 %f112, %f202, %f202, %f111;