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LF-7344: clk: imx: clk-imx8qxp: Move LVDS pixel and phy clocks
In order to fix "MIPI DSI no display after suspend/resume". The LVDS pixel and phy clocks must be initialized before the MIPI tx_esacpe and rx_escape clocks. LVDS phy, LVDS pixel, tx_escape, and rx_esacpe are all on the same MSLICE. They all share the same clock parent. So, setting the parent source or rate affects all of these clocks. In the LVDS use case the MIPI tx_escape and rx_escape are not saved and restored. So, LVDS works for either clock initialization order. For MIPI case, LVDS must be initialized first. This patch can be squashed into "LF-7054-1: clk: imx: clk-imx8qxp: Add LVDS bypass clocks" which should not have changed the initialization order. Signed-off-by: Oliver F. Brown <oliver.brown@oss.nxp.com> Reviewed-by: Liu Ying <victor.liu@nxp.com>
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