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io.cc
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/*****************************************************************************
* McPAT/CACTI
* SOFTWARE LICENSE AGREEMENT
* Copyright 2012 Hewlett-Packard Development Company, L.P.
* All Rights Reserved
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met: redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer;
* redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution;
* neither the name of the copyright holders nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.”
*
***************************************************************************/
#include <fstream>
#include <iostream>
#include <sstream>
#include <string.h>
#include "io.h"
#include "area.h"
#include "basic_circuit.h"
#include "parameter.h"
#include "Ucache.h"
#include "nuca.h"
#include "crossbar.h"
#include "arbiter.h"
#include "version_cacti.h"
//#include "highradix.h"
using namespace std;
InputParameter::InputParameter()
: array_power_gated(false),
bitline_floating(false),
wl_power_gated(false),
cl_power_gated(false),
interconect_power_gated(false),
power_gating(false),
perfloss(0.01),
cl_vertical (true),
long_channel_device(false)
{
dvs_voltage = std::vector<double>(0);
}
/* Parses "cache.cfg" file */
void
InputParameter::parse_cfg(const string & in_file)
{
FILE *fp = fopen(in_file.c_str(), "r");
char line[5000];
char jk[5000];
char temp_var[5000];
double temp_double;
char *data = line;
int offset= 0;
if(!fp) {
cout << in_file << " is missing!\n";
exit(-1);
}
while(fscanf(fp, "%[^\n]\n", line) != EOF) {
if (!strncmp("-size", line, strlen("-size"))) {
sscanf(line, "-size %[(:-~)*]%u", jk, &(cache_sz));
continue;
}
if (!strncmp("-page size", line, strlen("-page size"))) {
sscanf(line, "-page size %[(:-~)*]%u", jk, &(page_sz_bits));
continue;
}
if (!strncmp("-burst length", line, strlen("-burst length"))) {
sscanf(line, "-burst %[(:-~)*]%u", jk, &(burst_len));
continue;
}
if (!strncmp("-internal prefetch width", line, strlen("-internal prefetch width"))) {
sscanf(line, "-internal prefetch %[(:-~)*]%u", jk, &(int_prefetch_w));
continue;
}
if (!strncmp("-block", line, strlen("-block"))) {
sscanf(line, "-block size (bytes) %d", &(line_sz));
continue;
}
if (!strncmp("-associativity", line, strlen("-associativity"))) {
sscanf(line, "-associativity %d", &(assoc));
continue;
}
if (!strncmp("-read-write", line, strlen("-read-write"))) {
sscanf(line, "-read-write port %d", &(num_rw_ports));
continue;
}
if (!strncmp("-exclusive read", line, strlen("exclusive read"))) {
sscanf(line, "-exclusive read port %d", &(num_rd_ports));
continue;
}
if(!strncmp("-exclusive write", line, strlen("-exclusive write"))) {
sscanf(line, "-exclusive write port %d", &(num_wr_ports));
continue;
}
if (!strncmp("-single ended", line, strlen("-single ended"))) {
sscanf(line, "-single %[(:-~)*]%d", jk,
&(num_se_rd_ports));
continue;
}
if (!strncmp("-search", line, strlen("-search"))) {
sscanf(line, "-search port %d", &(num_search_ports));
continue;
}
if (!strncmp("-UCA bank", line, strlen("-UCA bank"))) {
sscanf(line, "-UCA bank%[((:-~)| )*]%d", jk, &(nbanks));
continue;
}
if (!strncmp("-technology", line, strlen("-technology"))) {
sscanf(line, "-technology (u) %lf", &(F_sz_um));
F_sz_nm = F_sz_um*1000;
continue;
}
if (!strncmp("-hp Vdd", line, strlen("-hp Vdd"))) {
sscanf(line, "-hp Vdd%[^\"]\"%[^\"]\"", jk, temp_var);
if (!strncmp("default", temp_var, sizeof("default"))) {
specific_hp_vdd = false;
hp_Vdd = 1.0; /*
* if this is by default, then the vdd value in g_ip here does not matter
*/
}
else {
specific_hp_vdd = true;
sscanf(line, "-hp Vdd (V) %lf", &(hp_Vdd));
}
continue;
}
if (!strncmp("-lstp Vdd", line, strlen("-lstp Vdd"))) {
sscanf(line, "-lstp Vdd%[^\"]\"%[^\"]\"", jk, temp_var);
if (!strncmp("default", temp_var, sizeof("default"))) {
specific_lstp_vdd = false;
lstp_Vdd = 1.0; /*
* if this is by default, then the vdd value in g_ip here does not matter
*/
}
else {
specific_lstp_vdd = true;
sscanf(line, "-lstp Vdd (V) %lf", &(lstp_Vdd));
}
continue;
}
if (!strncmp("-lop Vdd", line, strlen("-lop Vdd"))) {
sscanf(line, "-lop Vdd%[^\"]\"%[^\"]\"", jk, temp_var);
if (!strncmp("default", temp_var, sizeof("default"))) {
specific_lop_vdd = false;
lop_Vdd = 1.0; /*
* if this is by default, then the vdd value in g_ip here does not matter
*/
}
else {
specific_lop_vdd = true;
sscanf(line, "-lop Vdd (V) %lf", &(lop_Vdd));
}
continue;
}
if (!strncmp("-DVS(V):", line, strlen("-DVS(V):"))) {
memmove (line,line+9,strlen(line));
while (1 == sscanf(data, "%lf%n", &temp_double, &offset)) {
data += offset;
dvs_voltage.push_back(temp_double);
}
// dvs_levels = dvs_voltage.size();
continue;
}
if (!strncmp("-Powergating voltage", line, strlen("-Powergating voltage"))) {
sscanf(line, "-Powergating voltage%[^\"]\"%[^\"]\"", jk, temp_var);
if (!strncmp("default", temp_var, sizeof("default"))) {
specific_vcc_min= false;
user_defined_vcc_min = 1.0; /*
* if this is by default, then the vdd value in g_ip here does not matter
*/
}
else {
specific_vcc_min = true;
sscanf(line, "-Powergating voltage (V) %lf", &(user_defined_vcc_min));
}
continue;
}
if (!strncmp("-output/input", line, strlen("-output/input"))) {
sscanf(line, "-output/input bus %[(:-~)*]%d", jk, &(out_w));
continue;
}
if (!strncmp("-operating temperature", line, strlen("-operating temperature"))) {
sscanf(line, "-operating temperature %[(:-~)*]%d", jk, &(temp));
continue;
}
if (!strncmp("-cache type", line, strlen("-cache type"))) {
sscanf(line, "-cache type%[^\"]\"%[^\"]\"", jk, temp_var);
if (!strncmp("cache", temp_var, sizeof("cache"))) {
is_cache = true;
}
else
{
is_cache = false;
}
if (!strncmp("main memory", temp_var, sizeof("main memory"))) {
is_main_mem = true;
}
else {
is_main_mem = false;
}
if (!strncmp("cam", temp_var, sizeof("cam"))) {
pure_cam = true;
}
else {
pure_cam = false;
}
if (!strncmp("ram", temp_var, sizeof("ram"))) {
pure_ram = true;
}
else {
if (!is_main_mem)
pure_ram = false;
else
pure_ram = true;
}
continue;
}
if (!strncmp("-tag size", line, strlen("-tag size"))) {
sscanf(line, "-tag size%[^\"]\"%[^\"]\"", jk, temp_var);
if (!strncmp("default", temp_var, sizeof("default"))) {
specific_tag = false;
tag_w = 42; /* the acutal value is calculated
* later based on the cache size, bank count, and associativity
*/
}
else {
specific_tag = true;
sscanf(line, "-tag size (b) %d", &(tag_w));
}
continue;
}
if (!strncmp("-access mode", line, strlen("-access mode"))) {
sscanf(line, "-access %[^\"]\"%[^\"]\"", jk, temp_var);
if (!strncmp("fast", temp_var, strlen("fast"))) {
access_mode = 2;
}
else if (!strncmp("sequential", temp_var, strlen("sequential"))) {
access_mode = 1;
}
else if(!strncmp("normal", temp_var, strlen("normal"))) {
access_mode = 0;
}
else {
cout << "ERROR: Invalid access mode!\n";
exit(0);
}
continue;
}
if (!strncmp("-Data array cell type", line, strlen("-Data array cell type"))) {
sscanf(line, "-Data array cell type %[^\"]\"%[^\"]\"", jk, temp_var);
if(!strncmp("itrs-hp", temp_var, strlen("itrs-hp"))) {
data_arr_ram_cell_tech_type = 0;
}
else if(!strncmp("itrs-lstp", temp_var, strlen("itrs-lstp"))) {
data_arr_ram_cell_tech_type = 1;
}
else if(!strncmp("itrs-lop", temp_var, strlen("itrs-lop"))) {
data_arr_ram_cell_tech_type = 2;
}
else if(!strncmp("lp-dram", temp_var, strlen("lp-dram"))) {
data_arr_ram_cell_tech_type = 3;
}
else if(!strncmp("comm-dram", temp_var, strlen("comm-dram"))) {
data_arr_ram_cell_tech_type = 4;
}
else {
cout << "ERROR: Invalid type!\n";
exit(0);
}
continue;
}
if (!strncmp("-Data array peripheral type", line, strlen("-Data array peripheral type"))) {
sscanf(line, "-Data array peripheral type %[^\"]\"%[^\"]\"", jk, temp_var);
if(!strncmp("itrs-hp", temp_var, strlen("itrs-hp"))) {
data_arr_peri_global_tech_type = 0;
}
else if(!strncmp("itrs-lstp", temp_var, strlen("itrs-lstp"))) {
data_arr_peri_global_tech_type = 1;
}
else if(!strncmp("itrs-lop", temp_var, strlen("itrs-lop"))) {
data_arr_peri_global_tech_type = 2;
}
else {
cout << "ERROR: Invalid type!\n";
exit(0);
}
continue;
}
if (!strncmp("-Tag array cell type", line, strlen("-Tag array cell type"))) {
sscanf(line, "-Tag array cell type %[^\"]\"%[^\"]\"", jk, temp_var);
if(!strncmp("itrs-hp", temp_var, strlen("itrs-hp"))) {
tag_arr_ram_cell_tech_type = 0;
}
else if(!strncmp("itrs-lstp", temp_var, strlen("itrs-lstp"))) {
tag_arr_ram_cell_tech_type = 1;
}
else if(!strncmp("itrs-lop", temp_var, strlen("itrs-lop"))) {
tag_arr_ram_cell_tech_type = 2;
}
else if(!strncmp("lp-dram", temp_var, strlen("lp-dram"))) {
tag_arr_ram_cell_tech_type = 3;
}
else if(!strncmp("comm-dram", temp_var, strlen("comm-dram"))) {
tag_arr_ram_cell_tech_type = 4;
}
else {
cout << "ERROR: Invalid type!\n";
exit(0);
}
continue;
}
if (!strncmp("-Tag array peripheral type", line, strlen("-Tag array peripheral type"))) {
sscanf(line, "-Tag array peripheral type %[^\"]\"%[^\"]\"", jk, temp_var);
if(!strncmp("itrs-hp", temp_var, strlen("itrs-hp"))) {
tag_arr_peri_global_tech_type = 0;
}
else if(!strncmp("itrs-lstp", temp_var, strlen("itrs-lstp"))) {
tag_arr_peri_global_tech_type = 1;
}
else if(!strncmp("itrs-lop", temp_var, strlen("itrs-lop"))) {
tag_arr_peri_global_tech_type = 2;
}
else {
cout << "ERROR: Invalid type!\n";
exit(0);
}
continue;
}
if(!strncmp("-design", line, strlen("-design"))) {
sscanf(line, "-%[((:-~)| |,)*]%d:%d:%d:%d:%d", jk,
&(delay_wt), &(dynamic_power_wt),
&(leakage_power_wt),
&(cycle_time_wt), &(area_wt));
continue;
}
if(!strncmp("-deviate", line, strlen("-deviate"))) {
sscanf(line, "-%[((:-~)| |,)*]%d:%d:%d:%d:%d", jk,
&(delay_dev), &(dynamic_power_dev),
&(leakage_power_dev),
&(cycle_time_dev), &(area_dev));
continue;
}
if(!strncmp("-Optimize", line, strlen("-Optimize"))) {
sscanf(line, "-Optimize %[^\"]\"%[^\"]\"", jk, temp_var);
if(!strncmp("ED^2", temp_var, strlen("ED^2"))) {
ed = 2;
}
else if(!strncmp("ED", temp_var, strlen("ED"))) {
ed = 1;
}
else {
ed = 0;
}
}
if(!strncmp("-NUCAdesign", line, strlen("-NUCAdesign"))) {
sscanf(line, "-%[((:-~)| |,)*]%d:%d:%d:%d:%d", jk,
&(delay_wt_nuca), &(dynamic_power_wt_nuca),
&(leakage_power_wt_nuca),
&(cycle_time_wt_nuca), &(area_wt_nuca));
continue;
}
if(!strncmp("-NUCAdeviate", line, strlen("-NUCAdeviate"))) {
sscanf(line, "-%[((:-~)| |,)*]%d:%d:%d:%d:%d", jk,
&(delay_dev_nuca), &(dynamic_power_dev_nuca),
&(leakage_power_dev_nuca),
&(cycle_time_dev_nuca), &(area_dev_nuca));
continue;
}
if(!strncmp("-Cache model", line, strlen("-cache model"))) {
sscanf(line, "-Cache model %[^\"]\"%[^\"]\"", jk, temp_var);
if (!strncmp("UCA", temp_var, strlen("UCA"))) {
nuca = 0;
}
else {
nuca = 1;
}
continue;
}
if(!strncmp("-NUCA bank", line, strlen("-NUCA bank"))) {
sscanf(line, "-NUCA bank count %d", &(nuca_bank_count));
if (nuca_bank_count != 0) {
force_nuca_bank = 1;
}
continue;
}
if(!strncmp("-Wire inside mat", line, strlen("-Wire inside mat"))) {
sscanf(line, "-Wire%[^\"]\"%[^\"]\"", jk, temp_var);
if (!strncmp("global", temp_var, strlen("global"))) {
wire_is_mat_type = 2;
continue;
}
else if (!strncmp("local", temp_var, strlen("local"))) {
wire_is_mat_type = 0;
continue;
}
else {
wire_is_mat_type = 1;
continue;
}
}
if(!strncmp("-Wire outside mat", line, strlen("-Wire outside mat"))) {
sscanf(line, "-Wire%[^\"]\"%[^\"]\"", jk, temp_var);
if (!strncmp("global", temp_var, strlen("global"))) {
wire_os_mat_type = 2;
}
else {
wire_os_mat_type = 1;
}
continue;
}
if(!strncmp("-Interconnect projection", line, strlen("-Interconnect projection"))) {
sscanf(line, "-Interconnect projection%[^\"]\"%[^\"]\"", jk, temp_var);
if (!strncmp("aggressive", temp_var, strlen("aggressive"))) {
ic_proj_type = 0;
}
else {
ic_proj_type = 1;
}
continue;
}
if(!strncmp("-Wire signalling", line, strlen("-wire signalling"))) {
sscanf(line, "-Wire%[^\"]\"%[^\"]\"", jk, temp_var);
if (!strncmp("default", temp_var, strlen("default"))) {
force_wiretype = 0;
wt = Global;
}
else if (!(strncmp("Global_10", temp_var, strlen("Global_10")))) {
force_wiretype = 1;
wt = Global_10;
}
else if (!(strncmp("Global_20", temp_var, strlen("Global_20")))) {
force_wiretype = 1;
wt = Global_20;
}
else if (!(strncmp("Global_30", temp_var, strlen("Global_30")))) {
force_wiretype = 1;
wt = Global_30;
}
else if (!(strncmp("Global_5", temp_var, strlen("Global_5")))) {
force_wiretype = 1;
wt = Global_5;
}
else if (!(strncmp("Global", temp_var, strlen("Global")))) {
force_wiretype = 1;
wt = Global;
}
else {
wt = Low_swing;
force_wiretype = 1;
}
continue;
}
if(!strncmp("-Core", line, strlen("-Core"))) {
sscanf(line, "-Core count %d\n", &(cores));
if (cores > 16) {
printf("No. of cores should be less than 16!\n");
}
continue;
}
if(!strncmp("-Cache level", line, strlen("-Cache level"))) {
sscanf(line, "-Cache l%[^\"]\"%[^\"]\"", jk, temp_var);
if (!strncmp("L2", temp_var, strlen("L2"))) {
cache_level = 0;
}
else {
cache_level = 1;
}
}
if(!strncmp("-Print level", line, strlen("-Print level"))) {
sscanf(line, "-Print l%[^\"]\"%[^\"]\"", jk, temp_var);
if (!strncmp("DETAILED", temp_var, strlen("DETAILED"))) {
print_detail = 1;
}
else {
print_detail = 0;
}
}
if(!strncmp("-Add ECC", line, strlen("-Add ECC"))) {
sscanf(line, "-Add ECC %[^\"]\"%[^\"]\"", jk, temp_var);
if (!strncmp("true", temp_var, strlen("true"))) {
add_ecc_b_ = true;
}
else {
add_ecc_b_ = false;
}
}
if(!strncmp("-CLDriver vertical", line, strlen("-CLDriver vertical"))) {
sscanf(line, "-CLDriver vertical %[^\"]\"%[^\"]\"", jk, temp_var);
if (!strncmp("true", temp_var, strlen("true"))) {
cl_vertical = true;
}
else {
cl_vertical = false;
}
}
if(!strncmp("-Array Power Gating", line, strlen("-Array Power Gating"))) {
sscanf(line, "-Array Power Gating %[^\"]\"%[^\"]\"", jk, temp_var);
if (!strncmp("true", temp_var, strlen("true"))) {
array_power_gated = true;
}
else {
array_power_gated = false;
}
}
if(!strncmp("-Bitline floating", line, strlen("-Bitline floating"))) {
sscanf(line, "-Bitline floating %[^\"]\"%[^\"]\"", jk, temp_var);
if (!strncmp("true", temp_var, strlen("true"))) {
bitline_floating = true;
}
else {
bitline_floating = false;
}
}
if(!strncmp("-WL Power Gating", line, strlen("-WL Power Gating"))) {
sscanf(line, "-WL Power Gating %[^\"]\"%[^\"]\"", jk, temp_var);
if (!strncmp("true", temp_var, strlen("true"))) {
wl_power_gated = true;
}
else {
wl_power_gated = false;
}
}
if(!strncmp("-CL Power Gating", line, strlen("-CL Power Gating"))) {
sscanf(line, "-CL Power Gating %[^\"]\"%[^\"]\"", jk, temp_var);
if (!strncmp("true", temp_var, strlen("true"))) {
cl_power_gated = true;
}
else {
cl_power_gated = false;
}
}
if(!strncmp("-Interconnect Power Gating", line, strlen("-Interconnect Power Gating"))) {
sscanf(line, "-Interconnect Power Gating %[^\"]\"%[^\"]\"", jk, temp_var);
if (!strncmp("true", temp_var, strlen("true"))) {
interconect_power_gated = true;
}
else {
interconect_power_gated = false;
}
}
if(!strncmp("-Power Gating Performance Loss", line, strlen("-Power Gating Performance Loss"))) {
sscanf(line, "-Power Gating Performance Loss %lf", &(perfloss));
continue;
}
if(!strncmp("-Power Gating", line, strlen("-Power Gating"))) {
sscanf(line, "-Power Gating %[^\"]\"%[^\"]\"", jk, temp_var);
if (!strncmp("true", temp_var, strlen("true"))) {
power_gating = true;
}
else {
power_gating = false;
}
}
if(!strncmp("-Long channel devices", line, strlen("-Long channel devices"))) {
sscanf(line, "-Long channel devices %[^\"]\"%[^\"]\"", jk, temp_var);
if (!strncmp("true", temp_var, strlen("true"))) {
long_channel_device = true;
}
else {
long_channel_device = false;
}
}
if(!strncmp("-Print input parameters", line, strlen("-Print input parameters"))) {
sscanf(line, "-Print input %[^\"]\"%[^\"]\"", jk, temp_var);
if (!strncmp("true", temp_var, strlen("true"))) {
print_input_args = true;
}
else {
print_input_args = false;
}
}
if(!strncmp("-Force cache config", line, strlen("-Force cache config"))) {
sscanf(line, "-Force cache %[^\"]\"%[^\"]\"", jk, temp_var);
if (!strncmp("true", temp_var, strlen("true"))) {
force_cache_config = true;
}
else {
force_cache_config = false;
}
}
if(!strncmp("-Ndbl", line, strlen("-Ndbl"))) {
sscanf(line, "-Ndbl %d\n", &(ndbl));
continue;
}
if(!strncmp("-Ndwl", line, strlen("-Ndwl"))) {
sscanf(line, "-Ndwl %d\n", &(ndwl));
continue;
}
if(!strncmp("-Nspd", line, strlen("-Nspd"))) {
sscanf(line, "-Nspd %d\n", &(nspd));
continue;
}
if(!strncmp("-Ndsam1", line, strlen("-Ndsam1"))) {
sscanf(line, "-Ndsam1 %d\n", &(ndsam1));
continue;
}
if(!strncmp("-Ndsam2", line, strlen("-Ndsam2"))) {
sscanf(line, "-Ndsam2 %d\n", &(ndsam2));
continue;
}
if(!strncmp("-Ndcm", line, strlen("-Ndcm"))) {
sscanf(line, "-Ndcm %d\n", &(ndcm));
continue;
}
}
rpters_in_htree = true;
fclose(fp);
}
void
InputParameter::display_ip()
{
cout << "Cache size : " << cache_sz << endl;
cout << "Block size : " << line_sz << endl;
cout << "Associativity : " << assoc << endl;
cout << "Read only ports : " << num_rd_ports << endl;
cout << "Write only ports : " << num_wr_ports << endl;
cout << "Read write ports : " << num_rw_ports << endl;
cout << "Single ended read ports : " << num_se_rd_ports << endl;
if (fully_assoc||pure_cam)
{
cout << "Search ports : " << num_search_ports << endl;
}
cout << "Cache banks (UCA) : " << nbanks << endl;
cout << "Technology : " << F_sz_um << endl;
cout << "User specified HP Vdd (v)? : " << std::boolalpha << specific_hp_vdd << endl;
if (specific_hp_vdd)
{
cout << "User defined HP Vdd (v) : " << hp_Vdd << endl;
}
cout << "User specified LSTP Vdd (v)? : " << std::boolalpha << specific_lstp_vdd << endl;
if (specific_lstp_vdd)
{
cout << "User defined HP Vdd (v) : " << lstp_Vdd << endl;
}
cout << "User specified LOP Vdd (v)? : " << std::boolalpha << specific_lop_vdd << endl;
if (specific_lop_vdd)
{
cout << "User defined HP Vdd (v) : " << lop_Vdd << endl;
}
cout << "Temperature : " << temp << endl;
cout << "Tag size : " << tag_w << endl;
if (is_cache) {
cout << "array type : " << "Cache" << endl;
}
if (pure_ram) {
cout << "array type : " << "Scratch RAM" << endl;
}
if (pure_cam)
{
cout << "array type : " << "CAM" << endl;
}
cout << "Model as memory : " << is_main_mem << endl;
cout << "Access mode : " << access_mode << endl;
cout << "Data array cell type : " << data_arr_ram_cell_tech_type << endl;
cout << "Data array peripheral type : " << data_arr_peri_global_tech_type << endl;
cout << "Tag array cell type : " << tag_arr_ram_cell_tech_type << endl;
cout << "Tag array peripheral type : " << tag_arr_peri_global_tech_type << endl;
cout << "Optimization target : " << ed << endl;
cout << "Design objective (UCA wt) : " << delay_wt << " "
<< dynamic_power_wt << " " << leakage_power_wt << " " << cycle_time_wt
<< " " << area_wt << endl;
cout << "Design objective (UCA dev) : " << delay_dev << " "
<< dynamic_power_dev << " " << leakage_power_dev << " " << cycle_time_dev
<< " " << area_dev << endl;
if (nuca)
{
cout << "Cores : " << cores << endl;
cout << "Design objective (NUCA wt) : " << delay_wt_nuca << " "
<< dynamic_power_wt_nuca << " " << leakage_power_wt_nuca << " " << cycle_time_wt_nuca
<< " " << area_wt_nuca << endl;
cout << "Design objective (NUCA dev) : " << delay_dev_nuca << " "
<< dynamic_power_dev_nuca << " " << leakage_power_dev_nuca << " " << cycle_time_dev_nuca
<< " " << area_dev_nuca << endl;
}
cout << "Cache model : " << nuca << endl;
cout << "Nuca bank : " << nuca_bank_count << endl;
cout << "Wire inside mat : " << wire_is_mat_type << endl;
cout << "Wire outside mat : " << wire_os_mat_type << endl;
cout << "Interconnect projection : " << ic_proj_type << endl;
cout << "Wire signalling : " << force_wiretype << endl;
cout << "Print level : " << print_detail << endl;
cout << "ECC overhead : " << add_ecc_b_ << endl;
cout << "Page size : " << page_sz_bits << endl;
cout << "Burst length : " << burst_len << endl;
cout << "Internal prefetch width : " << int_prefetch_w << endl;
cout << "Force cache config : " << g_ip->force_cache_config << endl;
if (g_ip->force_cache_config) {
cout << "Ndwl : " << g_ip->ndwl << endl;
cout << "Ndbl : " << g_ip->ndbl << endl;
cout << "Nspd : " << g_ip->nspd << endl;
cout << "Ndcm : " << g_ip->ndcm << endl;
cout << "Ndsam1 : " << g_ip->ndsam1 << endl;
cout << "Ndsam2 : " << g_ip->ndsam2 << endl;
}
// cout << "Placing subarray out driver vertical? : " << g_ip->cl_vertical << endl;
}
powerComponents operator+(const powerComponents & x, const powerComponents & y)
{
powerComponents z;
z.dynamic = x.dynamic + y.dynamic;
z.leakage = x.leakage + y.leakage;
z.gate_leakage = x.gate_leakage + y.gate_leakage;
z.short_circuit = x.short_circuit + y.short_circuit;
z.longer_channel_leakage = x.longer_channel_leakage + y.longer_channel_leakage;
z.power_gated_leakage = x.power_gated_leakage + y.power_gated_leakage;
z.power_gated_with_long_channel_leakage = x.power_gated_with_long_channel_leakage + y.power_gated_with_long_channel_leakage;
return z;
}
powerComponents operator*(const powerComponents & x, double const * const y)
{
powerComponents z;
z.dynamic = x.dynamic*y[0];
z.leakage = x.leakage*y[1];
z.gate_leakage = x.gate_leakage*y[2];
z.short_circuit = x.short_circuit*y[3];
z.longer_channel_leakage = x.longer_channel_leakage*y[1];//longer channel leakage has the same behavior as normal leakage
z.power_gated_leakage = x.power_gated_leakage*y[1];//power_gated_leakage has the same behavior as normal leakage
z.power_gated_with_long_channel_leakage = x.power_gated_with_long_channel_leakage*y[1];//power_gated_with_long_channel_leakage has the same behavior as normal leakage
return z;
}
powerDef operator+(const powerDef & x, const powerDef & y)
{
powerDef z;
z.readOp = x.readOp + y.readOp;
z.writeOp = x.writeOp + y.writeOp;
z.searchOp = x.searchOp + y.searchOp;
return z;
}
powerDef operator*(const powerDef & x, double const * const y)
{
powerDef z;
z.readOp = x.readOp*y;
z.writeOp = x.writeOp*y;
z.searchOp = x.searchOp*y;
return z;
}
uca_org_t cacti_interface(const string & infile_name)
{
uca_org_t fin_res;
//uca_org_t result;
fin_res.valid = false;
g_ip = new InputParameter();
g_ip->parse_cfg(infile_name);
if(!g_ip->error_checking())
exit(0);
if (g_ip->print_input_args)
g_ip->display_ip();
init_tech_params(g_ip->F_sz_um, false);//this init is for initializing wires
Wire winit; // Do not delete this line. It initializes wires.
// g_tp.peri_global.display();
// g_tp.sram_cell.display();
// For HighRadix Only
// //// Wire wirea(g_ip->wt, 1000);
// //// wirea.print_wire();
// //// cout << "Wire Area " << wirea.area.get_area() << " sq. u" << endl;
// // winit.print_wire();
// //
// HighRadix *hr;
// hr = new HighRadix();
// hr->compute_power();
// hr->print_router();
// exit(0);
//
// double sub_switch_sz = 2;
// double rows = 32;
// for (int i=0; i<6; i++) {
// sub_switch_sz = pow(2, i);
// rows = 64/sub_switch_sz;
// hr = new HighRadix(sub_switch_sz, rows, .8/* freq */, 64, 2, 64, 0.7);
// hr->compute_power();
// hr->print_router();
// delete hr;
// }
// // HighRadix yarc;
// // yarc.compute_power();
// // yarc.print_router();
// winit.print_wire();
// exit(0);
// For HighRadix Only End
if (g_ip->nuca == 1)
{
Nuca n(&g_tp.peri_global);
n.sim_nuca();
}
//g_ip->display_ip();
solve(&fin_res);
// output_UCA(&fin_res);
// Wire::print_wire();
output_data_csv(fin_res);
if (!g_ip->dvs_voltage.empty())
{
update_dvs(&fin_res);
}
if (g_ip->power_gating)
{
update_pg(&fin_res);//this is needed for compute area overhead of power-gating, even the gated power is calculated together un-gated leakage
}
output_UCA(&fin_res);
Wire wprint;//reset wires to original configuration as in *.cfg file (dvs level 0)
Wire::print_wire();
delete (g_ip);
return fin_res;
}
//cacti6.5's plain interface, please keep !!!
uca_org_t cacti_interface(
int cache_size,
int line_size,
int associativity,
int rw_ports,
int excl_read_ports,
int excl_write_ports,
int single_ended_read_ports,
int banks,
double tech_node, // in nm
int page_sz,
int burst_length,
int pre_width,
int output_width,
int specific_tag,
int tag_width,
int access_mode, //0 normal, 1 seq, 2 fast
int cache, //scratch ram or cache
int main_mem,
int obj_func_delay,
int obj_func_dynamic_power,
int obj_func_leakage_power,
int obj_func_area,
int obj_func_cycle_time,
int dev_func_delay,
int dev_func_dynamic_power,
int dev_func_leakage_power,
int dev_func_area,
int dev_func_cycle_time,
int ed_ed2_none, // 0 - ED, 1 - ED^2, 2 - use weight and deviate
int temp,
int wt, //0 - default(search across everything), 1 - global, 2 - 5% delay penalty, 3 - 10%, 4 - 20 %, 5 - 30%, 6 - low-swing
int data_arr_ram_cell_tech_flavor_in, // 0-4
int data_arr_peri_global_tech_flavor_in,
int tag_arr_ram_cell_tech_flavor_in,
int tag_arr_peri_global_tech_flavor_in,
int interconnect_projection_type_in, // 0 - aggressive, 1 - normal
int wire_inside_mat_type_in,
int wire_outside_mat_type_in,
int is_nuca, // 0 - UCA, 1 - NUCA
int core_count,
int cache_level, // 0 - L2, 1 - L3
int nuca_bank_count,
int nuca_obj_func_delay,
int nuca_obj_func_dynamic_power,
int nuca_obj_func_leakage_power,
int nuca_obj_func_area,
int nuca_obj_func_cycle_time,
int nuca_dev_func_delay,
int nuca_dev_func_dynamic_power,
int nuca_dev_func_leakage_power,
int nuca_dev_func_area,
int nuca_dev_func_cycle_time,
int REPEATERS_IN_HTREE_SEGMENTS_in,//TODO for now only wires with repeaters are supported
int p_input)
{
g_ip = new InputParameter();
g_ip->add_ecc_b_ = true;
g_ip->data_arr_ram_cell_tech_type = data_arr_ram_cell_tech_flavor_in;
g_ip->data_arr_peri_global_tech_type = data_arr_peri_global_tech_flavor_in;
g_ip->tag_arr_ram_cell_tech_type = tag_arr_ram_cell_tech_flavor_in;
g_ip->tag_arr_peri_global_tech_type = tag_arr_peri_global_tech_flavor_in;
g_ip->ic_proj_type = interconnect_projection_type_in;
g_ip->wire_is_mat_type = wire_inside_mat_type_in;
g_ip->wire_os_mat_type = wire_outside_mat_type_in;
g_ip->burst_len = burst_length;