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intr.c
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intr.c
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/* $NetBSD: intr.c,v 1.104 2017/10/27 09:59:16 utkarsh009 Exp $ */
/*-
* Copyright (c) 2007, 2008, 2009 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by Andrew Doran.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
/*
* Copyright 2002 (c) Wasabi Systems, Inc.
* All rights reserved.
*
* Written by Frank van der Linden for Wasabi Systems, Inc.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed for the NetBSD Project by
* Wasabi Systems, Inc.
* 4. The name of Wasabi Systems, Inc. may not be used to endorse
* or promote products derived from this software without specific prior
* written permission.
*
* THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
/*-
* Copyright (c) 1991 The Regents of the University of California.
* All rights reserved.
*
* This code is derived from software contributed to Berkeley by
* William Jolitz.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the University nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* @(#)isa.c 7.2 (Berkeley) 5/13/91
*/
/*-
* Copyright (c) 1993, 1994 Charles Hannum.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the University of
* California, Berkeley and its contributors.
* 4. Neither the name of the University nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* @(#)isa.c 7.2 (Berkeley) 5/13/91
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: intr.c,v 1.104 2017/10/27 09:59:16 utkarsh009 Exp $");
#include "opt_intrdebug.h"
#include "opt_multiprocessor.h"
#include "opt_acpi.h"
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/kernel.h>
#include <sys/syslog.h>
#include <sys/device.h>
#include <sys/kmem.h>
#include <sys/proc.h>
#include <sys/errno.h>
#include <sys/intr.h>
#include <sys/cpu.h>
#include <sys/atomic.h>
#include <sys/xcall.h>
#include <sys/interrupt.h>
#include <sys/reboot.h> /* for AB_VERBOSE */
#include <sys/kauth.h>
#include <sys/conf.h>
#include <uvm/uvm_extern.h>
#include <machine/i8259.h>
#include <machine/pio.h>
#include "ioapic.h"
#include "lapic.h"
#include "pci.h"
#include "acpica.h"
#if NIOAPIC > 0 || NACPICA > 0
#include <machine/i82093var.h>
#include <machine/mpbiosvar.h>
#include <machine/mpacpi.h>
#endif
#if NLAPIC > 0
#include <machine/i82489var.h>
#endif
#if NPCI > 0
#include <dev/pci/ppbreg.h>
#endif
#include <x86/pci/msipic.h>
#include <x86/pci/pci_msi_machdep.h>
#if NPCI == 0
#define msipic_is_msi_pic(PIC) (false)
#endif
#ifdef DDB
#include <ddb/db_output.h>
#endif
#ifdef INTRDEBUG
#define DPRINTF(msg) printf msg
#else
#define DPRINTF(msg)
#endif
struct pic softintr_pic = {
.pic_name = "softintr_fakepic",
.pic_type = PIC_SOFT,
.pic_vecbase = 0,
.pic_apicid = 0,
.pic_lock = __SIMPLELOCK_UNLOCKED,
};
static void intr_calculatemasks(struct cpu_info *);
static SIMPLEQ_HEAD(, intrsource) io_interrupt_sources =
SIMPLEQ_HEAD_INITIALIZER(io_interrupt_sources);
static kmutex_t intr_distribute_lock;
#if NIOAPIC > 0 || NACPICA > 0
static int intr_scan_bus(int, int, intr_handle_t *);
#if NPCI > 0
static int intr_find_pcibridge(int, pcitag_t *, pci_chipset_tag_t *);
#endif
#endif
static int intr_allocate_slot_cpu(struct cpu_info *, struct pic *, int, int *,
struct intrsource *);
static int __noinline intr_allocate_slot(struct pic *, int, int,
struct cpu_info **, int *, int *,
struct intrsource *);
static void intr_source_free(struct cpu_info *, int, struct pic *, int);
static void intr_establish_xcall(void *, void *);
static void intr_disestablish_xcall(void *, void *);
static const char *legacy_intr_string(int, char *, size_t, struct pic *);
static inline bool redzone_const_or_false(bool);
static inline int redzone_const_or_zero(int);
static void intr_redistribute_xc_t(void *, void *);
static void intr_redistribute_xc_s1(void *, void *);
static void intr_redistribute_xc_s2(void *, void *);
static bool intr_redistribute(struct cpu_info *);
static const char *create_intrid(int, struct pic *, int, char *, size_t);
static struct intrsource *intr_get_io_intrsource(const char *);
static void intr_free_io_intrsource_direct(struct intrsource *);
static int intr_num_handlers(struct intrsource *);
static int intr_find_unused_slot(struct cpu_info *, int *);
static void intr_activate_xcall(void *, void *);
static void intr_deactivate_xcall(void *, void *);
static void intr_get_affinity(struct intrsource *, kcpuset_t *);
static int intr_set_affinity(struct intrsource *, const kcpuset_t *);
/*
* Fill in default interrupt table (in case of spurious interrupt
* during configuration of kernel), setup interrupt control unit
*/
void
intr_default_setup(void)
{
int i;
/* icu vectors */
for (i = 0; i < NUM_LEGACY_IRQS; i++) {
idt_vec_reserve(ICU_OFFSET + i);
idt_vec_set(ICU_OFFSET + i, i8259_stubs[i].ist_entry);
}
/*
* Eventually might want to check if it's actually there.
*/
i8259_default_setup();
mutex_init(&intr_distribute_lock, MUTEX_DEFAULT, IPL_NONE);
}
/*
* Handle a NMI, possibly a machine check.
* return true to panic system, false to ignore.
*/
void
x86_nmi(void)
{
log(LOG_CRIT, "NMI port 61 %x, port 70 %x\n", inb(0x61), inb(0x70));
}
/*
* Recalculate the interrupt masks from scratch.
* During early boot, anything goes and we are always called on the BP.
* When the system is up and running:
*
* => called with ci == curcpu()
* => cpu_lock held by the initiator
* => interrupts disabled on-chip (PSL_I)
*
* Do not call printf(), kmem_free() or other "heavyweight" routines
* from here. This routine must be quick and must not block.
*/
static void
intr_calculatemasks(struct cpu_info *ci)
{
int irq, level, unusedirqs, intrlevel[MAX_INTR_SOURCES];
struct intrhand *q;
/* First, figure out which levels each IRQ uses. */
unusedirqs = 0xffffffff;
for (irq = 0; irq < MAX_INTR_SOURCES; irq++) {
int levels = 0;
if (ci->ci_isources[irq] == NULL) {
intrlevel[irq] = 0;
continue;
}
for (q = ci->ci_isources[irq]->is_handlers; q; q = q->ih_next)
levels |= 1 << q->ih_level;
intrlevel[irq] = levels;
if (levels)
unusedirqs &= ~(1 << irq);
}
/* Then figure out which IRQs use each level. */
for (level = 0; level < NIPL; level++) {
int irqs = 0;
for (irq = 0; irq < MAX_INTR_SOURCES; irq++)
if (intrlevel[irq] & (1 << level))
irqs |= 1 << irq;
ci->ci_imask[level] = irqs | unusedirqs;
}
for (level = 0; level<(NIPL-1); level++)
ci->ci_imask[level+1] |= ci->ci_imask[level];
for (irq = 0; irq < MAX_INTR_SOURCES; irq++) {
int maxlevel = IPL_NONE;
int minlevel = IPL_HIGH;
if (ci->ci_isources[irq] == NULL)
continue;
for (q = ci->ci_isources[irq]->is_handlers; q;
q = q->ih_next) {
if (q->ih_level < minlevel)
minlevel = q->ih_level;
if (q->ih_level > maxlevel)
maxlevel = q->ih_level;
}
ci->ci_isources[irq]->is_maxlevel = maxlevel;
ci->ci_isources[irq]->is_minlevel = minlevel;
}
for (level = 0; level < NIPL; level++)
ci->ci_iunmask[level] = ~ci->ci_imask[level];
}
/*
* List to keep track of PCI buses that are probed but not known
* to the firmware. Used to
*
* XXX should maintain one list, not an array and a linked list.
*/
#if (NPCI > 0) && ((NIOAPIC > 0) || NACPICA > 0)
struct intr_extra_bus {
int bus;
pcitag_t *pci_bridge_tag;
pci_chipset_tag_t pci_chipset_tag;
LIST_ENTRY(intr_extra_bus) list;
};
LIST_HEAD(, intr_extra_bus) intr_extra_buses =
LIST_HEAD_INITIALIZER(intr_extra_buses);
void
intr_add_pcibus(struct pcibus_attach_args *pba)
{
struct intr_extra_bus *iebp;
iebp = kmem_alloc(sizeof(*iebp), KM_SLEEP);
iebp->bus = pba->pba_bus;
iebp->pci_chipset_tag = pba->pba_pc;
iebp->pci_bridge_tag = pba->pba_bridgetag;
LIST_INSERT_HEAD(&intr_extra_buses, iebp, list);
}
static int
intr_find_pcibridge(int bus, pcitag_t *pci_bridge_tag,
pci_chipset_tag_t *pc)
{
struct intr_extra_bus *iebp;
struct mp_bus *mpb;
if (bus < 0)
return ENOENT;
if (bus < mp_nbus) {
mpb = &mp_busses[bus];
if (mpb->mb_pci_bridge_tag == NULL)
return ENOENT;
*pci_bridge_tag = *mpb->mb_pci_bridge_tag;
*pc = mpb->mb_pci_chipset_tag;
return 0;
}
LIST_FOREACH(iebp, &intr_extra_buses, list) {
if (iebp->bus == bus) {
if (iebp->pci_bridge_tag == NULL)
return ENOENT;
*pci_bridge_tag = *iebp->pci_bridge_tag;
*pc = iebp->pci_chipset_tag;
return 0;
}
}
return ENOENT;
}
#endif
#if NIOAPIC > 0 || NACPICA > 0
/*
* 'pin' argument pci bus_pin encoding of a device/pin combination.
*/
int
intr_find_mpmapping(int bus, int pin, intr_handle_t *handle)
{
#if NPCI > 0
while (intr_scan_bus(bus, pin, handle) != 0) {
int dev, func;
pcitag_t pci_bridge_tag;
pci_chipset_tag_t pc;
if (intr_find_pcibridge(bus, &pci_bridge_tag, &pc) != 0)
return ENOENT;
dev = pin >> 2;
pin = pin & 3;
pin = PPB_INTERRUPT_SWIZZLE(pin + 1, dev) - 1;
pci_decompose_tag(pc, pci_bridge_tag, &bus, &dev, &func);
pin |= (dev << 2);
}
return 0;
#else
return intr_scan_bus(bus, pin, handle);
#endif
}
static int
intr_scan_bus(int bus, int pin, intr_handle_t *handle)
{
struct mp_intr_map *mip, *intrs;
if (bus < 0 || bus >= mp_nbus)
return ENOENT;
intrs = mp_busses[bus].mb_intrs;
if (intrs == NULL)
return ENOENT;
for (mip = intrs; mip != NULL; mip = mip->next) {
if (mip->bus_pin == pin) {
#if NACPICA > 0
if (mip->linkdev != NULL)
if (mpacpi_findintr_linkdev(mip) != 0)
continue;
#endif
*handle = mip->ioapic_ih;
return 0;
}
}
return ENOENT;
}
#endif
/*
* Create an interrupt id such as "ioapic0 pin 9". This interrupt id is used
* by MI code and intrctl(8).
*/
static const char *
create_intrid(int legacy_irq, struct pic *pic, int pin, char *buf, size_t len)
{
int ih;
#if NPCI > 0
if ((pic->pic_type == PIC_MSI) || (pic->pic_type == PIC_MSIX)) {
uint64_t pih;
int dev, vec;
dev = msipic_get_devid(pic);
vec = pin;
pih = __SHIFTIN((uint64_t)dev, MSI_INT_DEV_MASK)
| __SHIFTIN((uint64_t)vec, MSI_INT_VEC_MASK)
| APIC_INT_VIA_MSI;
if (pic->pic_type == PIC_MSI)
MSI_INT_MAKE_MSI(pih);
else if (pic->pic_type == PIC_MSIX)
MSI_INT_MAKE_MSIX(pih);
return x86_pci_msi_string(NULL, pih, buf, len);
}
#endif
/*
* If the device is pci, "legacy_irq" is alway -1. Least 8 bit of "ih"
* is only used in intr_string() to show the irq number.
* If the device is "legacy"(such as floppy), it should not use
* intr_string().
*/
if (pic->pic_type == PIC_I8259) {
ih = legacy_irq;
return legacy_intr_string(ih, buf, len, pic);
}
ih = ((pic->pic_apicid << APIC_INT_APIC_SHIFT) & APIC_INT_APIC_MASK)
| ((pin << APIC_INT_PIN_SHIFT) & APIC_INT_PIN_MASK);
if (pic->pic_type == PIC_IOAPIC) {
ih |= APIC_INT_VIA_APIC;
}
ih |= pin;
return intr_string(ih, buf, len);
}
/*
* Find intrsource from io_interrupt_sources list.
*/
static struct intrsource *
intr_get_io_intrsource(const char *intrid)
{
struct intrsource *isp;
KASSERT(mutex_owned(&cpu_lock));
SIMPLEQ_FOREACH(isp, &io_interrupt_sources, is_list) {
KASSERT(isp->is_intrid != NULL);
if (strncmp(intrid, isp->is_intrid, INTRIDBUF - 1) == 0)
return isp;
}
return NULL;
}
/*
* Allocate intrsource and add to io_interrupt_sources list.
*/
struct intrsource *
intr_allocate_io_intrsource(const char *intrid)
{
CPU_INFO_ITERATOR cii;
struct cpu_info *ci;
struct intrsource *isp;
struct percpu_evcnt *pep;
KASSERT(mutex_owned(&cpu_lock));
if (intrid == NULL)
return NULL;
isp = kmem_zalloc(sizeof(*isp), KM_SLEEP);
pep = kmem_zalloc(sizeof(*pep) * ncpu, KM_SLEEP);
isp->is_saved_evcnt = pep;
for (CPU_INFO_FOREACH(cii, ci)) {
pep->cpuid = ci->ci_cpuid;
pep++;
}
strlcpy(isp->is_intrid, intrid, sizeof(isp->is_intrid));
SIMPLEQ_INSERT_TAIL(&io_interrupt_sources, isp, is_list);
return isp;
}
/*
* Remove from io_interrupt_sources list and free by the intrsource pointer.
*/
static void
intr_free_io_intrsource_direct(struct intrsource *isp)
{
KASSERT(mutex_owned(&cpu_lock));
SIMPLEQ_REMOVE(&io_interrupt_sources, isp, intrsource, is_list);
/* Is this interrupt established? */
if (isp->is_evname[0] != '\0')
evcnt_detach(&isp->is_evcnt);
kmem_free(isp->is_saved_evcnt,
sizeof(*(isp->is_saved_evcnt)) * ncpu);
kmem_free(isp, sizeof(*isp));
}
/*
* Remove from io_interrupt_sources list and free by the interrupt id.
* This function can be used by MI code.
*/
void
intr_free_io_intrsource(const char *intrid)
{
struct intrsource *isp;
KASSERT(mutex_owned(&cpu_lock));
if (intrid == NULL)
return;
if ((isp = intr_get_io_intrsource(intrid)) == NULL) {
return;
}
/* If the interrupt uses shared IRQ, don't free yet. */
if (isp->is_handlers != NULL) {
return;
}
intr_free_io_intrsource_direct(isp);
}
static int
intr_allocate_slot_cpu(struct cpu_info *ci, struct pic *pic, int pin,
int *index, struct intrsource *chained)
{
int slot, i;
struct intrsource *isp;
KASSERT(mutex_owned(&cpu_lock));
if (pic == &i8259_pic) {
KASSERT(CPU_IS_PRIMARY(ci));
slot = pin;
} else {
int start = 0;
slot = -1;
/* avoid reserved slots for legacy interrupts. */
if (CPU_IS_PRIMARY(ci) && msipic_is_msi_pic(pic))
start = NUM_LEGACY_IRQS;
/*
* intr_allocate_slot has checked for an existing mapping.
* Now look for a free slot.
*/
for (i = start; i < MAX_INTR_SOURCES ; i++) {
if (ci->ci_isources[i] == NULL) {
slot = i;
break;
}
}
if (slot == -1) {
return EBUSY;
}
}
isp = ci->ci_isources[slot];
if (isp == NULL) {
const char *via;
isp = chained;
KASSERT(isp != NULL);
if (pic->pic_type == PIC_MSI || pic->pic_type == PIC_MSIX)
via = "vec";
else
via = "pin";
snprintf(isp->is_evname, sizeof (isp->is_evname),
"%s %d", via, pin);
evcnt_attach_dynamic(&isp->is_evcnt, EVCNT_TYPE_INTR, NULL,
pic->pic_name, isp->is_evname);
isp->is_active_cpu = ci->ci_cpuid;
ci->ci_isources[slot] = isp;
}
*index = slot;
return 0;
}
/*
* A simple round-robin allocator to assign interrupts to CPUs.
*/
static int __noinline
intr_allocate_slot(struct pic *pic, int pin, int level,
struct cpu_info **cip, int *index, int *idt_slot,
struct intrsource *chained)
{
CPU_INFO_ITERATOR cii;
struct cpu_info *ci, *lci;
struct intrsource *isp;
int slot = 0, idtvec, error;
KASSERT(mutex_owned(&cpu_lock));
/* First check if this pin is already used by an interrupt vector. */
for (CPU_INFO_FOREACH(cii, ci)) {
for (slot = 0 ; slot < MAX_INTR_SOURCES ; slot++) {
if ((isp = ci->ci_isources[slot]) == NULL) {
continue;
}
if (isp->is_pic == pic &&
pin != -1 && isp->is_pin == pin) {
*idt_slot = isp->is_idtvec;
*index = slot;
*cip = ci;
return 0;
}
}
}
/*
* The pic/pin combination doesn't have an existing mapping.
* Find a slot for a new interrupt source. For the i8259 case,
* we always use reserved slots of the primary CPU. Otherwise,
* we make an attempt to balance the interrupt load.
*
* PIC and APIC usage are essentially exclusive, so the reservation
* of the ISA slots is ignored when assigning IOAPIC slots.
*/
if (pic == &i8259_pic) {
/*
* Must be directed to BP.
*/
ci = &cpu_info_primary;
error = intr_allocate_slot_cpu(ci, pic, pin, &slot, chained);
} else {
/*
* Find least loaded AP/BP and try to allocate there.
*/
ci = NULL;
for (CPU_INFO_FOREACH(cii, lci)) {
if ((lci->ci_schedstate.spc_flags & SPCF_NOINTR) != 0) {
continue;
}
#if 0
if (ci == NULL ||
ci->ci_nintrhand > lci->ci_nintrhand) {
ci = lci;
}
#else
ci = &cpu_info_primary;
#endif
}
KASSERT(ci != NULL);
error = intr_allocate_slot_cpu(ci, pic, pin, &slot, chained);
/*
* If that did not work, allocate anywhere.
*/
if (error != 0) {
for (CPU_INFO_FOREACH(cii, ci)) {
if ((ci->ci_schedstate.spc_flags &
SPCF_NOINTR) != 0) {
continue;
}
error = intr_allocate_slot_cpu(ci, pic,
pin, &slot, chained);
if (error == 0) {
break;
}
}
}
}
if (error != 0) {
return error;
}
KASSERT(ci != NULL);
/*
* Now allocate an IDT vector.
* For the 8259 these are reserved up front.
*/
if (pic == &i8259_pic) {
idtvec = ICU_OFFSET + pin;
} else {
idtvec = idt_vec_alloc(APIC_LEVEL(level), IDT_INTR_HIGH);
}
if (idtvec == 0) {
evcnt_detach(&ci->ci_isources[slot]->is_evcnt);
ci->ci_isources[slot] = NULL;
return EBUSY;
}
ci->ci_isources[slot]->is_idtvec = idtvec;
*idt_slot = idtvec;
*index = slot;
*cip = ci;
return 0;
}
static void
intr_source_free(struct cpu_info *ci, int slot, struct pic *pic, int idtvec)
{
struct intrsource *isp;
isp = ci->ci_isources[slot];
if (isp->is_handlers != NULL)
return;
ci->ci_isources[slot] = NULL;
if (pic != &i8259_pic)
idt_vec_free(idtvec);
}
#ifdef MULTIPROCESSOR
static int intr_biglock_wrapper(void *);
/*
* intr_biglock_wrapper: grab biglock and call a real interrupt handler.
*/
static int
intr_biglock_wrapper(void *vp)
{
struct intrhand *ih = vp;
int ret;
KERNEL_LOCK(1, NULL);
ret = (*ih->ih_realfun)(ih->ih_realarg);
KERNEL_UNLOCK_ONE(NULL);
return ret;
}
#endif /* MULTIPROCESSOR */
struct pic *
intr_findpic(int num)
{
#if NIOAPIC > 0
struct ioapic_softc *pic;
pic = ioapic_find_bybase(num);
if (pic != NULL)
return &pic->sc_pic;
#endif
if (num < NUM_LEGACY_IRQS)
return &i8259_pic;
return NULL;
}
/*
* Append device name to intrsource. If device A and device B share IRQ number,
* the device name of the interrupt id is "device A, device B".
*/
static void
intr_append_intrsource_xname(struct intrsource *isp, const char *xname)
{
if (isp->is_xname[0] != '\0')
strlcat(isp->is_xname, ", ", sizeof(isp->is_xname));
strlcat(isp->is_xname, xname, sizeof(isp->is_xname));
}
/*
* Handle per-CPU component of interrupt establish.
*
* => caller (on initiating CPU) holds cpu_lock on our behalf
* => arg1: struct intrhand *ih
* => arg2: int idt_vec
*/
static void
intr_establish_xcall(void *arg1, void *arg2)
{
struct intrsource *source;
struct intrstub *stubp;
struct intrhand *ih;
struct cpu_info *ci;
int idt_vec;
u_long psl;
ih = arg1;
KASSERT(ih->ih_cpu == curcpu() || !mp_online);
ci = ih->ih_cpu;
source = ci->ci_isources[ih->ih_slot];
idt_vec = (int)(intptr_t)arg2;
/* Disable interrupts locally. */
psl = x86_read_psl();
x86_disable_intr();
/* Link in the handler and re-calculate masks. */
*(ih->ih_prevp) = ih;
intr_calculatemasks(ci);
/* Hook in new IDT vector and SPL state. */
if (source->is_resume == NULL || source->is_idtvec != idt_vec) {
if (source->is_idtvec != 0 && source->is_idtvec != idt_vec)
idt_vec_free(source->is_idtvec);
source->is_idtvec = idt_vec;
if (source->is_type == IST_LEVEL) {
stubp = &source->is_pic->pic_level_stubs[ih->ih_slot];
} else {
stubp = &source->is_pic->pic_edge_stubs[ih->ih_slot];
}
source->is_resume = stubp->ist_resume;
source->is_recurse = stubp->ist_recurse;
idt_vec_set(idt_vec, stubp->ist_entry);
}
/* Re-enable interrupts locally. */
x86_write_psl(psl);
}
void *
intr_establish_xname(int legacy_irq, struct pic *pic, int pin, int type,
int level, int (*handler)(void *), void *arg,
bool known_mpsafe, const char *xname)
{
struct intrhand **p, *q, *ih;
struct cpu_info *ci;
int slot, error, idt_vec;
struct intrsource *chained, *source;
#ifdef MULTIPROCESSOR
bool mpsafe = (known_mpsafe || level != IPL_VM);
#endif /* MULTIPROCESSOR */
uint64_t where;
const char *intrstr;
char intrstr_buf[INTRIDBUF];
KASSERTMSG((legacy_irq == -1 || (0 <= legacy_irq && legacy_irq < 16)),
"bad legacy IRQ value: %d", legacy_irq);
KASSERTMSG((legacy_irq != -1 || pic != &i8259_pic),
"non-legacy IRQ on i8259");
ih = kmem_alloc(sizeof(*ih), KM_SLEEP);
intrstr = create_intrid(legacy_irq, pic, pin, intrstr_buf,
sizeof(intrstr_buf));
KASSERT(intrstr != NULL);
mutex_enter(&cpu_lock);
/* allocate intrsource pool, if not yet. */
chained = intr_get_io_intrsource(intrstr);
if (chained == NULL) {
if (msipic_is_msi_pic(pic)) {
mutex_exit(&cpu_lock);
kmem_free(ih, sizeof(*ih));
printf("%s: %s has no intrsource\n", __func__, intrstr);
return NULL;
}
chained = intr_allocate_io_intrsource(intrstr);
if (chained == NULL) {
mutex_exit(&cpu_lock);
kmem_free(ih, sizeof(*ih));
printf("%s: can't allocate io_intersource\n", __func__);
return NULL;
}
}
error = intr_allocate_slot(pic, pin, level, &ci, &slot, &idt_vec,
chained);
if (error != 0) {
intr_free_io_intrsource_direct(chained);
mutex_exit(&cpu_lock);
kmem_free(ih, sizeof(*ih));
printf("failed to allocate interrupt slot for PIC %s pin %d\n",
pic->pic_name, pin);
return NULL;
}
source = ci->ci_isources[slot];
if (source->is_handlers != NULL &&
source->is_pic->pic_type != pic->pic_type) {
intr_free_io_intrsource_direct(chained);
mutex_exit(&cpu_lock);
kmem_free(ih, sizeof(*ih));
printf("%s: can't share intr source between "
"different PIC types (legacy_irq %d pin %d slot %d)\n",
__func__, legacy_irq, pin, slot);
return NULL;
}
source->is_pin = pin;
source->is_pic = pic;
intr_append_intrsource_xname(source, xname);
switch (source->is_type) {
case IST_NONE:
source->is_type = type;
break;
case IST_EDGE:
case IST_LEVEL:
if (source->is_type == type)
break;
/* FALLTHROUGH */
case IST_PULSE:
if (type != IST_NONE) {
intr_source_free(ci, slot, pic, idt_vec);
intr_free_io_intrsource_direct(chained);
mutex_exit(&cpu_lock);
kmem_free(ih, sizeof(*ih));
printf("%s: pic %s pin %d: can't share "
"type %d with %d\n",
__func__, pic->pic_name, pin,
source->is_type, type);
return NULL;
}
break;
default:
panic("%s: bad intr type %d for pic %s pin %d\n",
__func__, source->is_type, pic->pic_name, pin);
/* NOTREACHED */
}