/
neoyume_lower.spin2
7976 lines (6951 loc) · 268 KB
/
neoyume_lower.spin2
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CON ' Header
''
'' ### ### ######### ###### ##### ### #### ### ### ### #########
'' ### # ## # ## ## ## # ## # ### ### ## #
'' # ## # ## # ## ## # ## # ## # # ## # ## ## #
'' # ## # ##### ### ### ### ## # ## # # ## # ## #####
'' # ## # ## # ## ## # ## ## # # ## # ## ## #
'' # ### ## # ## ## ## ## # # ### ## ## #
'' ### ### ######### ###### #### #### ### # #### #########
''
'' MAX 256 MEGA
'' PROP-GEAR SPEC
''
CON ' Common Constants
MASTER_CLK = 24_100_000
CLK_MULTIPLIER = 14
'DEBUG_BAUD = 1_000_000
DEBUG_LOG_SIZE = 16*1024*1024
_CLKFREQ = MASTER_CLK * CLK_MULTIPLIER ' Ignore this unless you're debugging - final clock is set by video driver
UPPER_LOAD = $5_C000
INPUT_LOAD = $3_9000
VINT_LOCK = 9
STATIC_LOCKS = decod VINT_LOCK
CON
#include "config.spin2"
DAT ' startup code & zero page
org
coginit #0,##UPPER_LOAD
orgh $14
_clkf long 0
_clkm long 0
_mk_init_ptr long @mk_init ' < $1C
_drawbuffer_ptr long @draw_buffer ' < $20
_palette_ptr long @palette32 ' < $24
_vramlo_ptr long @vram_low ' < $28
_vramhi_ptr long @vram_high ' < $2C
_zk_init_ptr long @zk_init ' < $30
_lspc_load_ptr long @lspc_entry ' < $34
_blt_load_ptr long @blt_entry ' < $38
_opnb_init_ptr long @opn_init ' < $3C
_ma_init_ptr long @ma_entry ' < $40
_input_load_ptr long INPUT_LOAD ' < $44
curpalette_base_l long @palette32
z80_command_b byte 0
z80_reply_b byte 0
opn_timerAflag byte 0
opn_timerBflag byte 0
opn_register word 0
_lspc_modereg word 0
_lspc_animctr byte 0
orgh $60
' control bit format is %ET_DCBA_RLDU (E=sElect,T=sTart)
io_pl1_padw long 0 ' < $60 (populated by USB code)
io_pl2_padw long 0 ' < $64 (populated by USB code)
long 0 ' < $68 stupid hack to pass down pointer from USB code
long 0 ' < $6C
orgh $80
' Stuff set by upcode
_exr_prog_base long 0 ' < $80: Lower 68k ROM
_exr_port_base long 0 ' < $84: Upper 68k ROM
_exr_port_bkmsk long 0 ' < $88: Upper ROM bankswitch mask
_exr_bios_base long 0 ' < $8C: BIOS ROM
_exr_adpa_base long 0 ' < $90: ADPCM A ROM
_exr_adpb_base long 0 ' < $94: ADPCM B ROM
_exr_char_base long 0 ' < $98: Sprite base
_exr_fixt_base long 0 ' < $9C: Fix tile base
_exr_z80p_base long 0 ' < $A0: Z80 ROM
_ext_char_bits long 31 ' < $A4: Tile ID zerox mask
' ADPCM poll interface
adpcm_pollbox long 0[7]
' mailbox for 68k ROM reads
_progrq_addr long 0
_progrq_length long 0
_progrq_target long 0
_mk_cogatn_w word 0
_ma_cogatn_w word 0
_zk_cogatn_w word 0
orgh $F8
video_line_ctr long 0
video_frame_ctr long 0
CON ' MotoKore 68000 constants
#0,MK_CARRY_BIT,MK_OVER_BIT,MK_ZERO_BIT,MK_NEG_BIT,MK_EXT_BIT
MK_SUPER_BIT = 13
MK_TRACE_BIT = 15
MK_CARRY_MASK = 1<<MK_CARRY_BIT
MK_OVER_MASK = 1<<MK_OVER_BIT
MK_ZERO_MASK = 1<<MK_ZERO_BIT
MK_NEG_MASK = 1<<MK_NEG_BIT
MK_EXT_MASK = 1<<MK_EXT_BIT
MK_SUPER_MASK = 1<<MK_SUPER_BIT
MK_TRACE_MASK = 1<<MK_TRACE_BIT
MK_ROMQUE_SIZE = 16 ' words
DAT ' MotoKore 68000 cog resident code
org
mk_cogbase
mk_d0 long 0
mk_d1 long 0
mk_d2 long 0
mk_d3 long 0
mk_d4 long 0
mk_d5 long 0
mk_d6 long 0
mk_d7 long 0
mk_a0 long 0
mk_a1 long 0
mk_a2 long 0
mk_a3 long 0
mk_a4 long 0
mk_a5 long 0
mk_a6 long 0
mk_a7 long 0
mk_othersp long 0
mk_sr long 0
mk_nibble_impl_tbl
long mk_nibble_0 ' 0 (immediate ops)
long mk_nibble_1 ' 1 (MOVE BYTE)
long mk_nibble_2 ' 2 (MOVE LONG)
long mk_nibble_3 ' 3 (MOVE WORD)
long mk_nibble_4 ' 4 (weird stuff idk)
long mk_nibble_5 ' 5 (ADDQ/SUBQ and also Scc/DBcc)
long mk_nibble_6 ' 6 (branches)
long mk_nibble_7 ' 7 (MOVEQ)
long mk_nibble_8 ' 8 (OR and stuffs)
long mk_nibble_9 ' 9 (subtracts)
long mk_nibble_A ' A (LINE A EMULATOR TRAP)
long mk_nibble_B ' B (CMP and EOR)
long mk_nibble_C ' C (AND or stuffs)
long mk_nibble_D ' D (adds)
long mk_nibble_E ' E (Bit shifts)
long mk_nibble_F ' F (LINE F EMULATOR TRAP)
mk_condition_truth_table
'' Remember, status register is %XNZVC
long $10001 * %1111_1111_1111_1111 '' %0000 : True
'long $10001 * %0000_0000_0000_0000 '' %0001 : False
long $10001 * %0000_0101_0000_0101 '' %0010 : High
'long $10001 * %1111_1010_1111_1010 '' %0011 : Low or same
long $10001 * %0101_0101_0101_0101 '' %0100 : carry clear
'long $10001 * %1010_1010_1010_1010 '' %0101 : carry set
long $10001 * %0000_1111_0000_1111 '' %0110 : not equal
'long $10001 * %1111_0000_1111_0000 '' %0111 : equal
long $10001 * %0011_0011_0011_0011 '' %1000 : overflow clear
'long $10001 * %1100_1100_1100_1100 '' %1001 : overflow set
long $10001 * %0000_0000_1111_1111 '' %1010 : plus
'long $10001 * %1111_1111_0000_0000 '' %1011 : minus
long $10001 * %1100_1100_0011_0011 '' %1100 : greater or equal (N==V)
'long $10001 * %0011_0011_1100_1100 '' %1101 : less than (N!=V)
long $10001 * %0000_1100_0000_0011 '' %1110 : greater than (N==V)&!Z (???)
'long $10001 * %1111_0011_1111_1100 '' %1111 : less or equal (N!=V)|Z (???)
mk_shift_impl_tbl
long mk_do_asr
long mk_do_asl
long mk_do_lsr
long mk_do_lsl
long mk_do_roxr
long mk_do_roxl
long mk_do_ror
long mk_do_rol
mk_flowop_impl_tbl
long mk_hub_reset
long mk_hub_nop
long mk_hub_stop
long mk_hub_rte
long mk_illegal
long mk_hub_rts
long mk_hub_trapv
long mk_hub_rtr
mk_setup_ea8_tab
long mk_setup_rom_common + %0_00000_10_1100_110_111000<<10 ' $0x_xxxx (PROG ROM)
long mk_setup_ram_common + %0_11_11_00_00<<10 ' $1x_xxxx (WORK RAM)
long mk_setup_rom_common + %0_00000_01_1111_110_110100<<10 ' $2x_xxxx (PORT ROM)
long mk_setup_io8 ' $3x_xxxx (I/O)
long mk_setup_palette8 + %0_1111_1111_0000<<10 ' $4x_xxxx (PALETTE)
long mk_setup_palette8 + %0_1111_1111_0000<<10 ' $5x_xxxx (PALETTE)
long mk_setup_palette8 + %0_1111_1111_0000<<10 ' $6x_xxxx (PALETTE)
long mk_setup_palette8 + %0_1111_1111_0000<<10 ' $7x_xxxx (PALETTE)
long mk_setup_memcard8 ' $8x_xxxx (MEMCARD (not present))
long mk_setup_memcard8 ' $9x_xxxx (MEMCARD (not present))
long mk_setup_memcard8 ' $Ax_xxxx (MEMCARD (not present))
long mk_setup_memcard8 ' $Bx_xxxx (MEMCARD (not present))
long mk_setup_rom_common + %0_00000_10_1111_110_001110<<10 ' $Cx_xxxx (BIOS ROM)
long mk_setup_nvram8 ' $Dx_xxxx (NVRAM (not present))
long mk_setup_nothing8 ' $Ex_xxxx (unmapped)
long mk_setup_nothing8 ' $Fx_xxxx (unmapped)
mk_setup_ea16_tab
long mk_setup_rom_common + %0_00000_10_1010_101_111000<<10 ' $0x_xxxx (PROG ROM)
long mk_setup_ram_common + %0_11_00_11_00<<10 ' $1x_xxxx (WORK RAM)
long mk_setup_rom_common + %0_00000_01_1111_101_110100<<10 ' $2x_xxxx (PORT ROM)
long mk_setup_io16 ' $3x_xxxx (I/O)
long mk_setup_palette16 + %0_1111_0000<<10 ' $4x_xxxx (PALETTE)
long mk_setup_palette16 + %0_1111_0000<<10 ' $5x_xxxx (PALETTE)
long mk_setup_palette16 + %0_1111_0000<<10 ' $6x_xxxx (PALETTE)
long mk_setup_palette16 + %0_1111_0000<<10 ' $7x_xxxx (PALETTE)
long mk_setup_memcard16 ' $8x_xxxx (MEMCARD (not present))
long mk_setup_memcard16 ' $9x_xxxx (MEMCARD (not present))
long mk_setup_memcard16 ' $Ax_xxxx (MEMCARD (not present))
long mk_setup_memcard16 ' $Bx_xxxx (MEMCARD (not present))
long mk_setup_rom_common + %0_00000_10_1111_101_001110<<10 ' $Cx_xxxx (BIOS ROM)
long mk_setup_nvram16 ' $Dx_xxxx (NVRAM (not present))
long mk_setup_nothing16 ' $Ex_xxxx (unmapped)
long mk_setup_nothing16 ' $Fx_xxxx (unmapped)
mk_setup_ea32_tab
long mk_setup_rom_common + %0_00000_10_0110_011_111000<<10 ' $0x_xxxx (PROG ROM)
long mk_setup_ram_common + %0_00_11_11_00<<10 ' $1x_xxxx (WORK RAM)
long mk_setup_rom_common + %0_00000_01_1111_011_110100<<10 ' $2x_xxxx (PORT ROM)
long mk_setup_io32 ' $3x_xxxx (I/O)
long mk_setup_palette32 + %0_0000<<10 ' $4x_xxxx (PALETTE)
long mk_setup_palette32 + %0_0000<<10 ' $5x_xxxx (PALETTE)
long mk_setup_palette32 + %0_0000<<10 ' $6x_xxxx (PALETTE)
long mk_setup_palette32 + %0_0000<<10 ' $7x_xxxx (PALETTE)
long mk_setup_memcard32 ' $8x_xxxx (MEMCARD (not present))
long mk_setup_memcard32 ' $9x_xxxx (MEMCARD (not present))
long mk_setup_memcard32 ' $Ax_xxxx (MEMCARD (not present))
long mk_setup_memcard32 ' $Bx_xxxx (MEMCARD (not present))
long mk_setup_rom_common + %0_00000_10_1111_011_001110<<10 ' $Cx_xxxx (BIOS ROM)
long mk_setup_nvram32 ' $Dx_xxxx (NVRAM (not present))
long mk_setup_nothing32 ' $Ex_xxxx (unmapped)
long mk_setup_nothing32 ' $Fx_xxxx (unmapped)
mk_rd_nothing
_ret_ mov mk_memvalue,#0
mk_rd8_reg
_ret_ getbyte mk_memvalue,0-0,#0
mk_wr8_reg
_ret_ setbyte 0-0,mk_memvalue,#0
mk_rd16_reg
_ret_ getword mk_memvalue,0-0,#0
mk_wr16_reg
_ret_ setword 0-0,mk_memvalue,#0
mk_rd32_reg
_ret_ mov mk_memvalue,0-0
mk_wr32_reg
_ret_ mov 0-0,mk_memvalue
mk_rd8_rom
setq #2
wrlong mk_romio_addr,#_progrq_addr
cogatn mk_romio_atnval
waitatn
mk_rd8_ram
_ret_ rdbyte mk_memvalue,mk_eacache
mk_wr8_ram
'call #mk_debug_wrchk8
_ret_ wrbyte mk_memvalue,mk_eacache
mk_rd16_rom
setq #2
wrlong mk_romio_addr,#_progrq_addr
cogatn mk_romio_atnval
waitatn
mk_rd16_ram
rdword mk_memvalue,mk_eacache
_ret_ movbyts mk_memvalue,#%%3201
mk_wr16_ram
'call #mk_debug_wrchk16
movbyts mk_memvalue,#%%3201
_ret_ wrword mk_memvalue,mk_eacache
mk_rd32_rom
setq #2
wrlong mk_romio_addr,#_progrq_addr
cogatn mk_romio_atnval
waitatn
mk_rd32_ram
rdlong mk_memvalue,mk_eacache
_ret_ movbyts mk_memvalue,#%%0123
mk_wr32_ram
'call #mk_debug_wrchk32
movbyts mk_memvalue,#%%0123
_ret_ wrlong mk_memvalue,mk_eacache
mk_wrrom ret ' obviously nothing
mk_rdimm
_ret_ mov mk_memvalue,mk_eacache
mk_wrportbank
mov mk_memtmp3,mk_effaddr
zerox mk_memtmp3,#19
cmp mk_memtmp3,##$FFFF0 wcz
setq #1
rdlong mk_memtmp0,#_exr_port_base
tjs mk_memtmp1,#.pvc
'debug("Bankswitch write: ",uhex_long(mk_memvalue,mk_effaddr,mk_virtualpc))
shl mk_memvalue,#20 ' 1 MB steps
and mk_memtmp1,mk_memvalue
add mk_memtmp0,mk_memtmp1
if_ae mov mk_port_base,mk_memtmp0
ret wcz
.pvc
'debug("PVC write ",uhex_long(mk_memtmp3,mk_memvalue))
if_e setword mk_pvc_bankreg,mk_memvalue,#0
cmp mk_memtmp3,##$FFFF2 wcz
if_e setword mk_pvc_bankreg,mk_memvalue,#1
mov mk_memvalue,mk_pvc_bankreg
shr mk_memvalue,#8
zerox mk_memvalue,mk_memtmp1 ' limit range
add mk_memtmp0,mk_memvalue
mov mk_port_base,mk_memtmp0
ret wcz
mk_longio_tmp long 0
mk_rd32_io
call #mk_rd16_io
getword mk_longio_tmp,mk_memvalue,#0
add mk_eacache,#2
call #mk_rd16_io
_ret_ setword mk_memvalue,mk_longio_tmp,#1
mk_wr32_io
mov mk_longio_tmp,mk_memvalue
shr mk_memvalue,#16
call #mk_wr16_io
add mk_eacache,#2
getword mk_memvalue,mk_longio_tmp,#0
' fall through
mk_wr16_io
getnib pa,mk_effaddr,#4
shr pa,#1
jmprel pa
jmp #.todo ' C0_xxxx (watchdog)
jmp #iog_z80port_wr16 ' C2_xxxx (Z80 command)
jmp #.undecoded ' C4_xxxx (nothing?)
jmp #.undecoded ' C6_xxxx (nothing?)
jmp #.undecoded ' C8_xxxx (nothing?)
jmp #iog_latch_wr16 ' CA_xxxx (latches)
jmp #iog_lspc_wr16 ' CC_xxxx (LSPC)
'jmp #.undecoded ' CE_xxxx (nothing?)
.undecoded
debug("undecoded IO WORD WRITE: ",uhex_(mk_effaddr),uhex_long(mk_virtualpc))
.todo
ret wcz ' undecoded IO?
mk_wr8_io
'debug("mk_wr8_io ",uhex(mk_effaddr))
getnib pa,mk_effaddr,#4
shr pa,#1
jmprel pa
jmp #.todo ' C0_xxxx (watchdog)
jmp #iog_z80port_wr8 ' C2_xxxx (Z80 command)
jmp #.undecoded ' C4_xxxx (nothing?)
jmp #.undecoded ' C6_xxxx (nothing?)
jmp #.undecoded ' C8_xxxx (nothing?)
jmp #iog_latch_wr8 ' CA_xxxx (latches)
jmp #iog_lspc_wr8 ' CC_xxxx (LSPC)
'jmp #.undecoded ' CE_xxxx (nothing?)
.undecoded
.todo
ret wcz
mk_rd16_io
getnib pa,mk_effaddr,#4
shr pa,#1
jmprel pa
jmp #iog_p1stuff_rd16 ' C0_xxxx (P1 controls,etc)
jmp #iog_status_a_rd16 ' C2_xxxx (Status A / Z80 reply)
jmp #iog_p2stuff_rd16 ' C4_xxxx (P2 controls,etc)
jmp #.undecoded ' C6_xxxx (nothing?)
jmp #iog_status_b_rd16 ' C8_xxxx (Status B)
jmp #.undecoded ' CA_xxxx (latches)
jmp #iog_lspc_rd16 ' CC_xxxx (LSPC)
'jmp #.undecoded ' CE_xxxx (nothing?)
.undecoded
'debug("undecoded IO WORD READ: ",uhex(mk_effaddr))
mov mk_memvalue,#0 ' TODO
ret wcz ' undecoded IO?
mk_rd8_io
bitl mk_eacache,#0 wcz
call #mk_rd16_io
bitc mk_eacache,#0
if_nc getbyte mk_memvalue,mk_memvalue,#1
if_c getbyte mk_memvalue,mk_memvalue,#0
ret wcz
mk_rd8_vector
getbyte pa,mk_effaddr,#0
xor pa,#3
add pa,mk_vectors_ptr
_ret_ rdbyte mk_memvalue,pa
mk_rd16_vector
getbyte pa,mk_effaddr,#0
xor pa,#2
add pa,mk_vectors_ptr
_ret_ rdword mk_memvalue,pa
mk_rd32_vector
getbyte pa,mk_effaddr,#0
bitl pa,#1 wcz
add pa,mk_vectors_ptr
rdlong mk_memvalue,pa
add pa,#4
if_c rdlong pa,pa
if_c rolword mk_memvalue,pa,#1
ret wcz
mk_wr_sr
xor mk_memvalue,mk_sr
testn mk_memvalue,#255 wz
xor mk_memvalue,mk_sr
testb mk_sr,#MK_SUPER_BIT wc
if_nz_or_nc jmp #mk_hub_wr_sr
mk_wr_ccr
setq #%11111
muxq mk_sr,mk_memvalue
ret wcz
mk_rd_sr
_ret_ mov mk_memvalue,mk_sr
mk_illegal
debug("ILLEGAL INSTRUCTION ",uhex_word(mk_opword),uhex_long(mk_virtualpc))
'drvh #38
mov pb,#$10
jmp #mk_hub_trapit
mk_nextop
'debug("registers: ",ubin_word(mk_sr),13,uhex_reg_array(#mk_d0,#8),13,uhex_reg_array(#mk_a0,#8))
'debug("last 16 RAM bytes: ",uhex_byte_array(#main_ram + $FFF0,#16))
'tjnz mk_debug_ctr,#mk_nextop_nohook
'jatn mk_cogatnptr
mk_ihook1 nop
mk_ihook2 nop
mk_nextop_nohook
'cmp mk_virtualpc,mk_debug_tripwire wz
'if_z drvh #38
'if_z mov mk_debug_tripwire,#0
'if_z mov mk_debug_ctr,#1
'incmod mk_debug_ctr,##7919-1 wc
'debug("getting op with ",uhex_long(mk_virtualpc))
'debug(uhex_long_(mk_virtualpc))
'debug(uhex_word_array(#@fake_rom+$200,#4))
call mk_getopf
'debug("got op: ",uhex_word(mk_opword))
'debug("got op: ",uhex_word_(mk_opword)," before ",uhex_long_(mk_virtualpc))
'tjnz mk_debug_tripwire,#.no_trace
'tjz mk_debug_ctr,#.no_trace
'sub mk_debug_ctr,#1
'cmp mk_debug_tripwire,mk_virtualpc wz
'if_nz jmp #.no_trace
'if_nc jmp #.no_trace
'debug("tripwired' ",uhex_long(mk_virtualpc))
'call #mk_check_core_integrity
'debug("got: ",uhex_word_(mk_opword)," before ",uhex_long_(mk_virtualpc))
'debug("registers: ",ubin_word(mk_sr),10,13,uhex_reg_array(#mk_d0,#8),10,13,uhex_reg_array(#mk_a0,#8))
'debug("got op: ",uhex_word(mk_opword)," before ",uhex_long(mk_virtualpc),uhex_long(mk_a3))
'waitx ##174_00
.no_trace
push #mk_nextop
getnib mk_memtmp0,mk_opword,#3
altd mk_memtmp0,#mk_nibble_impl_tbl
jmp 0-0
mk_irq1ptr long @mk_hub_irq1
mk_irq2ptr long @mk_hub_irq2
'mk_cogatnptr long @mk_hub_cogatn
mk_write_second_reg_or_ea '' for ops that have two directional modes
testb mk_opword,#8 wc
if_c jmp mk_writef
mk_write_second_reg
neg pb,#1
shr pb,mk_shiftit
setq pb
and mk_opword,mk_dreg_mask ' assume we don't need it anymore
alti mk_opword,#%000_100_000
_ret_ muxq 0-0,mk_memvalue
mk_nibble_0 ' Immediate ops (decode headache!)
testb mk_opword,#8 wc
test mk_opword,#%110_000 wz
testb mk_opword,#3 andz
if_c_and_z jmp #mk_hub_movep
if_c jmp #.register_bitop ' not actually an immediate op...
getnib mk_optmp2,mk_opword,#2
cmp mk_optmp2,#%1000 wz
if_z jmp #.imm_bitop
' ok, we know it's a sized ***I type op
mov pb,mk_opword
call #mk_getopimm_auto
'debug("xxxI type op... imm is ",uhex_long(mk_optmp1))
mov pb,mk_opword
and pb,#%111_111
cmp pb,#%111_100 wz ' <- if Z, is op to SR/CCR
if_z mov mk_readf,#mk_rd_sr
if_z mov mk_shiftit,#16
if_z testb mk_opword,#6 wc
if_z_and_c mov mk_writef,#mk_wr_sr
if_z_and_nc mov mk_writef,#mk_wr_ccr
if_nz callpb mk_opword,#mk_setup_operand_auto
call mk_readf
cmp mk_optmp2,#%1100 wz
if_z jmp #mk_cmp_swapped ' CMPI (doesn't write)
push mk_writef ' setup write return
cmp mk_optmp2,#%0110 wz
if_z jmp #mk_add_common ' ADDI
cmp mk_optmp2,#%0100 wz
if_z jmp #mk_sub_common ' SUBI
' ok, only logic ops left
setr mk_thelogicop,#%0101000_01 ' P2 AND WZ opcode (assume this if no other logic op)
cmp mk_optmp2,#%0000 wz
if_z setr mk_thelogicop,#%0101010_01 ' P2 OR WZ opcode
cmp mk_optmp2,#%1010 wz
if_z setr mk_thelogicop,#%0101011_01 ' P2 XOR WZ opcode
jmp #mk_multilogic_common
.imm_bitop
push #.bitop_common
jmp #mk_getopimm8
.register_bitop
mov pb,mk_opword
shr pb,#9
and pb,#7
alts pb,#mk_d0
mov mk_optmp1,0-0
.bitop_common
test mk_opword,#%110_000 wz ' Register op?
mov pb,mk_opword
if_z call #mk_setup_reg32
if_nz and mk_optmp1,#7
if_nz call #mk_setup_operand8_move
call mk_readf
'debug("doing bitop with ",uhex_byte(mk_optmp1),uhex_long(mk_memvalue))
testbn mk_memvalue,mk_optmp1 wc
bitc mk_sr,#MK_ZERO_BIT
testb mk_opword,#6 wz
testb mk_opword,#7 wc
if_00 ret ' BTST
and mk_optmp1,#31 ' bitfield-sensitive ops ahead
if_01 bitnot mk_memvalue,mk_optmp1 ' BCHG
if_1x bitz mk_memvalue,mk_optmp1 ' BCLR/BSET
'debug("bitop result ",uhex_long(mk_memvalue))
jmp mk_writef
mk_cmp
callpb mk_opword,#mk_setup_operand_auto
call mk_readf
push #mk_cmp_common
jmp #mk_get_second_reg
mk_cmpa
testb mk_opword,#8 wc ' long sized?
if_nc callpb mk_opword,#mk_setup_operand16_move
if_c callpb mk_opword,#mk_setup_operand32_move
call mk_readf
if_nc signx mk_memvalue,#15
shr mk_opword,#9
and mk_opword,#7
skipf #%11_111_00 ' Skip swap and shift
alts mk_opword,#mk_a0
mov mk_optmp1,0-0
mk_cmp_swapped
xor mk_memvalue,mk_optmp1
xor mk_optmp1,mk_memvalue
xor mk_memvalue,mk_optmp1
mk_cmp_common
'debug("in mk_cmp_common ",uhex_long(mk_d0),uhex_long(mk_memvalue),uhex_long(mk_optmp1),udec(mk_shiftit))
shl mk_memvalue,mk_shiftit
shl mk_optmp1,mk_shiftit
' NOTE: the operands are swapped compared to sub_common
' generate stupid overflow flag
mov mk_optmp0,mk_optmp1
subs mk_optmp0,mk_memvalue wc
testb mk_optmp0,#31 xorc
bitc mk_sr,#MK_OVER_BIT
' do actual sub
sub mk_optmp1,mk_memvalue wcz
bitc mk_sr,#MK_CARRY_BIT
bitz mk_sr,#MK_ZERO_BIT
testb mk_optmp0,#31 wc
_ret_ bitc mk_sr,#MK_NEG_BIT
mk_nibble_9
mk_nibble_D
' ADD/SUB (X/A)
' check for ADDA/SUBA
test mk_opword,#%11_000_000 wcz
if_00 jmp #mk_addsuba
' check for ADDX/SUBX
test mk_opword,#%110_000 wz
testb mk_opword,#8 andz
if_z jmp #mk_hub_addsubx
' Okay, normal ADD/SUB
callpb mk_opword,#mk_setup_operand_auto
call mk_readf
call #mk_get_second_reg
push #mk_write_second_reg_or_ea
testb mk_opword,#14 wc ' C = ADD,NC = SUB ?
if_nc jmp #mk_sub_withdir
' fall through
mk_add_common
shl mk_memvalue,mk_shiftit
shl mk_optmp1,mk_shiftit
' generate stupid overflow flag
mov mk_optmp0,mk_optmp1
adds mk_optmp0,mk_memvalue wc
testb mk_optmp0,#31 xorc
bitc mk_sr,#MK_OVER_BIT
' do actual add
add mk_memvalue,mk_optmp1 wcz
muxc mk_sr,#MK_CARRY_MASK|MK_EXT_MASK
bitz mk_sr,#MK_ZERO_BIT
testb mk_optmp0,#31 wc
bitc mk_sr,#MK_NEG_BIT
_ret_ shr mk_memvalue,mk_shiftit
mk_sub_withdir
' if dir bit clear, swap operands
testb mk_opword,#8 wc
if_nc xor mk_memvalue,mk_optmp1
if_nc xor mk_optmp1,mk_memvalue
if_nc xor mk_memvalue,mk_optmp1
mk_sub_common
'debug("in mk_sub_common ",uhex_long(mk_d0),uhex_long(mk_memvalue),uhex_long(mk_optmp1),udec(mk_shiftit))
shl mk_memvalue,mk_shiftit
shl mk_optmp1,mk_shiftit
' generate stupid overflow flag
mov mk_optmp0,mk_memvalue
subs mk_optmp0,mk_optmp1 wc
testb mk_optmp0,#31 xorc
bitc mk_sr,#MK_OVER_BIT
' do actual sub
sub mk_memvalue,mk_optmp1 wcz
muxc mk_sr,#MK_CARRY_MASK|MK_EXT_MASK
bitz mk_sr,#MK_ZERO_BIT
testb mk_optmp0,#31 wc
bitc mk_sr,#MK_NEG_BIT
_ret_ shr mk_memvalue,mk_shiftit
mk_addsuba
setq mk_dreg_mask
muxq .adda_op,mk_opword
testb mk_opword,#8 wc ' long sized?
if_nc callpb mk_opword,#mk_setup_operand16_move
if_c callpb mk_opword,#mk_setup_operand32_move
call mk_readf
'debug("in mk_adda: ",uhex_long(mk_memvalue))
if_nc signx mk_memvalue,#15
testb mk_opword,#14 wc ' C = ADDA,NC = SUBA ?
.adda_op _ret_ sumnc mk_a0,mk_memvalue
' Memory R/W primitives
mk_setup_operand_auto ' with ea-supplying op in pb
' make sure size field is not %11 (will be treated as 16bit)
testb pb,#6 wc
if_c jmp #mk_setup_operand16
testb pb,#7 wc
if_c jmp #mk_setup_operand32
' Fall through!
mk_setup_operand8
'debug("in mk_setup_operand8 ",ubin(pb))
mov mk_shiftit,#24
mk_setup_operand8_move
test pb,#%110_000 wz
if_z jmp #mk_setup_reg8
and pb,#%00_111_111
cmp pb,#%00_111_100 wc
if_ae jmp #mk_setup_imm8
call #mk_compute_ea
mk_setup_ea8
'debug("in mk_setup_ea8 ",uhex_long(mk_effaddr))
getnib pb,mk_effaddr,#5
altd pb,#mk_setup_ea8_tab
execf 0-0
mk_setup_operand16
'debug("in mk_setup_operand16 ",ubin(pb))
mov mk_shiftit,#16
mk_setup_operand16_move
test pb,#%110_000 wz
if_z jmp #mk_setup_reg16
and pb,#%00_111_111
cmp pb,#%00_111_100 wc
if_ae jmp #mk_setup_imm16
or pb,#%01_000_000
call #mk_compute_ea
mk_setup_ea16
testb mk_effaddr,#0 wc
if_c jmp #mk_address_error
getnib pb,mk_effaddr,#5
altd pb,#mk_setup_ea16_tab
execf 0-0
mk_setup_operand32
mov mk_shiftit,#0
mk_setup_operand32_move
test pb,#%110_000 wz
if_z jmp #mk_setup_reg32
and pb,#%00_111_111
cmp pb,#%00_111_100 wc
if_ae jmp #mk_setup_imm32
or pb,#%10_000_000
call #mk_compute_ea
mk_setup_ea32
testb mk_effaddr,#0 wc
if_c jmp #mk_address_error
getnib pb,mk_effaddr,#5
altd pb,#mk_setup_ea32_tab
execf 0-0
mk_ea_impl_tbl
long mk_ea_direct
long mk_ea_postinc
long mk_ea_predec
long mk_ea_displace
long mk_ea_index
long mk_ea_headache
mk_multilogic
call #mk_get_second_reg
callpb mk_opword,#mk_setup_operand_auto
call mk_readf
push #mk_write_second_reg_or_ea
mk_multilogic_common
shl mk_memvalue,mk_shiftit
shl mk_optmp1,mk_shiftit
mk_thelogicop and mk_memvalue,mk_optmp1 wz
bitz mk_sr,#MK_ZERO_BIT
testb mk_memvalue,#31 wz
bitz mk_sr,#MK_NEG_BIT
andn mk_sr,#MK_CARRY_MASK|MK_OVER_MASK
_ret_ shr mk_memvalue,mk_shiftit
mk_getop_ram
mov mk_memtmp0,mk_virtualpc
add mk_virtualpc,#2
setword mk_memtmp0,#1,#1 ' main_ram!
rdword mk_opword,mk_memtmp0
_ret_ movbyts mk_opword,#%%3201
mk_getop_rom
'debug("in getop_rom with ",udec(mk_romque_left))
djf mk_romque_left,#mk_romque_refill
add mk_virtualpc,#2
rdword mk_opword,ptra++
movbyts mk_opword,#%%3201
ret wcz
mk_romque_left long 0
mk_romio_area_ptr long @mk_romio_area
mk_romio_area_ptr_shr2 long @mk_romio_area >> 2
mk_romque_area_ptr long @mk_romque_area
mk_dreg_mask long %111_000_000_000
mk_vectors_mask long $FF_FF80
mk_bit31 long 1<<31
mk_minus4 long -4
mk_cogvar_start
mk_debug_tripwire long $03c9da+2
mk_debug_ctr long 0
mk_vram_curr long 0
mk_vram_modulo long 0
mk_vectors_ptr res 1
mk_prog_base res 1
mk_port_base res 1
mk_bios_base res 1
mk_pvc_bankreg res 1
mk_virtualpc res 1 ' PC in virtual space
mk_effaddr res 1 ' calculated effective address
mk_shiftit res 1 ' operand MSB shift
mk_branchdisplace res 1 ' branch target
mk_opword res 1 ' opcode
mk_readf res 1 ' operand read pointer
mk_writef res 1 ' operand write pointer
mk_getopf res 1 ' opword get pointer
mk_optmp0 res 1
mk_optmp1 res 1
mk_optmp2 res 1
mk_eatmp0 res 1
mk_eatmp1 res 1
mk_romio_addr res 1
mk_romio_length res 1
mk_romio_target res 1
mk_romqueio_addr res 1
mk_romqueio_length res 1
mk_romqueio_target res 1
mk_romque_base res 1
mk_romque_zerox res 1
mk_romio_atnval res 1
fit $1F0
org $1F0
mk_memtmp0 res 1
mk_memtmp1 res 1
mk_memtmp2 res 1
mk_memtmp3 res 1
mk_memvalue res 1 ' memory read/write value
mk_eacache res 1 ' remapped EA
fit $1F6
DAT ' MotoKore 68000 LUT resident code
mk_lutbase
org 512
mk_move_shoot_the_shit ' handle all the common MOVE stuff
' Doing MOVEA?
test mk_opword,#%110_000_000 wz
testb mk_opword,#6 andz
if_z jmp #.movea
signx mk_memvalue,pa wcz
bitc mk_sr,#MK_NEG_BIT
bitz mk_sr,#MK_ZERO_BIT
andn mk_sr,#MK_OVER_MASK|MK_CARRY_MASK
.mangle_ea2 ' format for second operand is stupid
setnib mk_opword,#0,#3
mov pa,mk_opword
and pa,#%111_000_000
shl pa,#6
or mk_opword,pa
_ret_ shr mk_opword,#9
.movea
shr mk_opword,#9
and mk_opword,#7
altr mk_opword,#mk_a0
signx mk_memvalue,pa
jmp #mk_nextop ' don't need the rest of the op
mk_nibble_1 ' MOVE (byte)
callpb mk_opword,#mk_setup_operand8_move
call mk_readf
callpa #7,#mk_move_shoot_the_shit
callpb mk_opword,#mk_setup_operand8_move
'debug("in move.b, writing ",uhex_byte(mk_memvalue)," to ",uhex_long(mk_effaddr))
jmp mk_writef
mk_nibble_3 ' MOVE (word)
'debug("in move.w")
callpb mk_opword,#mk_setup_operand16_move
call mk_readf
callpa #15,#mk_move_shoot_the_shit
callpb mk_opword,#mk_setup_operand16_move
'debug("in move.w, writing ",uhex_word(mk_memvalue)," to ",uhex_long(mk_effaddr))
jmp mk_writef
mk_nibble_2 ' MOVE (long)
callpb mk_opword,#mk_setup_operand32_move
call mk_readf
callpa #31,#mk_move_shoot_the_shit
callpb mk_opword,#mk_setup_operand32_move
jmp mk_writef
mk_nibble_5 ' ADDQ/SUBQ/Scc/DBcc
test mk_opword,#%11_000_000 wcz
if_00 jmp #mk_nibble_5_not_addsub
' get operand
mov mk_optmp1,mk_opword
shr mk_optmp1,#9 wc ' C = SUBQ, NC = ADDQ
and mk_optmp1,#7 wz
if_z mov mk_optmp1,#8
' Check if An reg
test mk_opword,#%110_000 wz
testb mk_opword,#3 andz
if_z jmp #.addsubq_areg
callpb mk_opword,#mk_setup_operand_auto
call mk_readf
push mk_writef
if_c jmp #mk_sub_common
jmp #mk_add_common
.addsubq_areg
and mk_opword,#7
altd mk_opword,#mk_a0
_ret_ sumc 0-0,mk_optmp1
mk_nibble_5_not_addsub
' Check if DBCC
test mk_opword,#%110_000 wz
testb mk_opword,#3 andz
if_z jmp #mk_dbcc
' got SCC
callpb mk_opword,#mk_setup_operand8_move
call mk_readf ' <- yes, this is stupid but accurate
getnib pb,mk_opword,#2
shr pb,#1 wc
altd pb,#mk_condition_truth_table
testb 0-0,mk_sr xorc
muxc mk_memvalue,#255
jmp mk_writef
mk_romque_refill
mov mk_romqueio_target,mk_romque_area_ptr
mov mk_romqueio_length,#MK_ROMQUE_SIZE/2 wcz ' clear C and Z
mov mk_romqueio_addr,mk_virtualpc
zerox mk_romqueio_addr,mk_romque_zerox ' Limit to 1 MB range
add mk_romqueio_addr,mk_romque_base
' Handle not long-aligned access
rczr mk_romqueio_addr wcz
'if_z jmp #mk_address_error_debug ' TODO: maybe make AE function code read program in this case?
if_c sub mk_romqueio_target,#2
if_c add mk_romqueio_length,#1
setq #2
wrlong mk_romqueio_addr,#_progrq_addr
cogatn mk_romio_atnval
mov ptra,mk_romque_area_ptr
mov mk_romque_left,#MK_ROMQUE_SIZE
push #mk_getop_rom
_ret_ waitatn
mk_compute_ea ' CAN AND WILL OVERWRITE FLAGS
'debug("In mk_compute_ea ",ubin(pb))
mov mk_eatmp1,pb
shr mk_eatmp1,#3 wcz '< just to drive the point home
and mk_eatmp1,#7
altd mk_eatmp1,#mk_ea_impl_tbl - 2 ' non-memory modes shouldn't appear here
jmp 0-0
mk_ea_direct
and pb,#7
alts pb,#mk_a0
_ret_ mov mk_effaddr,0-0
mk_nibble_E ' shifts
andn mk_sr,#MK_OVER_MASK|MK_CARRY_MASK ' These are cleared by default
test mk_opword,#%11_000_000 wcz