/
mtb-bsp-manifest-fv2.xml
3048 lines (3047 loc) · 259 KB
/
mtb-bsp-manifest-fv2.xml
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<boards>
<board default_location="local">
<id>CYW943907AEVAL1F</id>
<category>AIROC™ Connectivity BSPs</category>
<board_uri>https://github.com/Infineon/TARGET_CYW943907AEVAL1F</board_uri>
<chips>
<mcu>CYW43907KWBG</mcu>
</chips>
<name>CYW943907AEVAL1F</name>
<summary>The CYW943907AEVAL1F Evaluation kit enables you to evaluate and develop single-chip Wi-Fi applications using CYW43907 devices. The kit uses a module based on CYW43907 device. CYW43907 is a single-chip 802.11n dual-band (2.4 GHz and 5 GHz) Wi-Fi SoC that features 320-MHz Arm® Cortex®-R4 MCU for application subsystem and various on-chip interfaces like Ethernet (RMII/MII), UART, SPI/QSPI and I2C that in totality offers a very small-footprint IoT solution.</summary>
<prov_capabilities>anycloud arduino ble bt cat4 cyw943907aeval1f dma flash_0k hal i2c led low_power lptimer mcu_gp spi sram_2048k switch uart wifi</prov_capabilities>
<description> <div class="category">Kit Features:</div><ul> <li>CYW43907 based module</li> <li>On-board PCB antenna with an option to connect external antenna</li> <li>Arduino compatible headers for hardware expansion</li> <li>Custom header to bring out additional GPIOs (WICED header)</li> <li>User switches and LEDs</li> <li>On-board programmer and debugger using USB interface and USB-UART bridge</li> <li>RJ45 connector for Ethernet</li> <li>5 V to 12 V input using USB connector or power jack</li> </ul><p/> <div class="category">Kit Contents:</div><ul> <li>CYW943907AEVAL1F Evaluation board</li> <li>USB Standard-A to Micro-B cable</li> <li>Quick Start Guide</li> </ul></description>
<documentation_url>https://www.cypress.com/documentation/development-kitsboards/cyw943907aeval1f-evaluation-kit</documentation_url>
<versions>
<version tools_min_version="3.0.0" flow_version="2.0" prov_capabilities_per_version="bsp_gen4">
<num>Latest 1.X release</num>
<commit>latest-v1.X</commit>
</version>
<version tools_min_version="3.0.0" flow_version="2.0" prov_capabilities_per_version="bsp_gen4">
<num>1.1.0 release</num>
<commit>release-v1.1.0</commit>
</version>
<version tools_min_version="3.0.0" flow_version="2.0" prov_capabilities_per_version="bsp_gen4">
<num>1.0.0 release</num>
<commit>release-v1.0.0</commit>
</version>
<version tools_min_version="2.4.0" flow_version="1.0,2.0" prov_capabilities_per_version="bsp_gen3">
<num>Latest 0.X release</num>
<commit>latest-v0.X</commit>
</version>
<version tools_min_version="2.4.0" flow_version="1.0,2.0" prov_capabilities_per_version="bsp_gen3">
<num>0.5.0 release</num>
<commit>release-v0.5.0</commit>
</version>
</versions>
</board>
<board default_location="local">
<id>CYW954907AEVAL1F</id>
<category>AIROC™ Connectivity BSPs</category>
<board_uri>https://github.com/Infineon/TARGET_CYW954907AEVAL1F</board_uri>
<chips>
<mcu>CYW54907KWBG</mcu>
</chips>
<name>CYW954907AEVAL1F</name>
<summary>The CYW954907AEVAL1F Evaluation kit enables you to evaluate and develop single-chip Wi-Fi applications using CYW54907 devices. The kit uses a module based on CYW54907 device. CYW54907 is a single-chip 802.11n dual-band (2.4 GHz and 5 GHz) Wi-Fi SoC that features 320-MHz Arm® Cortex®-R4 MCU for application subsystem and various on-chip interfaces like Ethernet (RMII/MII), UART, SPI/QSPI and I2C that in totality offers a very small-footprint IoT solution.</summary>
<prov_capabilities>anycloud arduino ble bt cat4 cyw954907aeval1f dma flash_0k hal i2c led low_power lptimer mcu_gp spi sram_2048k switch uart wifi</prov_capabilities>
<description> <div class="category">Kit Features:</div><ul> <li>CYW54907 based module</li> <li>On-board PCB antenna with an option to connect external antenna</li> <li>Arduino compatible headers for hardware expansion</li> <li>Custom header to bring out additional GPIOs (WICED header)</li> <li>User switches and LEDs</li> <li>On-board programmer and debugger using USB interface and USB-UART bridge</li> <li>RJ45 connector for Ethernet</li> <li>5 V to 12 V input using USB connector or power jack</li> </ul><p/> <div class="category">Kit Contents:</div><ul> <li>CYW954907AEVAL1F Evaluation board</li> <li>USB Standard-A to Micro-B cable</li> <li>Quick Start Guide</li> </ul></description>
<documentation_url>https://www.cypress.com/documentation/development-kitsboards/cyw954907aeval1f-evaluation-kit</documentation_url>
<versions>
<version tools_min_version="3.0.0" flow_version="2.0" prov_capabilities_per_version="bsp_gen4">
<num>Latest 1.X release</num>
<commit>latest-v1.X</commit>
</version>
<version tools_min_version="3.0.0" flow_version="2.0" prov_capabilities_per_version="bsp_gen4">
<num>1.1.0 release</num>
<commit>release-v1.1.0</commit>
</version>
<version tools_min_version="3.0.0" flow_version="2.0" prov_capabilities_per_version="bsp_gen4">
<num>1.0.0 release</num>
<commit>release-v1.0.0</commit>
</version>
<version tools_min_version="2.4.0" flow_version="1.0,2.0" prov_capabilities_per_version="bsp_gen3">
<num>Latest 0.X release</num>
<commit>latest-v0.X</commit>
</version>
<version tools_min_version="2.4.0" flow_version="1.0,2.0" prov_capabilities_per_version="bsp_gen3">
<num>0.5.0 release</num>
<commit>release-v0.5.0</commit>
</version>
</versions>
</board>
<board default_location="local">
<id>CY8CKIT-040T</id>
<category>PSoC™ 4 BSPs</category>
<board_uri>https://github.com/Infineon/TARGET_CY8CKIT-040T</board_uri>
<chips>
<mcu>CY8C4046LQI-T452</mcu>
</chips>
<name>CY8CKIT-040T</name>
<summary>The PSoC&#8482; 4000T CAPSENSE&#8482; Evaluation Kit enables you to evaluate and develop with Cypress's fifth-generation, low-power CAPSENSE&#8482; solution using the PSoC&#8482; 4000T device.</summary>
<prov_capabilities>bsp_gen4 capsense cat2 cy8ckit_040t enclosure flash_64k i2c led low_power mcu_gp msc_button msc_proximity msc_touchpad msclp psoc4 serial_led spi sram_8k</prov_capabilities>
<description> <div class="category">Kit Features:</div><ul> <li>World's Most Reliable, Liquid Tolerant, Lowest Power CAPSENSE&#8482; Solution</li> <li>On-board Programmer and Debugger</li> </ul><p/> <div class="category">Kit Contents:</div><ul> <li>CY8CKIT-040T PSoC&#8482; 4000T CAPSENSE&#8482; Evaluation Board with Enclosure</li> <li>Quick Start Guide</li> <li>USB Type-A to Micro-B cable</li> </ul></description>
<documentation_url>https://www.infineon.com/CY8CKIT-040T</documentation_url>
<versions>
<version tools_min_version="3.0.0" flow_version="2.0" prov_capabilities_per_version="hal uart">
<num>Latest 3.X release</num>
<commit>latest-v3.X</commit>
</version>
<version tools_min_version="3.0.0" flow_version="2.0" prov_capabilities_per_version="hal uart">
<num>3.1.0 release</num>
<commit>release-v3.1.0</commit>
</version>
</versions>
</board>
<board default_location="local">
<id>CY8CKIT-041-41XX</id>
<category>PSoC™ 4 BSPs</category>
<board_uri>https://github.com/cypresssemiconductorco/TARGET_CY8CKIT-041-41XX</board_uri>
<chips>
<mcu>CY8C4146AZI-S433</mcu>
</chips>
<name>CY8CKIT-041-41XX</name>
<summary>The PSoC™ 4100S Pioneer Kit enables you to evaluate and develop with Cypress's fourth-generation, low-power CAPSENSE™ solution using the PSoC™ 4100S device.</summary>
<prov_capabilities>adc arduino capsense capsense_button capsense_touchpad cat2 comp csd cy8ckit_041_41xx fram hal i2c j2 led lptimer mcu_gp memory memory_i2c opamp pot psoc4 rgb_led smart_io spi switch uart</prov_capabilities>
<description> <div class="category">Kit Features:</div><ul> <li>Ready-to-Use CAPSENSE&#8482; Trackpad</li> <li>EZ-BLE PRoC module</li> <li>Potentiometer</li> <li>Rechargeable coin-cell battery</li> </ul><p/> <div class="category">Kit Contents:</div><ul> <li>CY8CKIT-041-41XX PSoC&#8482; 4100S Pioneer board</li> <li>USB Standad-A to Micro-B cable</li> <li>Water dropper</li> <li>Four press-fit connectors (for Arduino headers)</li> <li>Four jumper wires</li> <li>Quick Start Guide</li> </ul></description>
<documentation_url>https://www.infineon.com/CY8CKIT-041-41XX</documentation_url>
<versions>
<version tools_min_version="3.0.0" flow_version="2.0" prov_capabilities_per_version="bsp_gen4 flash_64k low_power sram_8k">
<num>Latest 3.X release</num>
<commit>latest-v3.X</commit>
</version>
<version tools_min_version="3.0.0" flow_version="2.0" prov_capabilities_per_version="bsp_gen4 flash_64k low_power sram_8k">
<num>3.1.0 release</num>
<commit>release-v3.1.0</commit>
</version>
<version tools_min_version="3.0.0" flow_version="2.0" prov_capabilities_per_version="bsp_gen4">
<num>3.0.0 release</num>
<commit>release-v3.0.0</commit>
</version>
<version tools_min_version="2.4.0" flow_version="1.0,2.0" prov_capabilities_per_version="bsp_gen3">
<num>Latest 2.X release</num>
<commit>latest-v2.X</commit>
</version>
<version tools_min_version="2.4.0" flow_version="1.0,2.0" prov_capabilities_per_version="bsp_gen3">
<num>2.0.0 release</num>
<commit>release-v2.0.0</commit>
</version>
<version tools_min_version="2.2.0" flow_version="1.0,2.0" prov_capabilities_per_version="bsp_gen2">
<num>Latest 1.X release</num>
<commit>latest-v1.X</commit>
</version>
<version tools_min_version="2.2.0" flow_version="1.0,2.0" prov_capabilities_per_version="bsp_gen2">
<num>1.2.0 release</num>
<commit>release-v1.2.0</commit>
</version>
<version tools_min_version="2.2.0" flow_version="1.0,2.0" prov_capabilities_per_version="bsp_gen2">
<num>1.1.0 release</num>
<commit>release-v1.1.0</commit>
</version>
<version tools_min_version="2.2.0" flow_version="1.0,2.0" prov_capabilities_per_version="bsp_gen2">
<num>1.0.0 release</num>
<commit>release-v1.0.0</commit>
</version>
</versions>
</board>
<board default_location="local">
<id>CY8CKIT-041S-MAX</id>
<category>PSoC™ 4 BSPs</category>
<board_uri>https://github.com/cypresssemiconductorco/TARGET_CY8CKIT-041S-MAX</board_uri>
<chips>
<mcu>CY8C4149AZI-S598</mcu>
</chips>
<name>CY8CKIT-041S-MAX</name>
<summary>The PSoC™ 4100S Max Pioneer Kit enables you to evaluate and develop with Cypress's fifth-generation, low-power CAPSENSE™ solution using the PSoC™ 4100S Max device.</summary>
<prov_capabilities>adc arduino can capsense cat2 comp cy8ckit_041s_max dma flash_384k hal i2c j2 led lptimer mcu_gp memory memory_i2c msc msc_button msc_proximity msc_slider msc_touchpad opamp psoc4 smart_io spi sram_32k std_crypto switch uart</prov_capabilities>
<description> <div class="category">Kit Features:</div><ul> <li>World's Most Reliable, Lowest Power CAPSENSE&#8482; Solution</li> <li>On-board Programmer and Debugger</li> <li>Ready-to-Use CAPSENSE&#8482; Buttons</li> <li>Ready-to-Use CAPSENSE&#8482; Touchpad</li> <li>Ready-to-Use CAPSENSE&#8482; Slider</li> <li>Ready-to-Use CAPSENSE&#8482; Proximity</li> <li>Thermistor</li> </ul><p/> <div class="category">Kit Contents:</div><ul> <li>CY8CKIT-041S-Max PSoC&#8482; 4100S Max Pioneer Board</li> <li>CY8CKIT-041S-Max Capacitive Sensing Expansion Board</li> <li>USB Type-A to Micro-B cable</li> <li>Six jumper wires</li> <li>40 pin FFC cable</li> <li>Quick Start Guide</li> </ul></description>
<documentation_url>https://www.infineon.com/CY8CKIT-041S-MAX</documentation_url>
<versions>
<version tools_min_version="3.0.0" flow_version="2.0" prov_capabilities_per_version="bsp_gen4 i2s low_power">
<num>Latest 3.X release</num>
<commit>latest-v3.X</commit>
</version>
<version tools_min_version="3.0.0" flow_version="2.0" prov_capabilities_per_version="bsp_gen4 i2s low_power">
<num>3.1.0 release</num>
<commit>release-v3.1.0</commit>
</version>
<version tools_min_version="3.0.0" flow_version="2.0" prov_capabilities_per_version="bsp_gen4">
<num>3.0.0 release</num>
<commit>release-v3.0.0</commit>
</version>
<version tools_min_version="2.4.0" flow_version="1.0,2.0" prov_capabilities_per_version="bsp_gen3">
<num>Latest 2.X release</num>
<commit>latest-v2.X</commit>
</version>
<version tools_min_version="2.4.0" flow_version="1.0,2.0" prov_capabilities_per_version="bsp_gen3">
<num>2.0.0 release</num>
<commit>release-v2.0.0</commit>
</version>
</versions>
</board>
<board default_location="local">
<id>CY8CKIT-045S</id>
<category>PSoC™ 4 BSPs</category>
<board_uri>https://github.com/Infineon/TARGET_CY8CKIT-045S</board_uri>
<chips>
<mcu>CY8C4548AZI-S485</mcu>
</chips>
<name>CY8CKIT-045S</name>
<summary>The PSoC™ 4500S Pioneer Kit (CY8CKIT-045S) is a low-cost hardware platform that enables design and debug of the PSoC™ 4500S device which is for power and motor control applications. The PSoC™ 4500S Pioneer Kit enables you to evaluate and develop motor control applications along with CY8CKIT-037.</summary>
<prov_capabilities>adc arduino capsense capsense_button capsense_slider cat2 comp csd cy8ckit_045s dma flash_256k hal i2c j2 led lptimer mcu_gp opamp psoc4 rgb_led smart_io spi sram_32k switch uart</prov_capabilities>
<description> <div class="category">Kit Features:</div><ul> <li>High Performance Analog with Dual ADCs <li>World's Most Reliable, Lowest Power CAPSENSE&#8482; Solution</li> <li>On-board Programmer and Debugger</li> </ul><p/> <div class="category">Kit Contents:</div><ul> <li>CY8CKIT-045S PSoC&#8482; 4500S Pioneer board</li> <li>USB Standad-A to Micro-B cable</li> <li>Six jumper wires</li> <li>Quick Start Guide</li> </ul></description>
<documentation_url>https://www.infineon.com/CY8CKIT-045S</documentation_url>
<versions>
<version tools_min_version="3.0.0" flow_version="2.0" prov_capabilities_per_version="bsp_gen4 low_power">
<num>Latest 3.X release</num>
<commit>latest-v3.X</commit>
</version>
<version tools_min_version="3.0.0" flow_version="2.0" prov_capabilities_per_version="bsp_gen4 low_power">
<num>3.1.0 release</num>
<commit>release-v3.1.0</commit>
</version>
<version tools_min_version="3.0.0" flow_version="2.0" prov_capabilities_per_version="bsp_gen4">
<num>3.0.0 release</num>
<commit>release-v3.0.0</commit>
</version>
<version tools_min_version="2.4.0" flow_version="1.0,2.0" prov_capabilities_per_version="bsp_gen3">
<num>Latest 2.X release</num>
<commit>latest-v2.X</commit>
</version>
<version tools_min_version="2.4.0" flow_version="1.0,2.0" prov_capabilities_per_version="bsp_gen3">
<num>2.0.0 release</num>
<commit>release-v2.0.0</commit>
</version>
<version tools_min_version="2.2.0" flow_version="1.0,2.0" prov_capabilities_per_version="bsp_gen2">
<num>Latest 1.X release</num>
<commit>latest-v1.X</commit>
</version>
<version tools_min_version="2.2.0" flow_version="1.0,2.0" prov_capabilities_per_version="bsp_gen2">
<num>1.2.0 release</num>
<commit>release-v1.2.0</commit>
</version>
<version tools_min_version="2.2.0" flow_version="1.0,2.0" prov_capabilities_per_version="bsp_gen2">
<num>1.1.0 release</num>
<commit>release-v1.1.0</commit>
</version>
</versions>
</board>
<board default_location="local">
<id>CY8CKIT-145-40XX</id>
<category>PSoC™ 4 BSPs</category>
<board_uri>https://github.com/cypresssemiconductorco/TARGET_CY8CKIT-145-40XX</board_uri>
<chips>
<mcu>CY8C4045AZI-S413</mcu>
</chips>
<name>CY8CKIT-145-40XX</name>
<summary>The PSoC™ 4000S Prototyping Kit enables you to evaluate and develop with Cypress's fourth-generation, low-power CAPSENSE™ solution using the PSoC™ 4000S device.</summary>
<prov_capabilities>capsense capsense_button capsense_linear_slider cat2 comp csd cy8ckit_145_40xx hal i2c j2 led mcu_gp psoc4 smart_io spi switch uart</prov_capabilities>
<description> <div class="category">Kit Features:</div><ul> <li>World's Most Reliable, Lowest Power CAPSENSE&#8482; Solution</li> <li>On-board Programmer and Debugger</li> </ul><p/> <div class="category">Kit Contents:</div><ul> <li>CY8CKIT-145-40XX PSoC&#8482; 4000S Prototyping board</li> <li>Quick Start Guide</li> </ul></description>
<documentation_url>https://www.infineon.com/CY8CKIT-145-40XX</documentation_url>
<versions>
<version tools_min_version="3.0.0" flow_version="2.0" prov_capabilities_per_version="bsp_gen4 flash_32k low_power lptimer sram_4k">
<num>Latest 3.X release</num>
<commit>latest-v3.X</commit>
</version>
<version tools_min_version="3.0.0" flow_version="2.0" prov_capabilities_per_version="bsp_gen4 flash_32k low_power lptimer sram_4k">
<num>3.1.0 release</num>
<commit>release-v3.1.0</commit>
</version>
<version tools_min_version="3.0.0" flow_version="2.0" prov_capabilities_per_version="bsp_gen4">
<num>3.0.0 release</num>
<commit>release-v3.0.0</commit>
</version>
<version tools_min_version="2.4.0" flow_version="1.0,2.0" prov_capabilities_per_version="bsp_gen3">
<num>Latest 2.X release</num>
<commit>latest-v2.X</commit>
</version>
<version tools_min_version="2.4.0" flow_version="1.0,2.0" prov_capabilities_per_version="bsp_gen3">
<num>2.0.0 release</num>
<commit>release-v2.0.0</commit>
</version>
<version tools_min_version="2.2.0" flow_version="1.0,2.0" prov_capabilities_per_version="bsp_gen2">
<num>Latest 1.X release</num>
<commit>latest-v1.X</commit>
</version>
<version tools_min_version="2.2.0" flow_version="1.0,2.0" prov_capabilities_per_version="bsp_gen2">
<num>1.2.0 release</num>
<commit>release-v1.2.0</commit>
</version>
<version tools_min_version="2.2.0" flow_version="1.0,2.0" prov_capabilities_per_version="bsp_gen2">
<num>1.1.0 release</num>
<commit>release-v1.1.0</commit>
</version>
<version tools_min_version="2.2.0" flow_version="1.0,2.0" prov_capabilities_per_version="bsp_gen2">
<num>1.0.0 release</num>
<commit>release-v1.0.0</commit>
</version>
</versions>
</board>
<board default_location="local">
<id>CY8CKIT-149</id>
<category>PSoC™ 4 BSPs</category>
<board_uri>https://github.com/cypresssemiconductorco/TARGET_CY8CKIT-149</board_uri>
<chips>
<mcu>CY8C4147AZI-S475</mcu>
</chips>
<name>CY8CKIT-149</name>
<summary>The PSoC™ 4100S Plus Prototyping Kit enables you to evaluate the PSoC™ 4100S Plus device and develop with Cypress's fourth-generation, low-power CAPSENSE™ solution.</summary>
<prov_capabilities>adc can capsense capsense_button capsense_linear_slider cat2 comp csd cy8ckit_149 dma flash_128k hal i2c j2 led lptimer mcu_gp opamp psoc4 smart_io spi sram_16k switch uart</prov_capabilities>
<description> <div class="category">Kit Features:</div><ul> <li>World's Most Reliable, Lowest Power CAPSENSE&#8482; Solution</li> <li>On-board Programmer and Debugger</li> </ul><p/> <div class="category">Kit Contents:</div><ul> <li>CY8CKIT-149 PSoC&#8482; 4100S Plus Prototyping board</li> <li>Quick Start Guide</li> </ul></description>
<documentation_url>https://www.infineon.com/CY8CKIT-149</documentation_url>
<versions>
<version tools_min_version="3.0.0" flow_version="2.0" prov_capabilities_per_version="bsp_gen4 low_power">
<num>Latest 3.X release</num>
<commit>latest-v3.X</commit>
</version>
<version tools_min_version="3.0.0" flow_version="2.0" prov_capabilities_per_version="bsp_gen4 low_power">
<num>3.1.0 release</num>
<commit>release-v3.1.0</commit>
</version>
<version tools_min_version="3.0.0" flow_version="2.0" prov_capabilities_per_version="bsp_gen4">
<num>3.0.0 release</num>
<commit>release-v3.0.0</commit>
</version>
<version tools_min_version="2.4.0" flow_version="1.0,2.0" prov_capabilities_per_version="bsp_gen3">
<num>Latest 2.X release</num>
<commit>latest-v2.X</commit>
</version>
<version tools_min_version="2.4.0" flow_version="1.0,2.0" prov_capabilities_per_version="bsp_gen3">
<num>2.0.0 release</num>
<commit>release-v2.0.0</commit>
</version>
<version tools_min_version="2.2.0" flow_version="1.0,2.0" prov_capabilities_per_version="bsp_gen2">
<num>Latest 1.X release</num>
<commit>latest-v1.X</commit>
</version>
<version tools_min_version="2.2.0" flow_version="1.0,2.0" prov_capabilities_per_version="bsp_gen2">
<num>1.2.0 release</num>
<commit>release-v1.2.0</commit>
</version>
<version tools_min_version="2.2.0" flow_version="1.0,2.0" prov_capabilities_per_version="bsp_gen2">
<num>1.1.0 release</num>
<commit>release-v1.1.0</commit>
</version>
<version tools_min_version="2.2.0" flow_version="1.0,2.0" prov_capabilities_per_version="bsp_gen2">
<num>1.0.0 release</num>
<commit>release-v1.0.0</commit>
</version>
</versions>
</board>
<board default_location="local">
<id>CY8CPROTO-040T</id>
<category>PSoC™ 4 BSPs</category>
<board_uri>https://github.com/Infineon/TARGET_CY8CPROTO-040T</board_uri>
<chips>
<mcu>CY8C4046LQI-T452</mcu>
</chips>
<name>CY8CPROTO-040T</name>
<summary>The PSoC&#8482; 4000T CAPSENSE&#8482; Prototyping Kit enables you to evaluate and develop with Cypress's fifth-generation, low-power CAPSENSE&#8482; solution using the PSoC&#8482; 4000T device.</summary>
<prov_capabilities>bsp_gen4 capsense cat2 cy8cproto_040t flash_64k i2c spi led low_power mcu_gp msc_button msc_proximity msc_slider msclp psoc4 sram_8k uart</prov_capabilities>
<description> <div class="category">Kit Features:</div><ul> <li>World's Most Reliable, Lowest Power CAPSENSE&#8482; Solution</li> <li>On-board Programmer and Debugger</li> </ul><p/> <div class="category">Kit Contents:</div><ul> <li>CY8CPROTO-040T PSoC&#8482; 4000T CAPSENSE&#8482; Prototyping Kit </li> <li>Quick Start Guide</li> </ul></description>
<documentation_url>https://www.infineon.com/CY8CPROTO-040T</documentation_url>
<versions>
<version tools_min_version="3.1.0" flow_version="2.0" prov_capabilities_per_version="">
<num>Latest 3.X release</num>
<commit>latest-v3.X</commit>
</version>
<version tools_min_version="3.1.0" flow_version="2.0" prov_capabilities_per_version="">
<num>3.2.0 release</num>
<commit>release-v3.2.0</commit>
</version>
</versions>
</board>
<board default_location="local">
<id>EVAL_PMG1_B1_DRP</id>
<category>PMG BSPs</category>
<board_uri>https://github.com/Infineon/TARGET_EVAL_PMG1_B1_DRP</board_uri>
<chips>
<mcu>CYPM1116-48LQXI</mcu>
</chips>
<name>EVAL_PMG1_B1_DRP</name>
<summary>The EVAL_PMG1_B1_DRP Prototyping kit is a development platform to design products from the EZ-PD™ PMG1-B1 USB Power Delivery (PD) microcontroller (MCU) with an integrated buck-boost battery charger. EZ-PD™ PMG1-B1 is targeted for battery-powered applications that are powered by USB-C PD such as cordless power tool chargers, wireless speakers, and portable electronics.</summary>
<prov_capabilities>adc bsp_gen4 cat2 eval_pmg1_b1_drp flash_128k i2c j2 led low_power mcu_gp pmg1 pmg1_b1_cy7116 spi sram_16k switch uart usbpd</prov_capabilities>
<description> <div class="category">Kit Features:</div> <ul> <li>Support for single Port USB PD 3.1 Source/ Sink Role (DRP).</li> <li>Support 100W sink operation and 27W source operation.</li> <li>Support USB bus/DC supply/battery powered operation.</li> <li>KitProg3 based programming and debug interface.</li> <li>Access to the pins of PMG1-B1 silicon (CYPM1116-48LQXI) in hardware and support for BSP, PDL and Middleware in ModusToolbox&#8482;.</li> <li>The kit can provide a 5V/400mA supply to enable customers to power the peripherals/sensors if required. An on-board regulator from IFX can provide this power using the VBUS input. This is an optional requirement to be decided during the design phase.</li> </ul> <div class="category">Kit Contents:</div> <ul> <li>EZ-PD CYPM116-48LQXI based board</li> <li>Quick Start Guide</li> </ul></description>
<documentation_url>https://www.infineon.com/EVAL_PMG1_B1_DRP</documentation_url>
<versions>
<version tools_min_version="3.0.0" flow_version="2.0" prov_capabilities_per_version="">
<num>Latest 3.X release</num>
<commit>latest-v3.X</commit>
</version>
<version tools_min_version="3.0.0" flow_version="2.0" prov_capabilities_per_version="">
<num>3.2.0 release</num>
<commit>release-v3.2.0</commit>
</version>
</versions>
</board>
<board default_location="local">
<id>PMG1-CY7110</id>
<category>PMG BSPs</category>
<board_uri>https://github.com/cypresssemiconductorco/TARGET_PMG1-CY7110</board_uri>
<chips>
<mcu>CYPM1011-24LQXI</mcu>
</chips>
<name>PMG1-CY7110</name>
<summary>The CY7110 EZ-PD PMG1-S0 Prototyping Kit is a low cost prototyping platform which enables design and development of EZ-PD PMG1-S0 (CYPM1011-24LQXI) based embedded applications with USB PD Sink capability.</summary>
<prov_capabilities>cat2 flash_64k hal i2c j2 led mcu_gp pmg1 pmg1_cy7110 spi sram_8k switch uart usbpd</prov_capabilities>
<description> <div class="category">Kit Features:</div> <ul> <li>USB PD 3.0 compliant Sink which can support up to 100W (20V, 5A) of power consumption.</li> <li>USB bus powered operation.</li> <li>KitProg3 based programming and debug interface.</li> <li>Access to the pins of PMG1-S0 silicon (CYPM1011-24LQXI) in hardware and support for BSP, HAL, PDL and Middleware in Modus Toolbox.</li> </ul> <div class="category">Kit Contents:</div> <ul> <li>EZ-PD CYPM1011-24LQXI based board</li> <li>Quick Start Guide</li> </ul></description>
<documentation_url>https://www.cypress.com/CY7110</documentation_url>
<versions>
<version tools_min_version="3.0.0" flow_version="2.0" prov_capabilities_per_version="bsp_gen4 low_power">
<num>Latest 3.X release</num>
<commit>latest-v3.X</commit>
</version>
<version tools_min_version="3.0.0" flow_version="2.0" prov_capabilities_per_version="bsp_gen4 low_power">
<num>3.1.0 release</num>
<commit>release-v3.1.0</commit>
</version>
<version tools_min_version="3.0.0" flow_version="2.0" prov_capabilities_per_version="bsp_gen4">
<num>3.0.0 release</num>
<commit>release-v3.0.0</commit>
</version>
<version tools_min_version="2.4.0" flow_version="1.0,2.0" prov_capabilities_per_version="bsp_gen3">
<num>Latest 2.X release</num>
<commit>latest-v2.X</commit>
</version>
<version tools_min_version="2.4.0" flow_version="1.0,2.0" prov_capabilities_per_version="bsp_gen3">
<num>2.0.0 release</num>
<commit>release-v2.0.0</commit>
</version>
<version tools_min_version="2.3.0" flow_version="1.0,2.0" prov_capabilities_per_version="bsp_gen2">
<num>Latest 1.X release</num>
<commit>latest-v1.X</commit>
</version>
<version tools_min_version="2.3.0" flow_version="1.0,2.0" prov_capabilities_per_version="bsp_gen2">
<num>1.2.0 release</num>
<commit>release-v1.2.0</commit>
</version>
<version tools_min_version="2.3.0" flow_version="1.0,2.0" prov_capabilities_per_version="bsp_gen2">
<num>1.1.0 release</num>
<commit>release-v1.1.0</commit>
</version>
</versions>
</board>
<board default_location="local">
<id>PMG1-CY7111</id>
<category>PMG BSPs</category>
<board_uri>https://github.com/cypresssemiconductorco/TARGET_PMG1-CY7111</board_uri>
<chips>
<mcu>CYPM1111-40LQXIT</mcu>
</chips>
<name>PMG1-CY7111</name>
<summary>The CY7111 EZ-PD PMG1-S1 Prototyping Kit is a low cost prototyping platform which enables design and development of EZ-PD PMG1-S1 (CYPM1111-40LQXIT) based embedded applications with USB PD Sink capability.</summary>
<prov_capabilities>cat2 flash_128k hal i2c j2 led mcu_gp pmg1 pmg1_cy7111 spi sram_12k switch uart usbpd</prov_capabilities>
<description> <div class="category">Kit Features:</div> <ul> <li>USB PD 3.0 compliant Sink which can support up to 100W (20V, 5A) of power consumption.</li> <li>USB bus powered operation.</li> <li>KitProg3 based programming and debug interface.</li> <li>Access to the pins of PMG1-S1 silicon (CYPM1111-40LQXIT) in hardware and support for BSP, HAL, PDL and Middleware in Modus Toolbox.</li> </ul> <div class="category">Kit Contents:</div> <ul> <li>EZ-PD CYPM1111-40LQXIT based board</li> <li>Quick Start Guide</li> </ul></description>
<documentation_url>http://www.cypress.com/CY7111</documentation_url>
<versions>
<version tools_min_version="3.0.0" flow_version="2.0" prov_capabilities_per_version="bsp_gen4 low_power">
<num>Latest 3.X release</num>
<commit>latest-v3.X</commit>
</version>
<version tools_min_version="3.0.0" flow_version="2.0" prov_capabilities_per_version="bsp_gen4 low_power">
<num>3.1.0 release</num>
<commit>release-v3.1.0</commit>
</version>
<version tools_min_version="3.0.0" flow_version="2.0" prov_capabilities_per_version="bsp_gen4">
<num>3.0.0 release</num>
<commit>release-v3.0.0</commit>
</version>
<version tools_min_version="2.4.0" flow_version="1.0,2.0" prov_capabilities_per_version="bsp_gen3">
<num>Latest 2.X release</num>
<commit>latest-v2.X</commit>
</version>
<version tools_min_version="2.4.0" flow_version="1.0,2.0" prov_capabilities_per_version="bsp_gen3">
<num>2.0.0 release</num>
<commit>release-v2.0.0</commit>
</version>
<version tools_min_version="2.3.0" flow_version="1.0,2.0" prov_capabilities_per_version="bsp_gen2">
<num>Latest 1.X release</num>
<commit>latest-v1.X</commit>
</version>
<version tools_min_version="2.3.0" flow_version="1.0,2.0" prov_capabilities_per_version="bsp_gen2">
<num>1.2.0 release</num>
<commit>release-v1.2.0</commit>
</version>
<version tools_min_version="2.3.0" flow_version="1.0,2.0" prov_capabilities_per_version="bsp_gen2">
<num>1.1.0 release</num>
<commit>release-v1.1.0</commit>
</version>
</versions>
</board>
<board default_location="local">
<id>PMG1-CY7112</id>
<category>PMG BSPs</category>
<board_uri>https://github.com/cypresssemiconductorco/TARGET_PMG1-CY7112</board_uri>
<chips>
<mcu>CYPM1211-40LQXIT</mcu>
</chips>
<name>PMG1-CY7112</name>
<summary>The CY7112 EZ-PD PMG1-S2 Prototyping Kit is a low cost prototyping platform which enables design and development of EZ-PD PMG1-S2 (CYPM1211-40LQXIT) based embedded applications with USB PD Sink capability.</summary>
<prov_capabilities>cat2 flash_128k hal i2c j2 led mcu_gp pmg1 pmg1_cy7112 spi sram_8k switch uart usb_device usbpd</prov_capabilities>
<description> <div class="category">Kit Features:</div> <ul> <li>USB PD 3.0 compliant Sink which can support up to 100W (20V, 5A) of power consumption.</li> <li>USB bus powered operation.</li> <li>KitProg3 based programming and debug interface.</li> <li>Access to the pins of PMG1-S2 silicon (CYPM1211-40LQXIT) in hardware and support for BSP, HAL, PDL and Middleware in Modus Toolbox.</li> </ul> <div class="category">Kit Contents:</div> <ul> <li>EZ-PD CYPM1211-40LQXIT based board</li> <li>Quick Start Guide</li> </ul></description>
<documentation_url>http://www.cypress.com/CY7112</documentation_url>
<versions>
<version tools_min_version="3.0.0" flow_version="2.0" prov_capabilities_per_version="bsp_gen4 low_power">
<num>Latest 3.X release</num>
<commit>latest-v3.X</commit>
</version>
<version tools_min_version="3.0.0" flow_version="2.0" prov_capabilities_per_version="bsp_gen4 low_power">
<num>3.1.0 release</num>
<commit>release-v3.1.0</commit>
</version>
<version tools_min_version="3.0.0" flow_version="2.0" prov_capabilities_per_version="bsp_gen4">
<num>3.0.0 release</num>
<commit>release-v3.0.0</commit>
</version>
<version tools_min_version="2.4.0" flow_version="1.0,2.0" prov_capabilities_per_version="bsp_gen3">
<num>Latest 2.X release</num>
<commit>latest-v2.X</commit>
</version>
<version tools_min_version="2.4.0" flow_version="1.0,2.0" prov_capabilities_per_version="bsp_gen3">
<num>2.0.0 release</num>
<commit>release-v2.0.0</commit>
</version>
<version tools_min_version="2.3.0" flow_version="1.0,2.0" prov_capabilities_per_version="bsp_gen2">
<num>Latest 1.X release</num>
<commit>latest-v1.X</commit>
</version>
<version tools_min_version="2.3.0" flow_version="1.0,2.0" prov_capabilities_per_version="bsp_gen2">
<num>1.2.0 release</num>
<commit>release-v1.2.0</commit>
</version>
<version tools_min_version="2.3.0" flow_version="1.0,2.0" prov_capabilities_per_version="bsp_gen2">
<num>1.1.0 release</num>
<commit>release-v1.1.0</commit>
</version>
</versions>
</board>
<board default_location="local">
<id>PMG1-CY7113</id>
<category>PMG BSPs</category>
<board_uri>https://github.com/cypresssemiconductorco/TARGET_PMG1-CY7113</board_uri>
<chips>
<mcu>CYPM1311-48LQXI</mcu>
</chips>
<name>PMG1-CY7113</name>
<summary>The CY7113 EZ-PD PMG1-S3 Prototyping Kit is a development platform to design products which can be powered from a high-voltage USB PD port, and also need a microcontroller with CAPSENSE™ capability to implement different applications.</summary>
<prov_capabilities>adc capsense capsense_button capsense_linear_slider cat2 comp csd flash_256k hal i2c j2 led mcu_gp opamp pmg1 pmg1_cy7113 spi sram_32k switch uart usb_device usbpd</prov_capabilities>
<description> <div class="category">Kit Features:</div> <ul> <li>USB PD 3.0 compliant Sink which can support up to 100W (20V, 5A) of power consumption.</li> <li>Support for two self-capacitance based CAPSENSE&#8482; buttons and one 5-segment slider.</li> <li>USB bus powered operation.</li> <li>KitProg3 based programming and debug interface.</li> <li>Access to the pins of PMG1-S3 silicon (CYPM1311-48LQXI) in hardware and support for BSP, HAL, PDL and Middleware in Modus Toolbox.</li> </ul> <div class="category">Kit Contents:</div> <ul> <li>EZ-PD CYPM1311-48LQXI based board</li> <li>Quick Start Guide</li> </ul></description>
<documentation_url>http://www.cypress.com/CY7113</documentation_url>
<versions>
<version tools_min_version="3.0.0" flow_version="2.0" prov_capabilities_per_version="bsp_gen4 low_power">
<num>Latest 3.X release</num>
<commit>latest-v3.X</commit>
</version>
<version tools_min_version="3.0.0" flow_version="2.0" prov_capabilities_per_version="bsp_gen4 low_power">
<num>3.1.0 release</num>
<commit>release-v3.1.0</commit>
</version>
<version tools_min_version="3.0.0" flow_version="2.0" prov_capabilities_per_version="bsp_gen4">
<num>3.0.0 release</num>
<commit>release-v3.0.0</commit>
</version>
<version tools_min_version="2.4.0" flow_version="1.0,2.0" prov_capabilities_per_version="bsp_gen3">
<num>Latest 2.X release</num>
<commit>latest-v2.X</commit>
</version>
<version tools_min_version="2.4.0" flow_version="1.0,2.0" prov_capabilities_per_version="bsp_gen3">
<num>2.0.0 release</num>
<commit>release-v2.0.0</commit>
</version>
<version tools_min_version="2.3.0" flow_version="1.0,2.0" prov_capabilities_per_version="bsp_gen2">
<num>Latest 1.X release</num>
<commit>latest-v1.X</commit>
</version>
<version tools_min_version="2.3.0" flow_version="1.0,2.0" prov_capabilities_per_version="bsp_gen2">
<num>1.2.0 release</num>
<commit>release-v1.2.0</commit>
</version>
</versions>
</board>
<board default_location="local">
<id>PMG1S3DUAL</id>
<category>PMG BSPs</category>
<board_uri>https://github.com/Infineon/TARGET_PMG1S3DUAL</board_uri>
<chips>
<mcu>CYPM1322-97BZXIT</mcu>
</chips>
<name>PMG1S3DUAL</name>
<summary>The PMG1S3DUAL BSP enables you to design and develop embedded USB-C Power Delivery (PD) applications for the PMG1-S3 device (CYPM1322-97BZXIT). The application note **AN235644 - USB PD DRP (dual-role power) schematics using EZ-PD™ PMG1 MCUs** provides a detailed information to design products which can provide/consume a high voltage power to/from USB PD port.</summary>
<prov_capabilities>adc bsp_gen4 cat2 comp csd dma flash_256k i2c led lptimer mcu_gp opamp pmg1 pmg1s3dual spi sram_32k uart usb_device usbpd</prov_capabilities>
<description> <div class="category">Key Features:</div> <ul> <li>USB PD 3.1 compliant DRP on both the ports.</li> <li>EPR (Extended Power Range) which can support up to 140W (28V, 5A) power on both ports.</li> <li>USB Type-C alternate mode support.</li> <li>USB bus powered operation.</li> <li>SWD based programming and debug interface.</li> </ul></description>
<documentation_url>https://www.infineon.com/dgdl/Infineon-USB_PD_DRP_dual-role_power_schematics_using_EZ-PD_PMG1_MCUs-ApplicationNotes-v02_00-EN.pdf?fileId=8ac78c8c83cd30810183ea6518841d1e</documentation_url>
<versions>
<version tools_min_version="3.0.0" flow_version="2.0" prov_capabilities_per_version="capsense hal low_power">
<num>Latest 3.X release</num>
<commit>latest-v3.X</commit>
</version>
<version tools_min_version="3.0.0" flow_version="2.0" prov_capabilities_per_version="capsense hal low_power">
<num>3.1.0 release</num>
<commit>release-v3.1.0</commit>
</version>
<version tools_min_version="3.0.0" flow_version="2.0" prov_capabilities_per_version="">
<num>3.0.0 release</num>
<commit>release-v3.0.0</commit>
</version>
</versions>
</board>
<board default_location="local">
<id>PSOC4-GENERIC</id>
<category>PSoC™ 4 BSPs</category>
<board_uri>https://github.com/cypresssemiconductorco/TARGET_PSOC4-GENERIC</board_uri>
<chips>
<mcu>CY8C4548AZI-S485</mcu>
</chips>
<name>PSOC4-GENERIC</name>
<summary>This board support package is intended for creating custom PSoC™ 4 BSPs.</summary>
<prov_capabilities>cat2 hal mcu_gp psoc4</prov_capabilities>
<description> <div class="category">Kit Features:</div><ul> <li>This is a generic template, there is no corresponding physical board and hence no board-specific macros. The user is expected to create a custom BSP with various pin/hardware details - Refer to KBA230822. Code examples using kit/board resources will not be shown for this BSP until the manifest data for the BSP is updated to include additional capabilities. Refer to ModusToolbox&#8482; user guide for creating custom manifests.</li> <li>This is manifest can also be used to allow the board to show up in the ModusToolbox&#8482; tools</li> </ul><p/> <div class="category">Kit Contents:</div><ul> <li>NA</li> </ul></description>
<documentation_url>https://github.com/Infineon/TARGET_PSOC4-GENERIC</documentation_url>
<versions>
<version tools_min_version="3.0.0" flow_version="2.0" prov_capabilities_per_version="bsp_gen4 psoc4_generic">
<num>Latest 3.X release</num>
<commit>latest-v3.X</commit>
</version>
<version tools_min_version="3.0.0" flow_version="2.0" prov_capabilities_per_version="bsp_gen4 psoc4_generic">
<num>3.1.0 release</num>
<commit>release-v3.1.0</commit>
</version>
<version tools_min_version="3.0.0" flow_version="2.0" prov_capabilities_per_version="bsp_gen4">
<num>3.0.0 release</num>
<commit>release-v3.0.0</commit>
</version>
<version tools_min_version="2.4.0" flow_version="1.0,2.0" prov_capabilities_per_version="bsp_gen3">
<num>Latest 2.X release</num>
<commit>latest-v2.X</commit>
</version>
<version tools_min_version="2.4.0" flow_version="1.0,2.0" prov_capabilities_per_version="bsp_gen3">
<num>2.0.0 release</num>
<commit>release-v2.0.0</commit>
</version>
<version tools_min_version="2.2.0" flow_version="1.0,2.0" prov_capabilities_per_version="bsp_gen2">
<num>Latest 1.X release</num>
<commit>latest-v1.X</commit>
</version>
<version tools_min_version="2.2.0" flow_version="1.0,2.0" prov_capabilities_per_version="bsp_gen2">
<num>1.2.0 release</num>
<commit>release-v1.2.0</commit>
</version>
<version tools_min_version="2.2.0" flow_version="1.0,2.0" prov_capabilities_per_version="bsp_gen2">
<num>1.1.0 release</num>
<commit>release-v1.1.0</commit>
</version>
<version tools_min_version="2.2.0" flow_version="1.0,2.0" prov_capabilities_per_version="bsp_gen2">
<num>1.0.0 release</num>
<commit>release-v1.0.0</commit>
</version>
</versions>
</board>
<board default_location="local">
<id>CY8CEVAL-062S2</id>
<category>PSoC™ 6 BSPs</category>
<board_uri>https://github.com/Infineon/TARGET_CY8CEVAL-062S2</board_uri>
<chips>
<mcu>CY8C624ABZI-S2D44</mcu>
</chips>
<name>CY8CEVAL-062S2</name>
<summary><![CDATA[
The CY8CEVAL-062S2 PSoC™ 62S2 Evaluation Kit enables you to evaluate and develop applications using PSoC™ 62 MCU. The PSoC™ 62S2 evaluation kit features an M.2 interface that enables you to connect the supported M.2 radio cards based on AIROC™ Wi-Fi/Bluetooth® combo devices. It comes with industry-leading CAPSENSE™ for touch buttons and slider, on-board debugger/programmer with KitProg3, microSD card interface, 512-Mb Quad-SPI NOR flash, PDM-PCM microphone interface, mikroBUS add-on board interface for peripheral expansion, OPTIGA Trust M device.
<p><b>Note:</b></p>
<p>This BSP does not support Wi-Fi/BT Connectivity examples. To run Wi-Fi/Bluetooth® Connectivity examples on this kit, choose a BSP with the appropriate connectivity M.2 module.</p>
]]></summary>
<prov_capabilities>adc arduino capsense capsense_button capsense_linear_slider cat1 cat1a comp csd cy8ceval_062s2 dma flash_2048k fram hal i2c i2s j2 led low_power lptimer mcu_gp memory memory_qspi multi_core nor_flash optiga_trust_m pdm psoc6 qspi rgb_led rtc sdhc smart_io spi sram_1024k std_crypto switch uart usb_device usb_host</prov_capabilities>
<description> <div class="category">Kit Features:</div> <ul> <li>Support of up to 2MB Flash and 1MB SRAM</li> <li>Dedicated M.2 interface to connect with M.2 radio modules based on AIROC&#8482; Wi-Fi/Bluetooth&#174; combo devices.</li> <li>mikroBUS add-on board interface for peripheral expansion.</li> <li>Delivers dual-cores, with a 150-MHz Arm&#174; Cortex&#174;-M4 as the primary application processor and a 100-MHz Arm&#174; Cortex&#174;-M0+ as the secondary processor for low-power operations.</li> <li>Supports Full-Speed USB, capacitive-sensing with CAPSENSE&#8482;, a PDM-PCM digital microphone interface, a Quad- SPI interface, 13 serial communication blocks, 7 programmable analog blocks, and 56 programmable digital blocks.</li> </ul><p/> <div class="category">Kit Contents:</div> <ul> <li>PSoC&#8482; 62S2 Evaluation Board</li> <li>Laird Connectivity Sterling-LWB5+ Wi-Fi/Bluetooth&#174; M.2 radio module</li> <li>USB Type-A to Micro-B cable</li> <li>Four jumper wires (4 inches each)</li> <li>Two jumper wires (5 inches each)</li> <li>Quick start guide</li> </ul></description>
<documentation_url>https://www.infineon.com/CY8CEVAL-062S2</documentation_url>
<versions>
<version tools_min_version="3.0.0" flow_version="2.0" prov_capabilities_per_version="bsp_gen4">
<num>Latest 4.X release</num>
<commit>latest-v4.X</commit>
</version>
<version tools_min_version="3.0.0" flow_version="2.0" prov_capabilities_per_version="bsp_gen4">
<num>4.3.0 release</num>
<commit>release-v4.3.0</commit>
</version>
<version tools_min_version="3.0.0" flow_version="2.0" prov_capabilities_per_version="bsp_gen4">
<num>4.2.0 release</num>
<commit>release-v4.2.0</commit>
</version>
<version tools_min_version="3.0.0" flow_version="2.0" prov_capabilities_per_version="bsp_gen4">
<num>4.1.0 release</num>
<commit>release-v4.1.0</commit>
</version>
<version tools_min_version="3.0.0" flow_version="2.0" prov_capabilities_per_version="bsp_gen4">
<num>4.0.0 release</num>
<commit>release-v4.0.0</commit>
</version>
<version tools_min_version="2.4.0" flow_version="1.0,2.0" prov_capabilities_per_version="bsp_gen3">
<num>Latest 3.X release</num>
<commit>latest-v3.X</commit>
</version>
<version tools_min_version="2.4.0" flow_version="1.0,2.0" prov_capabilities_per_version="bsp_gen3">
<num>3.1.0 release</num>
<commit>release-v3.1.0</commit>
</version>
<version tools_min_version="2.4.0" flow_version="1.0,2.0" prov_capabilities_per_version="bsp_gen3">
<num>3.0.0 release</num>
<commit>release-v3.0.0</commit>
</version>
<version tools_min_version="2.2.0" flow_version="1.0,2.0" prov_capabilities_per_version="bsp_gen2">
<num>Latest 2.X release</num>
<commit>latest-v2.X</commit>
</version>
<version tools_min_version="2.2.0" flow_version="1.0,2.0" prov_capabilities_per_version="bsp_gen2">
<num>2.3.0 release</num>
<commit>release-v2.3.0</commit>
</version>
</versions>
</board>
<board default_location="local">
<id>CY8CEVAL-062S2-LAI-4373M2</id>
<category>PSoC™ 6 BSPs</category>
<board_uri>https://github.com/Infineon/TARGET_CY8CEVAL-062S2-LAI-4373M2</board_uri>
<chips>
<mcu>CY8C624ABZI-S2D44</mcu>
<radio>Sterling-LWB5+ (CYW4373EUBGT)</radio>
</chips>
<name>CY8CEVAL-062S2-LAI-4373M2</name>
<summary><![CDATA[
The CY8CEVAL-062S2 PSoC™ 62S2 Evaluation Kit enables you to evaluate and develop applications using PSoC™ 62 MCU. The PSoC™ 62S2 evaluation kit features an M.2 interface that enables you to connect the supported M.2 radio cards based on AIROC™ Wi-Fi/Bluetooth® combo devices. It comes with industry-leading CAPSENSE™ for touch buttons and slider, on-board debugger/programmer with KitProg3, microSD card interface, 512-Mb Quad-SPI NOR flash, PDM-PCM microphone interface, mikroBUS add-on board interface for peripheral expansion, OPTIGA Trust M device.
<p><b>Note:</b></p>
<p>CY8CEVAL-062S2-LAI-4373M2 is the board support package for the PSoC™ 62S2 Evaluation Kit in combination with the Sterling-LWB5+ M.2 radio module and supports PSoC™ 6 MCU examples and Wi-Fi/Bluetooth® connectivity examples.</p>
]]></summary>
<prov_capabilities>adc anycloud arduino bt capsense capsense_button capsense_linear_slider cat1 cat1a comp csd cy8ceval_062_s2_lai_4373m2 cyw43xxx dma flash_2048k fram hal i2c i2s j2 led low_power lptimer mcu_gp memory memory_qspi multi_core nor_flash optiga_trust_m pdm pot psoc6 qspi rgb_led rtc sdhc smart_io spi sram_1024k std_crypto switch uart usb_device usb_host wifi</prov_capabilities>
<description> <div class="category">Kit Features:</div> <ul> <li>Support of up to 2MB Flash and 1MB SRAM</li> <li>Dedicated M.2 interface to connect with M.2 radio modules based on AIROC&#8482; Wi-Fi/Bluetooth&#174; combo devices.</li> <li>mikroBUS add-on board interface for peripheral expansion.</li> <li>Delivers dual-cores, with a 150-MHz Arm&#174; Cortex&#174;-M4 as the primary application processor and a 100-MHz Arm&#174; Cortex&#174;-M0+ as the secondary processor for low-power operations.</li> <li>Supports Full-Speed USB, capacitive-sensing with CAPSENSE&#8482;, a PDM-PCM digital microphone interface, a Quad- SPI interface, 13 serial communication blocks, 7 programmable analog blocks, and 56 programmable digital blocks.</li> </ul><p/> <div class="category">Kit Contents:</div> <ul> <li>PSoC&#8482; 62S2 Evaluation Board</li> <li>Laird Connectivity Sterling-LWB5+ Wi-Fi/Bluetooth&#174; M.2 radio module</li> <li>USB Type-A to Micro-B cable</li> <li>Four jumper wires (4 inches each)</li> <li>Two jumper wires (5 inches each)</li> <li>Quick start guide</li> </ul></description>
<documentation_url>https://www.infineon.com/CY8CEVAL-062S2</documentation_url>
<versions>
<version tools_min_version="3.0.0" flow_version="2.0" prov_capabilities_per_version="bsp_gen4 cy8ceval_062s2_lai_4373m2 cyw4373e">
<num>Latest 4.X release</num>
<commit>latest-v4.X</commit>
</version>
<version tools_min_version="3.0.0" flow_version="2.0" prov_capabilities_per_version="bsp_gen4 cy8ceval_062s2_lai_4373m2 cyw4373e">
<num>4.3.0 release</num>
<commit>release-v4.3.0</commit>
</version>
<version tools_min_version="3.0.0" flow_version="2.0" prov_capabilities_per_version="bsp_gen4 cy8ceval_062s2_lai_4373m2 cyw4373e">
<num>4.2.0 release</num>
<commit>release-v4.2.0</commit>
</version>
<version tools_min_version="3.0.0" flow_version="2.0" prov_capabilities_per_version="bsp_gen4 cy8ceval_062s2_lai_4373m2">
<num>4.1.0 release</num>
<commit>release-v4.1.0</commit>
</version>
<version tools_min_version="3.0.0" flow_version="2.0" prov_capabilities_per_version="bsp_gen4 cy8ceval_062s2_lai_4373m2">
<num>4.0.0 release</num>
<commit>release-v4.0.0</commit>
</version>
<version tools_min_version="2.4.0" flow_version="1.0,2.0" prov_capabilities_per_version="bsp_gen3">
<num>Latest 3.X release</num>
<commit>latest-v3.X</commit>
</version>
<version tools_min_version="2.4.0" flow_version="1.0,2.0" prov_capabilities_per_version="bsp_gen3">
<num>3.1.0 release</num>
<commit>release-v3.1.0</commit>
</version>
<version tools_min_version="2.4.0" flow_version="1.0,2.0" prov_capabilities_per_version="bsp_gen3">
<num>3.0.0 release</num>
<commit>release-v3.0.0</commit>
</version>
<version tools_min_version="2.2.0" flow_version="1.0,2.0" prov_capabilities_per_version="bsp_gen2">
<num>Latest 2.X release</num>
<commit>latest-v2.X</commit>
</version>
<version tools_min_version="2.2.0" flow_version="1.0,2.0" prov_capabilities_per_version="bsp_gen2">
<num>2.3.0 release</num>
<commit>release-v2.3.0</commit>
</version>
</versions>
</board>
<board default_location="local">
<id>CY8CEVAL-062S2-MUR-4373M2</id>
<category>PSoC™ 6 BSPs</category>
<board_uri>https://github.com/Infineon/TARGET_CY8CEVAL-062S2-MUR-4373M2</board_uri>
<chips>
<mcu>CY8C624ABZI-S2D44</mcu>
<radio>LBEE5PK2BC (CYW4373IUBGT)</radio>
</chips>
<name>CY8CEVAL-062S2-MUR-4373M2</name>
<summary> The CY8CEVAL-062S2 PSoC&#8482; 62S2 Evaluation Kit enables you to evaluate and develop applications using PSoC&#8482; 62 MCU. The PSoC&#8482; 62S2 evaluation kit features an M.2 interface that enables you to connect the supported M.2 radio cards based on AIROC&#8482; Wi-Fi/Bluetooth&#174; combo devices. It comes with industry-leading CAPSENSE&#8482; for touch buttons and slider, on-board debugger/programmer with KitProg3, microSD card interface, 512-Mb Quad-SPI NOR flash, PDM-PCM microphone interface, mikroBUS add-on board interface for peripheral expansion, OPTIGA Trust M device. <p><b>Note:</b></p> <p>CY8CEVAL-062S2-MUR-4373M2 is the board support package for the PSoC&#8482; 62S2 Evaluation Kit in combination with the 2BC radio module and supports PSoC&#8482; 6 MCU examples and Wi-Fi/Bluetooth® connectivity examples.</p></summary>
<prov_capabilities>adc anycloud arduino bsp_gen4 bt capsense capsense_button capsense_linear_slider cat1 cat1a comp csd cy8ceval_062s2_mur_4373m2 cyw4373 cyw43xxx dma flash_2048k fram hal i2c i2s j2 led low_power lptimer mcu_gp memory memory_qspi multi_core nor_flash optiga_trust_m pdm pot psoc6 qspi rgb_led rtc sdhc smart_io spi sram_1024k std_crypto switch uart usb_device usb_host wifi</prov_capabilities>
<description> <div class="category">Kit Features:</div> <ul> <li>Support of up to 2MB Flash and 1MB SRAM</li> <li>Dedicated M.2 interface to connect with M.2 radio modules based on AIROC&#8482; Wi-Fi/Bluetooth&#174; combo devices.</li> <li>mikroBUS add-on board interface for peripheral expansion.</li> <li>Delivers dual-cores, with a 150-MHz Arm&#174; Cortex&#174;-M4 as the primary application processor and a 100-MHz Arm&#174; Cortex&#174;-M0+ as the secondary processor for low-power operations.</li> <li>Supports Full-Speed USB, capacitive-sensing with CAPSENSE&#8482;, a PDM-PCM digital microphone interface, a Quad- SPI interface, 13 serial communication blocks, 7 programmable analog blocks, and 56 programmable digital blocks.</li> </ul><p/> <div class="category">Kit Contents:</div> <ul> <li>PSoC&#8482; 62S2 Evaluation Board</li> <li>Embedded Artists 2BC Wi-Fi/Bluetooth&#174; M.2 radio module</li> <li>USB Type-A to Micro-B cable</li> <li>Four jumper wires (4 inches each)</li> <li>Two jumper wires (5 inches each)</li> <li>Quick start guide</li> </ul></description>
<documentation_url>https://www.infineon.com/CY8CEVAL-062S2</documentation_url>
<versions>
<version tools_min_version="3.0.0" flow_version="2.0" prov_capabilities_per_version="">
<num>Latest 4.X release</num>
<commit>latest-v4.X</commit>
</version>
<version tools_min_version="3.0.0" flow_version="2.0" prov_capabilities_per_version="">
<num>4.3.0 release</num>
<commit>release-v4.3.0</commit>
</version>
<version tools_min_version="3.0.0" flow_version="2.0" prov_capabilities_per_version="">
<num>4.2.0 release</num>
<commit>release-v4.2.0</commit>
</version>
</versions>
</board>
<board default_location="local">
<id>CY8CEVAL-062S2-MUR-4373EM2</id>
<category>PSoC™ 6 BSPs</category>
<board_uri>https://github.com/Infineon/TARGET_CY8CEVAL-062S2-MUR-4373EM2</board_uri>
<chips>
<mcu>CY8C624ABZI-S2D44</mcu>
<radio>LBEE5PK2AE (CYW4373EUBGT)</radio>
</chips>
<name>CY8CEVAL-062S2-MUR-4373EM2</name>
<summary> The CY8CEVAL-062S2 PSoC&#8482; 62S2 Evaluation Kit enables you to evaluate and develop applications using PSoC&#8482; 62 MCU. The PSoC&#8482; 62S2 evaluation kit features an M.2 interface that enables you to connect the supported M.2 radio cards based on AIROC&#8482; Wi-Fi/Bluetooth&#174; combo devices. It comes with industry-leading CAPSENSE&#8482; for touch buttons and slider, on-board debugger/programmer with KitProg3, microSD card interface, 512-Mb Quad-SPI NOR flash, PDM-PCM microphone interface, mikroBUS add-on board interface for peripheral expansion, OPTIGA Trust M device. <p><b>Note:</b></p> <p>CY8CEVAL-062S2-MUR-4373EM2 is the board support package for the PSoC&#8482; 62S2 Evaluation Kit in combination with the 2AE radio module and supports PSoC&#8482; 6 MCU examples and Wi-Fi/Bluetooth® connectivity examples.</p></summary>
<prov_capabilities>adc anycloud arduino bsp_gen4 bt capsense capsense_button capsense_linear_slider cat1 cat1a comp csd cy8ceval_062s2_mur_4373em2 cyw43xxx dma flash_2048k fram hal i2c i2s j2 led low_power lptimer mcu_gp memory memory_qspi multi_core nor_flash optiga_trust_m pdm pot psoc6 qspi rgb_led rtc sdhc smart_io spi sram_1024k std_crypto switch uart usb_device usb_host wifi</prov_capabilities>
<description> <div class="category">Kit Features:</div> <ul> <li>Support of up to 2MB Flash and 1MB SRAM</li> <li>Dedicated M.2 interface to connect with M.2 radio modules based on AIROC&#8482; Wi-Fi/Bluetooth&#174; combo devices.</li> <li>mikroBUS add-on board interface for peripheral expansion.</li> <li>Delivers dual-cores, with a 150-MHz Arm&#174; Cortex&#174;-M4 as the primary application processor and a 100-MHz Arm&#174; Cortex&#174;-M0+ as the secondary processor for low-power operations.</li> <li>Supports Full-Speed USB, capacitive-sensing with CAPSENSE&#8482;, a PDM-PCM digital microphone interface, a Quad- SPI interface, 13 serial communication blocks, 7 programmable analog blocks, and 56 programmable digital blocks.</li> </ul><p/> <div class="category">Kit Contents:</div> <ul> <li>PSoC&#8482; 62S2 Evaluation Board</li> <li>Embedded Artists 2AE Wi-Fi/Bluetooth&#174; M.2 radio module</li> <li>USB Type-A to Micro-B cable</li> <li>Four jumper wires (4 inches each)</li> <li>Two jumper wires (5 inches each)</li> <li>Quick start guide</li> </ul></description>
<documentation_url>https://www.infineon.com/CY8CEVAL-062S2</documentation_url>
<versions>
<version tools_min_version="3.0.0" flow_version="2.0" prov_capabilities_per_version="cyw4373e">
<num>Latest 4.X release</num>
<commit>latest-v4.X</commit>
</version>
<version tools_min_version="3.0.0" flow_version="2.0" prov_capabilities_per_version="cyw4373e">
<num>4.3.0 release</num>
<commit>release-v4.3.0</commit>
</version>
<version tools_min_version="3.0.0" flow_version="2.0" prov_capabilities_per_version="cyw4373e">
<num>4.2.0 release</num>
<commit>release-v4.2.0</commit>
</version>
<version tools_min_version="3.0.0" flow_version="2.0" prov_capabilities_per_version="">
<num>4.1.0 release</num>
<commit>release-v4.1.0</commit>
</version>
</versions>
</board>
<board default_location="local">
<id>CY8CEVAL-062S2-CYW43022CUB</id>
<category>PSoC™ 6 BSPs</category>
<board_uri>https://github.com/Infineon/TARGET_CY8CEVAL-062S2-CYW43022CUB</board_uri>
<chips>
<mcu>CY8C624ABZI-S2D44</mcu>
<radio>CYW43022CUB</radio>
</chips>
<name>CY8CEVAL-062S2-CYW43022CUB</name>
<summary> The CY8CEVAL-062S2 PSoC&#8482; 62S2 Evaluation Kit enables you to evaluate and develop applications using PSoC&#8482; 62 MCU. The PSoC&#8482; 62S2 evaluation kit features an M.2 interface that enables you to connect the supported M.2 radio cards based on AIROC&#8482; Wi-Fi/Bluetooth&#174; combo devices. It comes with industry-leading CAPSENSE&#8482; for touch buttons and slider, on-board debugger/programmer with KitProg3, microSD card interface, 512-Mb Quad-SPI NOR flash, PDM-PCM microphone interface, mikroBUS add-on board interface for peripheral expansion, OPTIGA Trust M device. <p><b>Note:</b></p> <p>CY8CEVAL-062S2-CYW43022CUB is the board support package for the PSoC&#8482; 62S2 Evaluation Kit in combination with the CYW943022SDM2WLIPA radio module and supports PSoC&#8482; 6 MCU examples and Wi-Fi/Bluetooth® connectivity examples.</p></summary>
<prov_capabilities>adc anycloud arduino bsp_gen4 bt capsense capsense_button capsense_linear_slider cat1 cat1a comp csd cy8ceval_062_mur_cyw43022cub cy8ceval_062s2_cyw43022cub cyw43022 cyw43xxx dma flash_2048k fram hal i2c i2s j2 led low_power lptimer mcu_gp memory memory_qspi multi_core nor_flash optiga_trust_m pdm pot psoc6 qspi rgb_led rtc sdhc smart_io spi sram_1024k std_crypto switch uart usb_device usb_host wifi</prov_capabilities>
<description> <div class="category">Kit Features:</div> <ul> <li>Support of up to 2MB Flash and 1MB SRAM</li> <li>Dedicated M.2 interface to connect with M.2 radio modules based on AIROC&#8482; Wi-Fi/Bluetooth&#174; combo devices.</li> <li>mikroBUS add-on board interface for peripheral expansion.</li> <li>Delivers dual-cores, with a 150-MHz Arm&#174; Cortex&#174;-M4 as the primary application processor and a 100-MHz Arm&#174; Cortex&#174;-M0+ as the secondary processor for low-power operations.</li> <li>Supports Full-Speed USB, capacitive-sensing with CAPSENSE&#8482;, a PDM-PCM digital microphone interface, a Quad- SPI interface, 13 serial communication blocks, 7 programmable analog blocks, and 56 programmable digital blocks.</li> </ul><p/> <div class="category">Kit Contents:</div> <ul> <li>PSoC&#8482; 62S2 Evaluation Board</li> <li>Infineon's AIROC&#8482; CYW943022SDM2WLIPA Wi-Fi/Bluetooth&#174; M.2 radio module</li> <li>USB Type-A to Micro-B cable</li> <li>Four jumper wires (4 inches each)</li> <li>Two jumper wires (5 inches each)</li> <li>Quick start guide</li> </ul></description>
<documentation_url>https://www.infineon.com/CY8CEVAL-062S2</documentation_url>
<versions>
<version tools_min_version="3.0.0" flow_version="2.0" prov_capabilities_per_version="">
<num>Latest 4.X release</num>
<commit>latest-v4.X</commit>
</version>
<version tools_min_version="3.0.0" flow_version="2.0" prov_capabilities_per_version="">
<num>4.2.0 release</num>
<commit>release-v4.2.0</commit>
</version>
</versions>
</board>
<board default_location="local">
<id>CY8CEVAL-062S2-LAI-43439M2</id>
<category>PSoC™ 6 BSPs</category>
<board_uri>https://github.com/Infineon/TARGET_CY8CEVAL-062S2-LAI-43439M2</board_uri>
<chips>
<mcu>CY8C624ABZI-S2D44</mcu>
<radio>Sterling-LWB+ (CYW43439KUBG)</radio>
</chips>
<name>CY8CEVAL-062S2-LAI-43439M2</name>
<summary> The CY8CEVAL-062S2 PSoC&#8482; 62S2 Evaluation Kit enables you to evaluate and develop applications using PSoC&#8482; 62 MCU. The PSoC&#8482; 62S2 evaluation kit features an M.2 interface that enables you to connect the supported M.2 radio cards based on AIROC&#8482; Wi-Fi/Bluetooth&#174; combo devices. It comes with industry-leading CAPSENSE&#8482; for touch buttons and slider, on-board debugger/programmer with KitProg3, microSD card interface, 512-Mb Quad-SPI NOR flash, PDM-PCM microphone interface, mikroBUS add-on board interface for peripheral expansion, OPTIGA Trust M device. <p><b>Note:</b></p> <p>CY8CEVAL-062S2-LAI-43439M2 is the board support package for the PSoC&#8482; 62S2 Evaluation Kit in combination with the LWB+ radio module and supports PSoC&#8482; 6 MCU examples and Wi-Fi/Bluetooth® connectivity examples.</p></summary>
<prov_capabilities>adc anycloud arduino bsp_gen4 bt capsense capsense_button capsense_linear_slider cat1 cat1a comp csd cy8ceval_062s2_lai_43439m2 cyw43439 cyw43xxx dma flash_2048k fram hal i2c i2s j2 led low_power lptimer mcu_gp memory memory_qspi multi_core nor_flash optiga_trust_m pdm pot psoc6 qspi rgb_led rtc sdhc smart_io spi sram_1024k std_crypto switch uart usb_device usb_host wifi</prov_capabilities>
<description> <div class="category">Kit Features:</div> <ul> <li>Support of up to 2MB Flash and 1MB SRAM</li> <li>Dedicated M.2 interface to connect with M.2 radio modules based on AIROC&#8482; Wi-Fi/Bluetooth&#174; combo devices.</li> <li>mikroBUS add-on board interface for peripheral expansion.</li> <li>Delivers dual-cores, with a 150-MHz Arm&#174; Cortex&#174;-M4 as the primary application processor and a 100-MHz Arm&#174; Cortex&#174;-M0+ as the secondary processor for low-power operations.</li> <li>Supports Full-Speed USB, capacitive-sensing with CAPSENSE&#8482;, a PDM-PCM digital microphone interface, a Quad- SPI interface, 13 serial communication blocks, 7 programmable analog blocks, and 56 programmable digital blocks.</li> </ul><p/> <div class="category">Kit Contents:</div> <ul> <li>PSoC&#8482; 62S2 Evaluation Board</li> <li>Laird&#8482;'s Sterling&#8482; LWB+ Wi-Fi 4 and Bluetooth&#174; 5.2 M.2 radio module</li> <li>USB Type-A to Micro-B cable</li> <li>Four jumper wires (4 inches each)</li> <li>Two jumper wires (5 inches each)</li> <li>Quick start guide</li> </ul></description>
<documentation_url>https://www.infineon.com/CY8CEVAL-062S2</documentation_url>
<versions>
<version tools_min_version="3.0.0" flow_version="2.0" prov_capabilities_per_version="">
<num>Latest 4.X release</num>
<commit>latest-v4.X</commit>
</version>
<version tools_min_version="3.0.0" flow_version="2.0" prov_capabilities_per_version="">
<num>4.3.0 release</num>
<commit>release-v4.3.0</commit>
</version>
<version tools_min_version="3.0.0" flow_version="2.0" prov_capabilities_per_version="">
<num>4.2.0 release</num>
<commit>release-v4.2.0</commit>
</version>
<version tools_min_version="3.0.0" flow_version="2.0" prov_capabilities_per_version="">
<num>4.1.0 release</num>
<commit>release-v4.1.0</commit>
</version>
</versions>
</board>
<board default_location="local">
<id>CY8CEVAL-062S2-MUR-43439M2</id>
<category>PSoC™ 6 BSPs</category>
<board_uri>https://github.com/Infineon/TARGET_CY8CEVAL-062S2-MUR-43439M2</board_uri>
<chips>
<mcu>CY8C624ABZI-S2D44</mcu>
<radio>LBEE5KL1YN (CYW43439KUBG)</radio>
</chips>
<name>CY8CEVAL-062S2-MUR-43439M2</name>
<summary><![CDATA[
The CY8CEVAL-062S2 PSoC™ 62S2 Evaluation Kit enables you to evaluate and develop applications using PSoC™ 62 MCU. The PSoC™ 62S2 evaluation kit features an M.2 interface that enables you to connect the supported M.2 radio cards based on AIROC™ Wi-Fi/Bluetooth® combo devices. It comes with industry-leading CAPSENSE™ for touch buttons and slider, on-board debugger/programmer with KitProg3, microSD card interface, 512-Mb Quad-SPI NOR flash, PDM-PCM microphone interface, mikroBUS add-on board interface for peripheral expansion, OPTIGA Trust M device.
<p><b>Note:</b></p>
<p>CY8CEVAL-062S2-MUR-43439M2 is the board support package for the PSoC™ 62S2 Evaluation Kit in combination with the 1YN radio module and supports PSoC™ 6 MCU examples and Wi-Fi/Bluetooth® connectivity examples.</p>
]]></summary>
<prov_capabilities>adc anycloud arduino bt capsense capsense_button capsense_linear_slider cat1 cat1a comp csd cy8ceval_062_mur_43439m2 cyw43439 cyw43xxx dma flash_2048k fram hal i2c i2s j2 led low_power lptimer mcu_gp memory memory_qspi multi_core nor_flash optiga_trust_m pdm pot psoc6 qspi rgb_led rtc sdhc smart_io spi sram_1024k std_crypto switch uart usb_device usb_host wifi</prov_capabilities>
<description> <div class="category">Kit Features:</div> <ul> <li>Support of up to 2MB Flash and 1MB SRAM</li> <li>Dedicated M.2 interface to connect with M.2 radio modules based on AIROC&#8482; Wi-Fi/Bluetooth&#174; combo devices.</li> <li>mikroBUS add-on board interface for peripheral expansion.</li> <li>Delivers dual-cores, with a 150-MHz Arm&#174; Cortex&#174;-M4 as the primary application processor and a 100-MHz Arm&#174; Cortex&#174;-M0+ as the secondary processor for low-power operations.</li> <li>Supports Full-Speed USB, capacitive-sensing with CAPSENSE&#8482;, a PDM-PCM digital microphone interface, a Quad- SPI interface, 13 serial communication blocks, 7 programmable analog blocks, and 56 programmable digital blocks.</li> </ul><p/> <div class="category">Kit Contents:</div> <ul> <li>PSoC&#8482; 62S2 Evaluation Board</li> <li>Embedded Artists 1YN Wi-Fi/Bluetooth&#174; M.2 radio module</li> <li>USB Type-A to Micro-B cable</li> <li>Four jumper wires (4 inches each)</li> <li>Two jumper wires (5 inches each)</li> <li>Quick start guide</li> </ul></description>
<documentation_url>https://www.infineon.com/CY8CEVAL-062S2</documentation_url>
<versions>
<version tools_min_version="3.0.0" flow_version="2.0" prov_capabilities_per_version="bsp_gen4 cy8ceval_062s2_mur_43439m2">
<num>Latest 4.X release</num>
<commit>latest-v4.X</commit>
</version>
<version tools_min_version="3.0.0" flow_version="2.0" prov_capabilities_per_version="bsp_gen4 cy8ceval_062s2_mur_43439m2">
<num>4.3.1 release</num>
<commit>release-v4.3.1</commit>
</version>
<version tools_min_version="3.0.0" flow_version="2.0" prov_capabilities_per_version="bsp_gen4 cy8ceval_062s2_mur_43439m2">
<num>4.3.0 release</num>
<commit>release-v4.3.0</commit>
</version>
<version tools_min_version="3.0.0" flow_version="2.0" prov_capabilities_per_version="bsp_gen4 cy8ceval_062s2_mur_43439m2">
<num>4.2.0 release</num>
<commit>release-v4.2.0</commit>
</version>
<version tools_min_version="3.0.0" flow_version="2.0" prov_capabilities_per_version="bsp_gen4 cy8ceval_062s2_mur_43439m2">
<num>4.1.0 release</num>
<commit>release-v4.1.0</commit>
</version>
<version tools_min_version="3.0.0" flow_version="2.0" prov_capabilities_per_version="bsp_gen4 cy8ceval_062s2_mur_43439m2">
<num>4.0.0 release</num>
<commit>release-v4.0.0</commit>
</version>
<version tools_min_version="2.4.0" flow_version="1.0,2.0" prov_capabilities_per_version="bsp_gen3">
<num>Latest 3.X release</num>
<commit>latest-v3.X</commit>
</version>
<version tools_min_version="2.4.0" flow_version="1.0,2.0" prov_capabilities_per_version="bsp_gen3">
<num>3.1.0 release</num>
<commit>release-v3.1.0</commit>
</version>
<version tools_min_version="2.4.0" flow_version="1.0,2.0" prov_capabilities_per_version="bsp_gen3">
<num>3.0.0 release</num>
<commit>release-v3.0.0</commit>
</version>
</versions>
</board>
<board default_location="local">
<id>CY8CKIT-062-BLE</id>
<category>PSoC™ 6 BSPs</category>
<board_uri>https://github.com/cypresssemiconductorco/TARGET_CY8CKIT-062-BLE</board_uri>
<chips>
<mcu>CY8C6347BZI-BLD53</mcu>
</chips>
<name>CY8CKIT-062-BLE</name>
<summary>The PSoC™ 6 Bluetooth® LE Pioneer Kit is a low-cost hardware platform that enables design and debug of the PSoC™ 63 Line (CY8C6347BZI-BLD53).</summary>
<prov_capabilities>adc arduino capsense capsense_button capsense_linear_slider cat1 cat1a comp csd cy8ckit_062_ble dac dma flash_1024k fram hal i2c i2s j2 led low_power lptimer mcu_gp memory memory_qspi multi_core nor_flash opamp pdm psoc6 qspi rgb_led rtc smart_io spi sram_288k std_crypto switch uart udb</prov_capabilities>
<description> <div class="category">Kit Features:</div><ul> <li>Bluetooth&#174; LE v5.0</li> <li>Serial memory interface</li> <li>PDM-PCM digital microphone interface</li> <li>Industry-leading CAPSENSE&#8482;lt;/li> </ul><p/> <div class="category">Kit Contents:</div><ul> <li>PSoC&#8482; 6 Bluetooth&#174; LE Pioneer board</li> <li>E-Ink display shield with an ultra-low-power 2.7" E-ink display, thermistor, 6-axis motion sensor, and digital microphone</li> <li>USB cable</li> </ul></description>
<documentation_url>https://www.infineon.com/CY8CKIT-062-BLE</documentation_url>
<versions>
<version tools_min_version="3.0.0" flow_version="2.0" prov_capabilities_per_version="bsp_gen4 bt">
<num>Latest 4.X release</num>
<commit>latest-v4.X</commit>
</version>
<version tools_min_version="3.0.0" flow_version="2.0" prov_capabilities_per_version="bsp_gen4 bt">
<num>4.2.0 release</num>
<commit>release-v4.2.0</commit>
</version>
<version tools_min_version="3.0.0" flow_version="2.0" prov_capabilities_per_version="bsp_gen4 bt">
<num>4.1.0 release</num>
<commit>release-v4.1.0</commit>
</version>
<version tools_min_version="3.0.0" flow_version="2.0" prov_capabilities_per_version="bsp_gen4 bt">
<num>4.0.0 release</num>
<commit>release-v4.0.0</commit>
</version>
<version tools_min_version="2.4.0" flow_version="1.0,2.0" prov_capabilities_per_version="bsp_gen3 ble bt">
<num>Latest 3.X release</num>
<commit>latest-v3.X</commit>
</version>
<version tools_min_version="2.4.0" flow_version="1.0,2.0" prov_capabilities_per_version="bsp_gen3 ble bt">
<num>3.1.0 release</num>
<commit>release-v3.1.0</commit>
</version>
<version tools_min_version="2.4.0" flow_version="1.0,2.0" prov_capabilities_per_version="bsp_gen3">
<num>3.0.0 release</num>
<commit>release-v3.0.0</commit>
</version>
<version tools_min_version="2.2.0" flow_version="1.0,2.0" prov_capabilities_per_version="bsp_gen2">
<num>Latest 2.X release</num>
<commit>latest-v2.X</commit>
</version>
<version tools_min_version="2.2.0" flow_version="1.0,2.0" prov_capabilities_per_version="bsp_gen2">
<num>2.3.0 release</num>
<commit>release-v2.3.0</commit>
</version>
<version tools_min_version="2.2.0" flow_version="1.0,2.0" prov_capabilities_per_version="bsp_gen2">
<num>2.1.0 release</num>
<commit>release-v2.1.0</commit>
</version>
<version tools_min_version="2.2.0" flow_version="1.0,2.0" prov_capabilities_per_version="bsp_gen2">
<num>2.0.0 release</num>
<commit>release-v2.0.0</commit>
</version>
</versions>
</board>
<board default_location="local">
<id>CY8CKIT-062S2-43012</id>
<category>PSoC™ 6 BSPs</category>
<board_uri>https://github.com/cypresssemiconductorco/TARGET_CY8CKIT-062S2-43012</board_uri>
<chips>
<mcu>CY8C624ABZI-S2D44</mcu>
<radio>LBEE59B1LV (CYW43012C0WKWBG)</radio>
</chips>
<name>CY8CKIT-062S2-43012</name>
<summary>The CY8CKIT-062S2-43012 PSoC™ 6S2 Wi-Fi Bluetooth® Pioneer Kit is a low-cost hardware platform that enables design and debug of PSoC™ 6 MCUs. It comes with a Murata 1LV Module (CYW43012 Wi-Fi + Bluetooth® Combo Chip), industry-leading CAPSENSE™ for touch buttons and slider, on-board debugger/programmer with KitProg3, microSD card interface, 512-Mb Quad-SPI NOR flash, PDM-PCM microphone interface.</summary>
<prov_capabilities>adc anycloud arduino bt capsense capsense_button capsense_linear_slider cat1 cat1a comp csd cy8ckit_062s2_43012 cyw43012 cyw43xxx dma flash_2048k fram hal i2c i2s j2 led low_power lptimer mcu_gp memory memory_qspi multi_core nor_flash pdm pot psoc6 qspi rgb_led rtc sdhc smart_io spi sram_1024k std_crypto switch uart usb_device usb_host wifi</prov_capabilities>
<description> <div class="category">Kit Features:</div> <ul> <li>Support of up to 2MB Flash and 1MB SRAM</li> <li>Dedicated SDHC to interface with WICED wireless devices.</li> <li>Delivers dual-cores, with a 150-MHz Arm&#174; Cortex&#174;-M4 as the primary application processor and a 100-MHz Arm&#174; Cortex&#174;-M0+ as the secondary processor for low-power operations.</li> <li>Supports Full-Speed USB, capacitive-sensing with CAPSENSE&#8482;, a PDM-PCM digital microphone interface, a Quad- SPI interface, 13 serial communication blocks, 7 programmable analog blocks, and 56 programmable digital blocks.</li> </ul><p/> <div class="category">Kit Contents:</div> <ul> <li>PSoC&#8482; 6S2 Wi-Fi Bluetooth&#174; Pioneer Board</li> <li>USB Type-A to Micro-B cable</li> <li>Quick Start Guide</li> <li>Four jumper wires (4 inches each)</li> <li>Two jumper wires (5 inches each)</li> </ul></description>
<documentation_url>https://www.infineon.com/CY8CKIT-062S2-43012</documentation_url>