Resolve stuck FADC channel bit

[baltzell]

Based on discussions, the problem seems to be isolated to slot 3 in top (hps1/crate=37) and runs 10651-10678, where the 2nd bit is stuck set.

So, that should be 8 one-way-swapped channels (e.g. 000->010, 001->011). If each of those 8 pairs has distinguishable pedestals, we should be able to resolve them based on pedestal.

Probably read the expected pedestals from the conditions database (but they might need updating, as we don't normally use them in reconstruction), and then fix the channel number by comparing to the measured pedestal, ideally during Evio2Lcio or in a separate driver.

[baltzell]

#765