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GBABios.s
executable file
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GBABios.s
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/*
Hello and Welcome to a dissassembled GBABios
"blown" is my own bl-command, because the most
bls go to an adress that isn't already
dissassembled, so I had to write a function
that makes a command that goes to an address
that isn't already included.
blown 0x3710, 0x2CC
Here we're at address 0x2CC and want to jump to 0x3710
The same is with some b-commands, but here
I've only included this commands as data.
.hword 0xE020
@b 0x2F3C
And some add/sub-commands have other binary-data
with gas (then with the assembler that Nintendo used).
So I made a Halfword of the original data
and commented the dissassembled command.
.hword 0x1C80
@add r0, r0, #2
*/
.include "gball.s"
.text
.global _start
/*
y = current adress, where the command is
x = address where the jump goes to
*/
.macro blown x=0, y=0
.hword 0b1111000000000000 | ((((\x-\y)>>12)&0b11111111111))
.hword 0b1111100000000000 | ((((\x-(\y+2))>>1)&0b11111111111)-1)
.endm
.macro blown2 x=0, y=0
.hword 0b1111000000000000 | ((((\x-\y)>>12)&0b11111111111))
.hword 0b1111100000000000 | ((((\x-(\y+2))>>1)&0b11111111111)-1)
.endm
.align
.arm
_start:
b Reset @ Reset [0x68]
b DebugHandler @ Undefined Instruction [0x1C]
b SWIHandler @ Software Interrupt (SWI [0x140])
b DebugHandler @ Prefetch Abort [0x1C]
b DebugHandler @ Data Abort [0x1C]
b DebugHandler @ Reserved [0x1C]
b IRQHandler @ Normal Interrupt (IRQ [0x128])
DebugHandler: @ Fast Interrupt (FIQ)
ldr sp, b1B8+0xC @ 0x1C4 =0x03007FF0
stmdb sp!, {r12, lr}
mrs r12, SPSR
mrs r14, CPSR
stmdb sp!, {r12, r14}
mov r12, #0x08000000
ldrb r14, [r12, #0x9C]
cmp r14, #0xA5 @ If debugging is enabled
bne b54
ldreqb r14, [r12, #0xB4] @ load Device type
andeqs r14, r14, #0x80
adr r14, b54
ldrne pc, =0x09FE2000 @ 1MBIT DACS [0x274]
ldreq pc, =0x09FFC000 @ 8MBIT DACS [0x278]
b54:
ldr sp, b1B8+0x8 @ 0x1C0 =0x03007FE0
ldmia sp!, {r12, r14}
msr SPSR, r12
ldmia sp!, {r12, lr}
subs pc, lr, #0x4
Reset:
cmp lr, #0x0
moveq lr, #0x4
/*
4000300h - POSTFLG - BYTE - Undocumented - Post Boot / Debug Control (R/W)
After initial reset, the GBA BIOS initializes the register to 01h, and any further execution of the Reset vector (00000000h) will pass control to the Debug vector (0000001Ch) when sensing the register to be still set to 01h.
Bit Expl.
0 Undocumented. First Boot Flag (0=First, 1=Further)
1-7 Undocumented. Not used.
*/
mov r12, #0x04000000
ldrb r12, [r12, #0x300]
teq r12, #0x1 @ If first start
mrseq r12, CPSR
orreq r12, r12, #0xC0
msreq CPSR, r12
beq DebugHandler
HardReset:
mov r0, #0xDF @ Systemmode | ARMMode | FIQ + IRQ disable
msr CPSR, r0
mov r4, #0x04000000 @ IME = 0
strb r4, [r4, #0x208]
bl bE0
adr r0, b300 @ add r0, pc, #0x258 @ r0 = 0x300
str r0, [sp, #0xFC]
ldr r0, =b1928+1 @ [0x27C] = 0x1929
adr lr, SoftReset @ add lr, pc, #0x0 @ lr = 0xB4
bx r0
@ bB4
SoftReset:
mov r4, #0x04000000
ldrb r2, [r4, #-6]
bl bE0
cmp r2, #0x0
ldmdb r4, {r0-r12}
movne lr, #0x02000000
moveq lr, #0x08000000
mov r0, #0x1F @ Systemmode
msr CPSR, r0
mov r0, #0x0
bx lr
bE0:
mov r0, #0xD3 @ Supervisor (SWI) Mode | FIQ IRQ disable
msr CPSR, r0
ldr sp, b1B8+0x8 @ 0x1C0 (= 0x03007FA0)
mov lr, #0x0
msr SPSR, lr
mov r0, #0xD2 @ IRQ Mode | FIQ + IRQ disable
msr CPSR, r0
ldr sp, b1B8+0x4 @ 0x1BC (= 0x03007FA0)
mov lr, #0x0
b100:
msr SPSR, lr
mov r0, #0x5F @ System Mode | FIQ disabled
msr CPSR, r0
ldr sp, b1B8 @ 0x1B8 (= 0x03007F00)
add r0, pc, #0x1
bx r0
.thumb
@ Reset memory from 0x03FFFFE0 to 0x04000000
mov r0, #0
ldr r1, =-0x200 @ 0x280
b120:
str r0, [r4, r1]
.hword 0x1D09
@add r1, r1, #0x4
blt b120
bx lr
.arm
IRQHandler:
stmdb sp!, {r0-r3, r12, lr} @ save registers to SP_irq
mov r0, #0x04000000 @ ptr+4 to 03FFFFFC (mirror of 03007FFC)
add lr, pc, #0x0 @ retadr for USER handler $+8=138h
ldr pc, [r0, #-4] @ jump to [03FFFFFC] USER handler
ldmia sp!, {r0-r3, r12, lr} @ restore registers from SP_irq
subs pc, lr, #0x4 @ return from IRQ (PC=LR-4, CPSR=SPSR)
SWIHandler:
stmdb sp!, {r11, r12, lr}
ldrb r12, [lr, #-2]
adr r11, b1C8
ldr r12, [r11, r12, lsl #2]
mrs r11, SPSR
stmdb sp!, {r11}
and r11, r11, #0x80
orr r11, r11, #0x1F
msr CPSR, r11
stmdb sp!, {r2, lr}
adr lr, b170
bx r12
b170:
ldmia sp!, {r2, lr}
mov r12, #0xD3
msr CPSR, r12
ldmia sp!, {r11}
msr SPSR, r11
ldmia sp!, {r11, r12, lr}
movs pc, lr
mov r12, #0x04000000 @ DISPCNT - LCD Control (Read/Write)
mov r2, #0x4
strb r2, [r12, #1]
mov r2, #0x8
strb r2, [r12]
Halt:
mov r2, #0x0
b CustomHalt
Stop:
mov r2, #0x80
CustomHalt:
mov r12, #0x04000000
strb r2, [r12, #0x301] @ 4000301h - HALTCNT - BYTE - Undocumented - Low Power Mode Control (W)
bx lr
b1B8:
.word 0x03007F00
.word 0x03007FA0
.word 0x03007FE0
.word 0x03007FF0
b1C8:
.word SoftReset @ SoftReset [0xB4]
.word RegisterRamReset+1 @ RegisterRamReset [0x9C3]
.word Halt @ Halt [0x1A0]
.word Stop @ Stop/Sleep [0x1A8]
.word IntrWait @ IntrWait [0x330]
.word VBlankIntrWait @ VBlankIntrWait [0x328]
.word Div @ Div [0x3B4]
.word DivArm @ DivArm [0x3A8]
.word Sqrt @ Sqrt [0x404]
.word ArcTan @ ArcTan [0x474]
.word ArcTan2+1 @ ArcTan2 [0x4FD]
.word CpuSet+1 @ CpuSet [0xB4D]
.word CpuFastSet @ CpuFastSet [0xBC4]
.word GetBiosChecksum @ GetBiosChecksum [0x378]
.word BgAffineSet @ BgAffineSet [0xC2C]
.word ObjAffineSet @ ObjAffineSet [0xCE0]
.word BitUnPack @ BitUnPack [0xF60]
.word LZ77UnCompWram @ LZ77UnCompWram [0x10FC]
.word LZ77UnCompVram @ LZ77UnCompVram [0x1194]
.word HuffUnComp @ HuffUnComp [0x1014]
.word RlUnCompWram+1 @ RlUnCompWram [0x1279]
.word RlUnCompVram+1 @ RlUnCompVram [0x12C1]
.word Diff8bitUnFilterWram+1 @ Diff8bitUnFilterWram [0x1333]
.word Diff8bitUnFilterVram+1 @ Diff8bitUnFilterVram [0x135D]
.word Diff16bitUnFilter+1 @ Diff16bitUnFilter [0x1399]
.word SoundBias+1 @ SoundBias [0x801]
.word SoundDriverInit+1 @ SoundDriverInit [0x1665]
.word SoundDriverMode+1 @ SoundDriverMode [0x179D]
.word SoundDriverMain+1 @ SoundDriverMain [0x1DC5]
.word SoundDriverVSync+1 @ SoundDriverVSync [0x210D]
.word SoundChannelClear+1 @ SoundChannelClear [0x1825]
.word MidiKey2Freq+1 @ MidiKey2Freq [0x18D9]
.word SoundWhatever0+1 @ SoundWhatever0 [0x13C5]
.word SoundWhatever1+1 @ SoundWhatever1 [0x1435]
.word SoundWhatever2+1 @ SoundWhatever2 [0x14C1]
.word SoundWhatever3+1 @ SoundWhatever3 [0x14FD]
.word SoundWhatever4+1 @ SoundWhatever4 [0x1515]
.word MultiBoot+1 @ MultiBoot [0x28CF]
.word HardReset @ HardReset [0x8C]
.word CustomHalt @ CustomHalt [0x1AC]
.word SoundDriverVSyncOff+1 @ SoundDriverVSyncOff [0x1879]
.word SoundDriverVSyncOn+1 @ SoundDriverVSyncOn [0x18C9]
.word SoundGetJumpList+1 @ SoundGetJumpList [0x2693]
b274:
.pool
.thumb
.globl b284
.thumb_func
b284:
mov r4, #4
lsl r4, r4, #24
mov r5, #5
lsl r5, r5, #24
mov r6, #6
lsl r6, r6, #24
mov r1, #0
mov r0, #194
mov r2, r4
add r2, #0x80
strb r0, [r2, #2]
strb r0, [r2, #9]
mov r0, #0xFF
.hword 0x1C80
@add r0, r0, #2
mov r2, #160
mov r3, #144
str r6, [sp]
mov r7, #240
str r7, [sp, #4]
bl b79E
mov r0, #131
lsl r0, r0, #7
strh r0, [r4, #0xC]
ldr r0, b2F0+0x4 @ 0x2F4
str r0, [r4, #0x28]
asr r0, r0, #16
lsl r0, r0, #11
str r0, [r4, #44]
ldr r3, b2F0+0x8 @ 0x2F8
str r3, [r5]
ldrh r3, [r5]
ldr r7, b2F0+0xC @ 0x2FC
b2C6:
lsr r2, r4, #17
add r2, r2, r4
strh r7, [r2, #2]
@ 0xfa20f003
blown2 0x3710, 0x2CC
mov r0, #4
strb r0, [r4, #1]
strb r0, [r4]
sub r3, r3, r7
strh r3, [r5]
bgt b2C6
mvn r0, r1
str r0, [sp, #8]
add r4, #212
add r1, sp, #8
str r1, [r4]
str r6, [r4, #4]
ldr r1, b2F0 @ 0x2F0
str r1, [r4, #8]
blown 0x3718, 0x2EC
b2F0:
.pool
.word 0x85006000
.word 0xFFFFD800
.word 0x7FFF7BDE
.word 0x00000C63
.arm
b300:
mov r3, #0x04000000
ldr r2, [r3, #512]
and r2, r2, r2, lsr #16
ands r1, r2, #0x80
ldrne r0, [pc, #1952]
andeq r1, r2, #0x1
ldreq r0, [pc, #1948]
streqh r2, [r3, #-8]
strb r1, [r3, #514]
bx r0
VBlankIntrWait:
mov r0, #0x1
mov r1, #0x1
IntrWait:
stmdb sp!, {r4,lr}
mov r3, #0x0
mov r4, #0x1
cmp r0, #0x0
blne b358
b344:
strb r3, [r12, #0x301]
bl b358
beq b344
ldmia sp!, {r4,lr}
bx lr
b358:
mov r12, #0x04000000
strb r3, [r12, #0x208]
ldrh r2, [r12, #-8]
ands r0, r1, r2
eorne r2, r2, r0
strneh r2, [r12, #-8]
strb r4, [r12, #0x208]
bx lr
GetBiosChecksum:
mov r0, #0x0
mov r3, #0x0
b380:
mov r12, #0xDF
ldmia r3!, {r2}
msr CPSR_fc, r12
add r0, r0, r2
movs r1, r3, lsr #14
beq b380
bx lr
.thumb
.globl b39C
.thumb_func
b39C:
cmp r0, #0
bgt b3A2
neg r0, r0
b3A2:
bx lr
.globl DivThumb
.thumb_func
DivThumb:
b3A4:
adr r3, Div
bx r3
/*
SWI 07h - DivArm
Same as "SWI 06h Div", but incoming parameters are exchanged, r1/r0 (r0=Denom, r1=number). For compatibility with ARM's library. Slightly slower (3 clock cycles) than SWI 06h.
*/
.arm
DivArm:
mov r3, r0
mov r0, r1
mov r1, r3
/*
SWI 06h - Div
Signed Division, r0/r1.
r0 signed 32bit Number
r1 signed 32bit Denom
Return:
r0 Number DIV Denom ;signed
r1 Number MOD Denom ;signed
r3 ABS (Number DIV Denom) ;unsigned
For example, incoming -1234, 10 should return -123, -4, +123.
The function usually gets caught in an endless loop upon division by zero.
*/
Div:
@ r0 and r1 must be positive
@ r12 saves if result is positive or negative
ands r3, r1, #0x80000000
rsbmi r1, r1, #0x0 @ r1 must be positive for calculation
eors r12, r3, r0, asr #32 @ if(r0 and r1 are both positive or negative) {r12 = 0}
@ and if(r0 is negative) {Carry is Set}
rsbcs r0, r0, #0x0 @ r0 must be positive for calculation
movs r2, r1
b3C8:
cmp r2, r0, lsr #1
movls r2, r2, lsl #1
bcc b3C8
b3D4:
cmp r0, r2
adc r3, r3, r3
subcs r0, r0, r2
teq r2, r1
movne r2, r2, lsr #1
bne b3D4
mov r1, r0
mov r0, r3
movs r12, r12, lsl #1
rsbcs r0, r0, #0x0 @ neg r0 if
rsbmi r1, r1, #0x0 @ neg r1 if
bx lr
/*
SWI 08h - Sqrt
Calculate square root.
r0 unsigned 32bit number
Return:
r0 unsigned 16bit number
The result is an integer value, so Sqrt(2) would return 1, to avoid this inaccuracy, shift left incoming number by 2*N as much as possible (the result is then shifted left by 1*N). Ie. Sqrt(2 shl 30) would return 1.41421 shl 15.
*/
Sqrt:
stmdb sp!, {r4}
mov r12, r0
mov r1, #0x1
b410:
cmp r0, r1
movhi r0, r0, lsr #1
movhi r1, r1, lsl #1
bhi b410
b420:
mov r0, r12
mov r4, r1
mov r3, #0x0
mov r2, r1
b430:
cmp r2, r0, lsr #1
movls r2, r2, lsl #1
bcc b430
b43C:
cmp r0, r2
adc r3, r3, r3
subcs r0, r0, r2
teq r2, r1
movne r2, r2, lsr #1
bne b43C
add r1, r1, r3
movs r1, r1, lsr #1
cmp r1, r4
bcc b420
mov r0, r4
ldmia sp!, {r4}
bx lr
/*
SWI 09h - ArcTan
Calculates the arc tangent.
r0 Tan, 16bit (1bit sign, 1bit integral part, 14bit decimal part)
Return:
r0 "-PI/2<THETA/<PI/2" in a range of C000h-4000h.
Note: there is a problem in accuracy with "THETA<-PI/4, PI/4<THETA".
*/
.globl ArcTanThumb
.thumb_func
.thumb
ArcTanThumb:
b470:
adr r3, ArcTan
bx r3
.arm
ArcTan:
mul r1, r0, r0
mov r1, r1, asr #14
rsb r1, r1, #0x0
mov r3, #0xA9
mul r3, r1, r3
mov r3, r3, asr #14
add r3, r3, #0x390
mul r3, r1, r3
mov r3, r3, asr #14
add r3, r3, #0x900
add r3, r3, #0x1C
mul r3, r1, r3
mov r3, r3, asr #14
add r3, r3, #0xF00
add r3, r3, #0xB6
mul r3, r1, r3
mov r3, r3, asr #14
add r3, r3, #0x1600
add r3, r3, #0xAA
mul r3, r1, r3
mov r3, r3, asr #14
add r3, r3, #0x2000
add r3, r3, #0x81
mul r3, r1, r3
mov r3, r3, asr #14
add r3, r3, #0x3600
add r3, r3, #0x51
mul r3, r1, r3
mov r3, r3, asr #14
add r3, r3, #0xA200
add r3, r3, #0xF9
mul r0, r3, r0
mov r0, r0, asr #16
bx lr
/*
SWI 0Ah - ArcTan2
Calculates the arc tangent after correction processing.
Use this in normal situations.
r0 X, 16bit (1bit sign, 1bit integral part, 14bit decimal part)
r1 Y, 16bit (1bit sign, 1bit integral part, 14bit decimal part)
Return:
r0 0000h-FFFFh for 0<=THETA<2PI.
*/
.thumb
ArcTan2:
push {r4-r7, lr}
cmp r1, #0
bne b510
cmp r0, #0
blt b50A
mov r0, #0
b b59E
b50A:
mov r0, #0x80
lsl r0, r0, #8
b b59E
b510:
cmp r0, #0
bne b524
cmp r1, #0
blt b51E
mov r0, #64
lsl r0, r0, #8
b b59E
b51E:
mov r0, #192
lsl r0, r0, #8
b b59E
b524:
mov r2, r0
lsl r2, r2, #14
mov r3, r1
lsl r3, r3, #14
neg r4, r0
neg r5, r1
mov r6, #64
lsl r6, r6, #8
lsl r7, r6, #1
cmp r1, #0
blt b572
cmp r0, #0
blt b55E
cmp r0, r1
blt b550
mov r1, r0
mov r0, r3
bl DivThumb
bl ArcTanThumb
b b59E
b550:
mov r0, r2
bl DivThumb
bl ArcTanThumb
sub r0, r6, r0
b b59E
b55E:
cmp r4, r1
blt b550
b562:
mov r1, r0
mov r0, r3
bl DivThumb
bl ArcTanThumb
add r0, r7, r0
b b59E
b572:
cmp r0, #0
bgt b58A
cmp r4, r5
bgt b562
b57A:
mov r0, r2
bl DivThumb
bl ArcTanThumb
add r6, r6, r7
sub r0, r6, r0
b b59E
b58A:
cmp r0, r5
blt b57A
mov r1, r0
mov r0, r3
bl DivThumb
bl ArcTanThumb
add r7, r7, r7
add r0, r7, r0
b59E:
pop {r4-r7}
pop {r3}
bx r3
@ Maybe check of Cartridge Key Number MSBs
@ Cartridgeheader 0x9E
.globl b5A4
.thumb_func
b5A4:
push {r3-r6, lr}
mov r6, #8
lsl r6, r6, #24
mov r5, #0x9E
add r5, r5, r6
sub r0, r5, #1
mov r1, #27
bl b6AC
mov r4, #12
mul r4, r0
ldrb r3, [r5]
lsl r3, r3, #30
lsr r3, r3, #30
mov r2, #0x30
mul r2, r3
add r4, r4, r2
adr r5, b5EC @add r5, pc, #36
add r5, r5, r4
mov r4, #0
b5CC:
mov r0, r4
bl b6CE
cmp r4, #3
blt b5E4
cmp r4, #9
bge b5E4
ldrh r1, [r5]
lsl r1, r1, #1
orr r1, r6
ldrh r0, [r1]
@add r5, r5, #2
.hword 0x1CAD
b5E4:
@add r4, r4, #1
.hword 0x1C64
cmp r4, #11
bne b5CC
pop {r3-r6, pc}
b5EC:
.hword 0x479B, 0x7426, 0x11BC, 0x6D4F
.hword 0x11BD, 0x32F1, 0x7FD9, 0x2CE7
.hword 0x5DA5, 0x11BD, 0x4610, 0x5DA4
.hword 0x4E90, 0x6173, 0x2A84, 0x4E91
.hword 0x106A, 0x75FE, 0x29C8, 0x7839
.hword 0x420E, 0x5D1B, 0x7838, 0x12A8
.hword 0x3F7D, 0x67B9, 0x26F3, 0x54EF
.hword 0x7C23, 0x26F2, 0x6BC6, 0x4137
.hword 0x15AB, 0x730D, 0x6BC7, 0x3B4F
.hword 0x5F24, 0x3DDA, 0x253F, 0x1749
.hword 0x3DDB, 0x70E6, 0x746C, 0x30F7
.hword 0x531F, 0x6738, 0x531E, 0x1A51
.hword 0x1971, 0x5B7D, 0x4ED6, 0x1970
.hword 0x3F27, 0x75CB, 0x3D62, 0x128C
.hword 0x74B8, 0x2FAD, 0x74B9, 0x64FD
.hword 0x6C9A, 0x4F3A, 0x276D, 0x73EF
.hword 0x38B1, 0x4F3B, 0x571E, 0x7EA3
.hword 0x6249, 0x3587, 0x1B7C, 0x3586
.hword 0x7AFB, 0x67E4, 0x5C92, 0x67E5
.hword 0x2BCA, 0x438C, 0x2E6F, 0x587F
.hword 0x14B7, 0x2E6E, 0x4CB9, 0x6FA2
.hword 0x38F0, 0x719E, 0x475A, 0x1F3C
.hword 0x6AD8, 0x475B, 0x5199, 0x3264
.hword 0x7B41, 0x49EF, 0x5198, 0x1CD7
b6AC:
push {r4, r5, lr}
mov r4, #3
mov r3, #0
b6B2:
ldrb r2, [r0, #0]
ror r3, r4
mov r5, #4
b6B8:
eor r3, r2
lsl r2, r2, #8
.hword 0x1E6D
@sub r5, r5, #1
bgt b6B8
.hword 0x1C40
@add r0, r0, #1
.hword 0x1E49
@sub r1, r1, #1
bgt b6B2
mov r0, r3
lsl r0, r0, #27
lsr r0, r0, #30
pop {r4, r5, pc}
b6CE:
push {r4, lr}
mov r4, #20
mul r4, r0
mov r3, #8
lsl r3, r3, #24
add r0, r3, #4
add r0, r0, r4
ldr r1, =0x03000088 @ 0xAC0
add r1, r1, r4
mov r2, #10
bl CpuSet
pop {r4, pc}
.globl b6E8
.thumb_func
b6E8:
push {r4-r6, lr}
ldr r1, =0x3290 @ 0xAC4
mov r6, #0
b6EE:
mov r4, #255
cmp r6, #152
bne b6F6
mov r4, #123
b6F6:
cmp r6, #154
bne b6FC
mov r4, #252
b6FC:
cmp r6, #156
bge b70E
ldrb r2, [r0, r6]
ldrb r3, [r1, r6]
and r2, r4
.hword 0x1C76
@add r6, r6, #1
cmp r2, r3
beq b6EE
b b722
b70E:
mov r4, #25
b710:
ldrb r2, [r0, r6]
add r4, r4, r2
.hword 0x1C76
@add r6, r6, #1
cmp r6, #186
blt b710
lsl r0, r4, #24
bne b722
mov r0, #0
b 0x724
b722:
mov r0, #1
pop {r4-r6, pc}
.globl b726
.thumb_func
b726:
ldr r3, =0x03003580 @ 0xAC8
mov r2, #8
mov r0, #126
neg r0, r0
b72E:
str r0, [r3, r2]
add r2, #16
cmp r2, #120
blt b72E
bx lr
.globl b738
.thumb_func
b738:
push {r6, lr}
sub r3, r0, #3
lsl r6, r3, #2
mul r6, r2
mov r3, #64
sub r3, r3, r2
mul r6, r3
.hword 0x1EC0
@sub r0, r0, #3
mov r3, #24
mul r3, r0
lsl r3, r3, #8
sub r6, r6, r3
str r6, [r1]
cmp r2, #47
bgt b766
mov r6, #26
mul r6, r2
sub r2, #72
mul r6, r2
mov r3, #104
lsl r3, r3, #8
add r6, r6, r3
str r6, [r1, #4]
b766:
pop {r6, pc}
.globl b768
.thumb_func
b768:
push {r4-r7, lr}
mov r7, r1
ldmia r0!, {r4-r6}
add r6, #128
mov r1, r6
mov r0, #128
lsl r0, r0, #16
bl DivThumb
lsl r3, r6, #1
strh r3, [r7, #12]
strh r3, [r7, #14]
mov r1, #127
lsl r1, r1, #7
str r1, [r7]
str r1, [r7, #4]
asr r1, r4, #8
mul r1, r0
asr r1, r1, #16
add r1, #120
strh r1, [r7, #8]
asr r1, r5, #8
mul r1, r0
asr r1, r1, #16
add r1, #80
strh r1, [r7, #10]
pop {r4-r7, pc}
.globl b79E
.thumb_func
b79E:
push {r4-r7, lr}
ldr r4, [sp, #20]
ldr r5, [sp, #24]
mov r7, #0
b7A6:
mov r6, #0
b7A8:
strh r0, [r4, r6]
add r0, r0, r1
.hword 0x1CB6
@add r6, r6, #2
cmp r6, r2
blt b7A8
add r4, r4, r5
.hword 0x1C7F
@add r7, r7, #1
cmp r7, r3
blt b7A6
pop {r4-r7, pc}
.globl b7BC
.thumb_func
b7BC:
push {r4-r7, lr}
mov r7, #2
b7C0:
ldr r4, =0x3200 @ 0xACC
lsl r3, r0, #1
add r3, r3, r0
add r3, r3, r7
lsl r3, r3, #2
add r3, r3, r4
ldr r5, [r3, #4]
ldr r6, [r3, #16]
mov r3, #32
sub r3, r3, r1
mul r3, r5
mul r6, r1
add r3, r3, r6
lsr r4, r3, #5
mov r6, #31
lsl r3, r6, #20
and r3, r4
lsr r5, r3, #10
lsl r3, r6, #10
and r3, r4
lsr r3, r3, #5
orr r3, r5
and r4, r6
orr r4, r3
add r3, r2, r7
lsl r6, r3, #1
ldr r3, =0x05000200 @ 0xAD0
add r3, r6, r3
strh r4, [r3]
.hword 0x1E7F
@sub r7, r7, #1
bge b7C0
pop {r4-r7, pc}
.globl SoundBias
.thumb_func
SoundBias:
b800:
mov r1, #2
lsl r1, r1, #8
mov r12, r1
ldr r3, =0x04000088 @ 0xAD4
ldrh r2, [r3]
ldr r3, =0x04000088 @ 0xAD4
lsl r1, r2, #22
lsr r1, r1, #22
cmp r0, #0
beq b81C
cmp r1, r12
bge b82C
.hword 0x1C92
@add r2, r2, #2
b b822
b81C:
cmp r1, #0
ble b82C
.hword 0x1E92
@sub r2, r2, #2
b822:
strh r2, [r3]
mov r2, #8
b826:
.hword 0x1E52
@sub r2, r2, #1
bpl b826
b b800
b82C:
bx lr
.globl b82E
.thumb_func
b82E:
ldr r1, =0x03000564 @ 0xAD8
mov r2, #55
lsl r2, r2, #4
ldr r0, =0x332C @ 0xADC
b b858
.globl b838
.thumb_func
b838:
ldr r1, =0x03000564 @ 0xAD8
mov r2, #36
ldr r0, =0x326C @ 0xAE0
b b858
.globl b840
.thumb_func
b840:
mov r1, #7
lsl r1, r1, #24
mov r2, #80
ldr r0, =0x369C @ 0xAE4
b b858
.globl b84A
.thumb_func
b84A:
ldr r1, =0x05000038 @ 0xAE8
cmp r0, #0
beq b854
lsl r0, r0, #9
add r1, r1, r0
b854:
mov r2, #8
ldr r0, =0x3264 @ 0xAEC
b858:
push {r4, r5, lr}
add r2, r2, r1
b85C:
ldr r3, =0x3200 @ 0xACC
cmp r0, r3
blt b872
mov r3, #4
lsl r3, r3, #12
cmp r0, r3
bge b872
ldmia r0!, {r3}
stmia r1!, {r3}
cmp r1, r2
blt b85C
b872:
pop {r4, r5, pc}
.globl b874
.thumb_func