v1: Backported operators >>> and >>>= from alpha branch.

[jeeswg]

Test code

;test code: >>> and >>>= (bitshift right logical) (AHK v1)

Loop 100000
{
	vNum := RandomInt64()
	Random, vShift, 0, 63
	vRet1 := BitShiftRightLogical(vNum, vShift, 1)
	vRet2 := BitShiftRightLogical(vNum, vShift, 2)
	vRet3 := BitShiftRightLogical(vNum, vShift, 3)
	MsgBox(vNum " " vShift "`r`n" vRet1 "`r`n" vRet2 "`r`n" vRet3)
	if !(vRet1 = vRet2)
	|| !(vRet1 = vRet3)
		MsgBox(vNum " " vShift)
}
MsgBox("done")

vOutput := ""
vNum := 0x7FFFFFFFFFFFFFFF
Loop 20
{
	vNum2 := BitShiftRightLogical(vNum, 1)
	vOutput .= Format("0x{:016X} 0x{:016X}", vNum, vNum2) "`r`n"

	vNum++

	vNum2 := BitShiftRightLogical(vNum, 1)
	vOutput .= Format("0x{:016X} 0x{:016X}", vNum, vNum2) "`r`n"

	vNum--
	vNum += 0x1000000000000000
}

Clipboard := vOutput
MsgBox("done")
return

RandomInt64()
{
	local
	Random, Rand1, -0x80000000, 0x7FFFFFFF
	Random, Rand2, -0x80000000, 0x7FFFFFFF
	Rand1 += 0x80000000
	Rand2 += 0x80000000
	return (Rand1 << 32) | Rand2
}

BitShiftRightLogical(vNum, vShift, vMode:=2)
{
	local
	if (vMode = 1)
	{
		if (vShift = 0)
			return vNum
		else if (vShift < 0) || (vShift > 63)
			throw Exception("Error evaluating expression.", -1)
		return (vNum >> vShift) & ((1 << (64-vShift))-1)
		;return (vNum >> vShift) & ((2**(64-vShift))-1) ;equivalent to line above
	}
	else if (vMode = 2)
	{
		return vNum >>> vShift
	}
	else (vMode = 3)
	{
		vNum >>>= vShift
		return vNum
	}
}

MsgBox(vText)
{
	MsgBox, % vText
}